LLVM 19.0.0git
AArch64TargetParser.h
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1//===-- AArch64TargetParser - Parser for AArch64 features -------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements a target parser to recognise AArch64 hardware features
10// such as FPU/CPU/ARCH and extension names.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_TARGETPARSER_AARCH64TARGETPARSER_H
15#define LLVM_TARGETPARSER_AARCH64TARGETPARSER_H
16
17#include "llvm/ADT/ArrayRef.h"
18#include "llvm/ADT/Bitset.h"
19#include "llvm/ADT/StringMap.h"
20#include "llvm/ADT/StringRef.h"
21#include "llvm/Support/VersionTuple.h"
22#include <array>
23#include <vector>
24
25namespace llvm {
26
27class Triple;
28
29namespace AArch64 {
30
31struct ArchInfo;
32struct CpuInfo;
33
34// Function Multi Versioning CPU features. They must be kept in sync with
35// compiler-rt enum CPUFeatures in lib/builtins/cpu_model/aarch64.c with
36// FEAT_MAX as sentinel.
37enum CPUFeatures {
38 FEAT_RNG,
39 FEAT_FLAGM,
40 FEAT_FLAGM2,
41 FEAT_FP16FML,
42 FEAT_DOTPROD,
43 FEAT_SM4,
44 FEAT_RDM,
45 FEAT_LSE,
46 FEAT_FP,
47 FEAT_SIMD,
48 FEAT_CRC,
49 FEAT_SHA1,
50 FEAT_SHA2,
51 FEAT_SHA3,
52 FEAT_AES,
53 FEAT_PMULL,
54 FEAT_FP16,
55 FEAT_DIT,
56 FEAT_DPB,
57 FEAT_DPB2,
58 FEAT_JSCVT,
59 FEAT_FCMA,
60 FEAT_RCPC,
61 FEAT_RCPC2,
62 FEAT_FRINTTS,
63 FEAT_DGH,
64 FEAT_I8MM,
65 FEAT_BF16,
66 FEAT_EBF16,
67 FEAT_RPRES,
68 FEAT_SVE,
69 FEAT_SVE_BF16,
70 FEAT_SVE_EBF16,
71 FEAT_SVE_I8MM,
72 FEAT_SVE_F32MM,
73 FEAT_SVE_F64MM,
74 FEAT_SVE2,
75 FEAT_SVE_AES,
76 FEAT_SVE_PMULL128,
77 FEAT_SVE_BITPERM,
78 FEAT_SVE_SHA3,
79 FEAT_SVE_SM4,
80 FEAT_SME,
81 FEAT_MEMTAG,
82 FEAT_MEMTAG2,
83 FEAT_MEMTAG3,
84 FEAT_SB,
85 FEAT_PREDRES,
86 FEAT_SSBS,
87 FEAT_SSBS2,
88 FEAT_BTI,
89 FEAT_LS64,
90 FEAT_LS64_V,
91 FEAT_LS64_ACCDATA,
92 FEAT_WFXT,
93 FEAT_SME_F64,
94 FEAT_SME_I64,
95 FEAT_SME2,
96 FEAT_RCPC3,
97 FEAT_MOPS,
98 FEAT_MAX,
99 FEAT_EXT = 62,
100 FEAT_INIT
101};
102
103static_assert(FEAT_MAX < 62,
104 "Number of features in CPUFeatures are limited to 62 entries");
105
106// Each ArchExtKind correponds directly to a possible -target-feature.
107#define EMIT_ARCHEXTKIND_ENUM
108#include "llvm/TargetParser/AArch64TargetParserDef.inc"
109
110using ExtensionBitset = Bitset<AEK_NUM_EXTENSIONS>;
111
112// Represents an extension that can be enabled with -march=<arch>+<extension>.
113// Typically these correspond to Arm Architecture extensions, unlike
114// SubtargetFeature which may represent either an actual extension or some
115// internal LLVM property.
116struct ExtensionInfo {
117 StringRef Name; // Human readable name, e.g. "profile".
118 std::optional<StringRef> Alias; // An alias for this extension, if one exists.
119 ArchExtKind ID; // Corresponding to the ArchExtKind, this
120 // extensions representation in the bitfield.
121 StringRef Feature; // -mattr enable string, e.g. "+spe"
122 StringRef NegFeature; // -mattr disable string, e.g. "-spe"
123 CPUFeatures CPUFeature; // Function Multi Versioning (FMV) bitfield value
124 // set in __aarch64_cpu_features
125 StringRef DependentFeatures; // FMV enabled features string,
126 // e.g. "+dotprod,+fp-armv8,+neon"
127 unsigned FmvPriority; // FMV feature priority
128 static constexpr unsigned MaxFMVPriority =
129 1000; // Maximum priority for FMV feature
130};
131
132#define EMIT_EXTENSIONS
133#include "llvm/TargetParser/AArch64TargetParserDef.inc"
134
135struct ExtensionSet {
136 // Set of extensions which are currently enabled.
137 ExtensionBitset Enabled;
138 // Set of extensions which have been enabled or disabled at any point. Used
139 // to avoid cluttering the cc1 command-line with lots of unneeded features.
140 ExtensionBitset Touched;
141 // Base architecture version, which we need to know because some feature
142 // dependencies change depending on this.
143 const ArchInfo *BaseArch;
144
145 ExtensionSet() : Enabled(), Touched(), BaseArch(nullptr) {}
146
147 // Enable the given architecture extension, and any other extensions it
148 // depends on. Does not change the base architecture, or follow dependencies
149 // between features which are only related by required arcitecture versions.
150 void enable(ArchExtKind E);
151
152 // Disable the given architecture extension, and any other extensions which
153 // depend on it. Does not change the base architecture, or follow
154 // dependencies between features which are only related by required
155 // arcitecture versions.
156 void disable(ArchExtKind E);
157
158 // Add default extensions for the given CPU. Records the base architecture,
159 // to later resolve dependencies which depend on it.
160 void addCPUDefaults(const CpuInfo &CPU);
161
162 // Add default extensions for the given architecture version. Records the
163 // base architecture, to later resolve dependencies which depend on it.
164 void addArchDefaults(const ArchInfo &Arch);
165
166 // Add or remove a feature based on a modifier string. The string must be of
167 // the form "<name>" to enable a feature or "no<name>" to disable it. This
168 // will also enable or disable any features as required by the dependencies
169 // between them.
170 bool parseModifier(StringRef Modifier);
171
172 // Convert the set of enabled extension to an LLVM feature list, appending
173 // them to Features.
174 void toLLVMFeatureList(std::vector<StringRef> &Features) const;
175};
176
177// Represents a dependency between two architecture extensions. Later is the
178// feature which was added to the architecture after Earlier, and expands the
179// functionality provided by it. If Later is enabled, then Earlier will also be
180// enabled. If Earlier is disabled, then Later will also be disabled.
181struct ExtensionDependency {
182 ArchExtKind Earlier;
183 ArchExtKind Later;
184};
185
186#define EMIT_EXTENSION_DEPENDENCIES
187#include "llvm/TargetParser/AArch64TargetParserDef.inc"
188
189enum ArchProfile { AProfile = 'A', RProfile = 'R', InvalidProfile = '?' };
190
191// Information about a specific architecture, e.g. V8.1-A
192struct ArchInfo {
193 VersionTuple Version; // Architecture version, major + minor.
194 ArchProfile Profile; // Architecuture profile
195 StringRef Name; // Name as supplied to -march e.g. "armv8.1-a"
196 StringRef ArchFeature; // Name as supplied to -target-feature, e.g. "+v8a"
197 AArch64::ExtensionBitset
198 DefaultExts; // bitfield of default extensions ArchExtKind
199
200 bool operator==(const ArchInfo &Other) const {
201 return this->Name == Other.Name;
202 }
203 bool operator!=(const ArchInfo &Other) const {
204 return this->Name != Other.Name;
205 }
206
207 // Defines the following partial order, indicating when an architecture is
208 // a superset of another:
209 //
210 // v9.5a > v9.4a > v9.3a > v9.2a > v9.1a > v9a;
211 // v v v v v
212 // v8.9a > v8.8a > v8.7a > v8.6a > v8.5a > v8.4a > ... > v8a;
213 //
214 // v8r has no relation to anything. This is used to determine which
215 // features to enable for a given architecture. See
216 // AArch64TargetInfo::setFeatureEnabled.
217 bool implies(const ArchInfo &Other) const {
218 if (this->Profile != Other.Profile)
219 return false; // ARMV8R
220 if (this->Version.getMajor() == Other.Version.getMajor()) {
221 return this->Version > Other.Version;
222 }
223 if (this->Version.getMajor() == 9 && Other.Version.getMajor() == 8) {
224 assert(this->Version.getMinor() && Other.Version.getMinor() &&
225 "AArch64::ArchInfo should have a minor version.");
226 return this->Version.getMinor().value_or(0) + 5 >=
227 Other.Version.getMinor().value_or(0);
228 }
229 return false;
230 }
231
232 // True if this architecture is a superset of Other (including being equal to
233 // it).
234 bool is_superset(const ArchInfo &Other) const {
235 return (*this == Other) || implies(Other);
236 }
237
238 // Return ArchFeature without the leading "+".
239 StringRef getSubArch() const { return ArchFeature.substr(1); }
240
241 // Search for ArchInfo by SubArch name
242 static std::optional<ArchInfo> findBySubArch(StringRef SubArch);
243};
244
245#define EMIT_ARCHITECTURES
246#include "llvm/TargetParser/AArch64TargetParserDef.inc"
247
248// Details of a specific CPU.
249struct CpuInfo {
250 StringRef Name; // Name, as written for -mcpu.
251 const ArchInfo &Arch;
252 AArch64::ExtensionBitset
253 DefaultExtensions; // Default extensions for this CPU. These will be
254 // ORd with the architecture defaults.
255
256 AArch64::ExtensionBitset getImpliedExtensions() const {
257 AArch64::ExtensionBitset ImpliedExts;
258 ImpliedExts |= DefaultExtensions;
259 ImpliedExts |= Arch.DefaultExts;
260 return ImpliedExts;
261 }
262};
263
264inline constexpr CpuInfo CpuInfos[] = {
265 {"cortex-a34", ARMV8A,
266 AArch64::ExtensionBitset(
267 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})},
268 {"cortex-a35", ARMV8A,
269 AArch64::ExtensionBitset(
270 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})},
271 {"cortex-a53", ARMV8A,
272 AArch64::ExtensionBitset(
273 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})},
274 {"cortex-a55", ARMV8_2A,
275 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
276 AArch64::AEK_FP16, AArch64::AEK_DOTPROD,
277 AArch64::AEK_RCPC})},
278 {"cortex-a510", ARMV9A,
279 AArch64::ExtensionBitset(
280 {AArch64::AEK_BF16, AArch64::AEK_I8MM, AArch64::AEK_SB,
281 AArch64::AEK_PAUTH, AArch64::AEK_MTE, AArch64::AEK_SSBS,
282 AArch64::AEK_SVE, AArch64::AEK_SVE2, AArch64::AEK_SVE2BITPERM,
283 AArch64::AEK_FP16FML})},
284 {"cortex-a520", ARMV9_2A,
285 AArch64::ExtensionBitset(
286 {AArch64::AEK_SB, AArch64::AEK_SSBS, AArch64::AEK_MTE,
287 AArch64::AEK_FP16FML, AArch64::AEK_PAUTH, AArch64::AEK_SVE2BITPERM,
288 AArch64::AEK_FLAGM, AArch64::AEK_PERFMON, AArch64::AEK_PREDRES})},
289 {"cortex-a520ae", ARMV9_2A,
290 AArch64::ExtensionBitset(
291 {AArch64::AEK_SB, AArch64::AEK_SSBS, AArch64::AEK_MTE,
292 AArch64::AEK_FP16FML, AArch64::AEK_PAUTH, AArch64::AEK_SVE2BITPERM,
293 AArch64::AEK_FLAGM, AArch64::AEK_PERFMON, AArch64::AEK_PREDRES})},
294 {"cortex-a57", ARMV8A,
295 AArch64::ExtensionBitset(
296 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})},
297 {"cortex-a65", ARMV8_2A,
298 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
299 AArch64::AEK_DOTPROD, AArch64::AEK_FP16,
300 AArch64::AEK_RCPC, AArch64::AEK_SSBS})},
301 {"cortex-a65ae", ARMV8_2A,
302 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
303 AArch64::AEK_DOTPROD, AArch64::AEK_FP16,
304 AArch64::AEK_RCPC, AArch64::AEK_SSBS})},
305 {"cortex-a72", ARMV8A,
306 AArch64::ExtensionBitset(
307 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})},
308 {"cortex-a73", ARMV8A,
309 AArch64::ExtensionBitset(
310 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})},
311 {"cortex-a75", ARMV8_2A,
312 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
313 AArch64::AEK_FP16, AArch64::AEK_DOTPROD,
314 AArch64::AEK_RCPC})},
315 {"cortex-a76", ARMV8_2A,
316 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
317 AArch64::AEK_FP16, AArch64::AEK_DOTPROD,
318 AArch64::AEK_RCPC, AArch64::AEK_SSBS})},
319 {"cortex-a76ae", ARMV8_2A,
320 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
321 AArch64::AEK_FP16, AArch64::AEK_DOTPROD,
322 AArch64::AEK_RCPC, AArch64::AEK_SSBS})},
323 {"cortex-a77", ARMV8_2A,
324 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
325 AArch64::AEK_FP16, AArch64::AEK_RCPC,
326 AArch64::AEK_DOTPROD, AArch64::AEK_SSBS})},
327 {"cortex-a78", ARMV8_2A,
328 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
329 AArch64::AEK_FP16, AArch64::AEK_DOTPROD,
330 AArch64::AEK_RCPC, AArch64::AEK_SSBS,
331 AArch64::AEK_PROFILE})},
332 {"cortex-a78ae", ARMV8_2A,
333 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
334 AArch64::AEK_FP16, AArch64::AEK_DOTPROD,
335 AArch64::AEK_RCPC, AArch64::AEK_SSBS,
336 AArch64::AEK_PROFILE})},
337 {"cortex-a78c", ARMV8_2A,
338 AArch64::ExtensionBitset(
339 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16,
340 AArch64::AEK_DOTPROD, AArch64::AEK_RCPC, AArch64::AEK_SSBS,
341 AArch64::AEK_PROFILE, AArch64::AEK_FLAGM, AArch64::AEK_PAUTH})},
342 {"cortex-a710", ARMV9A,
343 AArch64::ExtensionBitset({AArch64::AEK_MTE, AArch64::AEK_PAUTH,
344 AArch64::AEK_FLAGM, AArch64::AEK_SB,
345 AArch64::AEK_I8MM, AArch64::AEK_FP16FML,
346 AArch64::AEK_SVE, AArch64::AEK_SVE2,
347 AArch64::AEK_SVE2BITPERM, AArch64::AEK_BF16})},
348 {"cortex-a715", ARMV9A,
349 AArch64::ExtensionBitset(
350 {AArch64::AEK_SB, AArch64::AEK_SSBS, AArch64::AEK_MTE,
351 AArch64::AEK_FP16, AArch64::AEK_FP16FML, AArch64::AEK_PAUTH,
352 AArch64::AEK_I8MM, AArch64::AEK_PREDRES, AArch64::AEK_PERFMON,
353 AArch64::AEK_PROFILE, AArch64::AEK_SVE, AArch64::AEK_SVE2BITPERM,
354 AArch64::AEK_BF16, AArch64::AEK_FLAGM})},
355 {"cortex-a720", ARMV9_2A,
356 AArch64::ExtensionBitset({AArch64::AEK_SB, AArch64::AEK_SSBS,
357 AArch64::AEK_MTE, AArch64::AEK_FP16FML,
358 AArch64::AEK_PAUTH, AArch64::AEK_SVE2BITPERM,
359 AArch64::AEK_FLAGM, AArch64::AEK_PERFMON,
360 AArch64::AEK_PREDRES, AArch64::AEK_PROFILE})},
361 {"cortex-a720ae", ARMV9_2A,
362 AArch64::ExtensionBitset({AArch64::AEK_SB, AArch64::AEK_SSBS,
363 AArch64::AEK_MTE, AArch64::AEK_FP16FML,
364 AArch64::AEK_PAUTH, AArch64::AEK_SVE2BITPERM,
365 AArch64::AEK_FLAGM, AArch64::AEK_PERFMON,
366 AArch64::AEK_PREDRES, AArch64::AEK_PROFILE})},
367 {"cortex-r82", ARMV8R,
368 AArch64::ExtensionBitset({AArch64::AEK_LSE, AArch64::AEK_FLAGM,
369 AArch64::AEK_PERFMON, AArch64::AEK_PREDRES})},
370 {"cortex-r82ae", ARMV8R,
371 AArch64::ExtensionBitset({AArch64::AEK_LSE, AArch64::AEK_FLAGM,
372 AArch64::AEK_PERFMON, AArch64::AEK_PREDRES})},
373 {"cortex-x1", ARMV8_2A,
374 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
375 AArch64::AEK_FP16, AArch64::AEK_DOTPROD,
376 AArch64::AEK_RCPC, AArch64::AEK_SSBS,
377 AArch64::AEK_PROFILE})},
378 {"cortex-x1c", ARMV8_2A,
379 AArch64::ExtensionBitset(
380 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16,
381 AArch64::AEK_DOTPROD, AArch64::AEK_RCPC, AArch64::AEK_SSBS,
382 AArch64::AEK_PAUTH, AArch64::AEK_PROFILE, AArch64::AEK_FLAGM})},
383 {"cortex-x2", ARMV9A,
384 AArch64::ExtensionBitset(
385 {AArch64::AEK_MTE, AArch64::AEK_BF16, AArch64::AEK_I8MM,
386 AArch64::AEK_PAUTH, AArch64::AEK_SSBS, AArch64::AEK_SB,
387 AArch64::AEK_SVE, AArch64::AEK_SVE2, AArch64::AEK_SVE2BITPERM,
388 AArch64::AEK_FP16FML, AArch64::AEK_FLAGM})},
389 {"cortex-x3", ARMV9A,
390 AArch64::ExtensionBitset(
391 {AArch64::AEK_SVE, AArch64::AEK_PERFMON, AArch64::AEK_PROFILE,
392 AArch64::AEK_BF16, AArch64::AEK_I8MM, AArch64::AEK_MTE,
393 AArch64::AEK_SVE2BITPERM, AArch64::AEK_SB, AArch64::AEK_PAUTH,
394 AArch64::AEK_FP16, AArch64::AEK_FP16FML, AArch64::AEK_PREDRES,
395 AArch64::AEK_FLAGM, AArch64::AEK_SSBS})},
396 {"cortex-x4", ARMV9_2A,
397 AArch64::ExtensionBitset({AArch64::AEK_SB, AArch64::AEK_SSBS,
398 AArch64::AEK_MTE, AArch64::AEK_FP16FML,
399 AArch64::AEK_PAUTH, AArch64::AEK_SVE2BITPERM,
400 AArch64::AEK_FLAGM, AArch64::AEK_PERFMON,
401 AArch64::AEK_PREDRES, AArch64::AEK_PROFILE})},
402 {"neoverse-e1", ARMV8_2A,
403 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
404 AArch64::AEK_DOTPROD, AArch64::AEK_FP16,
405 AArch64::AEK_RCPC, AArch64::AEK_SSBS})},
406 {"neoverse-n1", ARMV8_2A,
407 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
408 AArch64::AEK_DOTPROD, AArch64::AEK_FP16,
409 AArch64::AEK_PROFILE, AArch64::AEK_RCPC,
410 AArch64::AEK_SSBS})},
411 {"neoverse-n2", ARMV9A,
412 AArch64::ExtensionBitset(
413 {AArch64::AEK_BF16, AArch64::AEK_DOTPROD, AArch64::AEK_FP16,
414 AArch64::AEK_FP16FML, AArch64::AEK_I8MM, AArch64::AEK_MTE,
415 AArch64::AEK_SB, AArch64::AEK_SSBS, AArch64::AEK_SVE,
416 AArch64::AEK_SVE2, AArch64::AEK_SVE2BITPERM})},
417 {"neoverse-n3", ARMV9_2A,
418 AArch64::ExtensionBitset({AArch64::AEK_MTE, AArch64::AEK_SSBS,
419 AArch64::AEK_SB, AArch64::AEK_PREDRES,
420 AArch64::AEK_FP16FML, AArch64::AEK_PAUTH,
421 AArch64::AEK_FLAGM, AArch64::AEK_PERFMON,
422 AArch64::AEK_RAND, AArch64::AEK_SVE2BITPERM,
423 AArch64::AEK_PROFILE, AArch64::AEK_PERFMON})},
424 {"neoverse-512tvb", ARMV8_4A,
425 AArch64::ExtensionBitset(
426 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_SHA3,
427 AArch64::AEK_SM4, AArch64::AEK_SVE, AArch64::AEK_SSBS,
428 AArch64::AEK_FP16, AArch64::AEK_BF16, AArch64::AEK_DOTPROD,
429 AArch64::AEK_PROFILE, AArch64::AEK_RAND, AArch64::AEK_FP16FML,
430 AArch64::AEK_I8MM})},
431 {"neoverse-v1", ARMV8_4A,
432 AArch64::ExtensionBitset(
433 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_SHA3,
434 AArch64::AEK_SM4, AArch64::AEK_SVE, AArch64::AEK_SSBS,
435 AArch64::AEK_FP16, AArch64::AEK_BF16, AArch64::AEK_DOTPROD,
436 AArch64::AEK_PROFILE, AArch64::AEK_RAND, AArch64::AEK_FP16FML,
437 AArch64::AEK_I8MM})},
438 {"neoverse-v2", ARMV9A,
439 AArch64::ExtensionBitset(
440 {AArch64::AEK_SVE, AArch64::AEK_SVE2, AArch64::AEK_SSBS,
441 AArch64::AEK_FP16, AArch64::AEK_BF16, AArch64::AEK_RAND,
442 AArch64::AEK_DOTPROD, AArch64::AEK_PROFILE, AArch64::AEK_SVE2BITPERM,
443 AArch64::AEK_FP16FML, AArch64::AEK_I8MM, AArch64::AEK_MTE})},
444 {"neoverse-v3", ARMV9_2A,
445 AArch64::ExtensionBitset(
446 {AArch64::AEK_PROFILE, AArch64::AEK_MTE, AArch64::AEK_SSBS,
447 AArch64::AEK_SB, AArch64::AEK_PREDRES, AArch64::AEK_LS64,
448 AArch64::AEK_BRBE, AArch64::AEK_PAUTH, AArch64::AEK_FLAGM,
449 AArch64::AEK_PERFMON, AArch64::AEK_RAND, AArch64::AEK_SVE2BITPERM,
450 AArch64::AEK_FP16FML})},
451 {"neoverse-v3ae", ARMV9_2A,
452 (AArch64::ExtensionBitset(
453 {AArch64::AEK_PROFILE, AArch64::AEK_MTE, AArch64::AEK_SSBS,
454 AArch64::AEK_SB, AArch64::AEK_PREDRES, AArch64::AEK_LS64,
455 AArch64::AEK_BRBE, AArch64::AEK_PAUTH, AArch64::AEK_FLAGM,
456 AArch64::AEK_PERFMON, AArch64::AEK_RAND, AArch64::AEK_SVE2BITPERM,
457 AArch64::AEK_FP16FML}))},
458 {"cyclone", ARMV8A,
459 AArch64::ExtensionBitset(
460 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_NONE})},
461 {"apple-a7", ARMV8A,
462 AArch64::ExtensionBitset(
463 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_NONE})},
464 {"apple-a8", ARMV8A,
465 AArch64::ExtensionBitset(
466 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_NONE})},
467 {"apple-a9", ARMV8A,
468 AArch64::ExtensionBitset(
469 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_NONE})},
470 {"apple-a10", ARMV8A,
471 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
472 AArch64::AEK_CRC, AArch64::AEK_RDM})},
473 {"apple-a11", ARMV8_2A,
474 AArch64::ExtensionBitset(
475 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16})},
476 {"apple-a12", ARMV8_3A,
477 AArch64::ExtensionBitset(
478 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16})},
479 {"apple-a13", ARMV8_4A,
480 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
481 AArch64::AEK_SHA3, AArch64::AEK_FP16,
482 AArch64::AEK_FP16FML})},
483 {"apple-a14", ARMV8_5A,
484 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
485 AArch64::AEK_SHA3, AArch64::AEK_FP16,
486 AArch64::AEK_FP16FML})},
487 {"apple-a15", ARMV8_6A,
488 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
489 AArch64::AEK_SHA3, AArch64::AEK_FP16,
490 AArch64::AEK_FP16FML})},
491 {"apple-a16", ARMV8_6A,
492 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
493 AArch64::AEK_SHA3, AArch64::AEK_FP16,
494 AArch64::AEK_FP16FML})},
495 {"apple-a17", ARMV8_6A,
496 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
497 AArch64::AEK_SHA3, AArch64::AEK_FP16,
498 AArch64::AEK_FP16FML})},
499
500 {"apple-m1", ARMV8_5A,
501 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
502 AArch64::AEK_SHA3, AArch64::AEK_FP16,
503 AArch64::AEK_FP16FML})},
504 {"apple-m2", ARMV8_6A,
505 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
506 AArch64::AEK_SHA3, AArch64::AEK_FP16,
507 AArch64::AEK_FP16FML})},
508 {"apple-m3", ARMV8_6A,
509 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
510 AArch64::AEK_SHA3, AArch64::AEK_FP16,
511 AArch64::AEK_FP16FML})},
512
513 {"apple-s4", ARMV8_3A,
514 AArch64::ExtensionBitset(
515 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16})},
516 {"apple-s5", ARMV8_3A,
517 AArch64::ExtensionBitset(
518 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16})},
519 {"exynos-m3", ARMV8A,
520 AArch64::ExtensionBitset(
521 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})},
522 {"exynos-m4", ARMV8_2A,
523 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
524 AArch64::AEK_DOTPROD, AArch64::AEK_FP16})},
525 {"exynos-m5", ARMV8_2A,
526 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
527 AArch64::AEK_DOTPROD, AArch64::AEK_FP16})},
528 {"falkor", ARMV8A,
529 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
530 AArch64::AEK_CRC, AArch64::AEK_RDM})},
531 {"saphira", ARMV8_3A,
532 AArch64::ExtensionBitset(
533 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_PROFILE})},
534 {"kryo", ARMV8A,
535 AArch64::ExtensionBitset(
536 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})},
537 {"thunderx2t99", ARMV8_1A,
538 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2})},
539 {"thunderx3t110", ARMV8_3A,
540 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2})},
541 {"thunderx", ARMV8A,
542 AArch64::ExtensionBitset(
543 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})},
544 {"thunderxt88", ARMV8A,
545 AArch64::ExtensionBitset(
546 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})},
547 {"thunderxt81", ARMV8A,
548 AArch64::ExtensionBitset(
549 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})},
550 {"thunderxt83", ARMV8A,
551 AArch64::ExtensionBitset(
552 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})},
553 {"tsv110", ARMV8_2A,
554 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
555 AArch64::AEK_DOTPROD, AArch64::AEK_FP16,
556 AArch64::AEK_FP16FML, AArch64::AEK_PROFILE,
557 AArch64::AEK_JSCVT, AArch64::AEK_FCMA})},
558 {"a64fx", ARMV8_2A,
559 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
560 AArch64::AEK_FP16, AArch64::AEK_SVE})},
561 {"carmel", ARMV8_2A,
562 AArch64::ExtensionBitset(
563 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16})},
564 {"ampere1", ARMV8_6A,
565 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
566 AArch64::AEK_SHA3, AArch64::AEK_FP16,
567 AArch64::AEK_SB, AArch64::AEK_SSBS,
568 AArch64::AEK_RAND})},
569 {"ampere1a", ARMV8_6A,
570 AArch64::ExtensionBitset(
571 {AArch64::AEK_FP16, AArch64::AEK_RAND, AArch64::AEK_SM4,
572 AArch64::AEK_SHA3, AArch64::AEK_SHA2, AArch64::AEK_AES,
573 AArch64::AEK_MTE, AArch64::AEK_SB, AArch64::AEK_SSBS})},
574 {"ampere1b", ARMV8_7A,
575 AArch64::ExtensionBitset({AArch64::AEK_FP16, AArch64::AEK_RAND,
576 AArch64::AEK_SM4, AArch64::AEK_SHA3,
577 AArch64::AEK_SHA2, AArch64::AEK_AES,
578 AArch64::AEK_MTE, AArch64::AEK_SB,
579 AArch64::AEK_SSBS, AArch64::AEK_CSSC})},
580};
581
582// Name alias.
583struct Alias {
584 StringRef AltName;
585 StringRef Name;
586};
587
588inline constexpr Alias CpuAliases[] = {{"cobalt-100", "neoverse-n2"},
589 {"grace", "neoverse-v2"}};
590
591const ExtensionInfo &getExtensionByID(ArchExtKind(ExtID));
592
593bool getExtensionFeatures(
594 const AArch64::ExtensionBitset &Extensions,
595 std::vector<StringRef> &Features);
596
597StringRef getArchExtFeature(StringRef ArchExt);
598StringRef resolveCPUAlias(StringRef CPU);
599
600// Information by Name
601const ArchInfo *getArchForCpu(StringRef CPU);
602
603// Parser
604const ArchInfo *parseArch(StringRef Arch);
605std::optional<ExtensionInfo> parseArchExtension(StringRef Extension);
606// Given the name of a CPU or alias, return the correponding CpuInfo.
607std::optional<CpuInfo> parseCpu(StringRef Name);
608// Used by target parser tests
609void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values);
610
611bool isX18ReservedByDefault(const Triple &TT);
612
613// For given feature names, return a bitmask corresponding to the entries of
614// AArch64::CPUFeatures. The values in CPUFeatures are not bitmasks
615// themselves, they are sequential (0, 1, 2, 3, ...).
616uint64_t getCpuSupportsMask(ArrayRef<StringRef> FeatureStrs);
617
618void PrintSupportedExtensions(StringMap<StringRef> DescMap);
619
620} // namespace AArch64
621} // namespace llvm
622
623#endif
StringMap.h
This file defines the StringMap class.
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
Name
std::string Name
Definition: ELFObjHandler.cpp:77
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Extensions
static cl::opt< std::set< SPIRV::Extension::Extension >, false, SPIRVExtensionsParser > Extensions("spirv-ext", cl::desc("Specify list of enabled SPIR-V extensions"))
VersionTuple.h
Defines the llvm::VersionTuple class, which represents a version in the form major[....
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:586
llvm::StringMap
StringMap - This is an unconventional map that is specialized for handling keys that are "strings",...
Definition: StringMap.h:128
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
llvm::StringRef::substr
constexpr StringRef substr(size_t Start, size_t N=npos) const
Return a reference to the substring from [Start, Start + N).
Definition: StringRef.h:564
llvm::Triple
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
llvm::VersionTuple
Represents a version number in the form major[.minor[.subminor[.build]]].
Definition: VersionTuple.h:29
llvm::VersionTuple::getMajor
unsigned getMajor() const
Retrieve the major version number.
Definition: VersionTuple.h:71
llvm::VersionTuple::getMinor
std::optional< unsigned > getMinor() const
Retrieve the minor version number, if provided.
Definition: VersionTuple.h:74
uint64_t
llvm::AArch64::PrintSupportedExtensions
void PrintSupportedExtensions(StringMap< StringRef > DescMap)
Definition: AArch64TargetParser.cpp:137
llvm::AArch64::isX18ReservedByDefault
bool isX18ReservedByDefault(const Triple &TT)
Definition: AArch64TargetParser.cpp:97
llvm::AArch64::getArchExtFeature
StringRef getArchExtFeature(StringRef ArchExt)
Definition: AArch64TargetParser.cpp:77
llvm::AArch64::parseArchExtension
std::optional< ExtensionInfo > parseArchExtension(StringRef Extension)
Definition: AArch64TargetParser.cpp:117
llvm::AArch64::CpuInfos
constexpr CpuInfo CpuInfos[]
Definition: AArch64TargetParser.h:264
llvm::AArch64::parseCpu
std::optional< CpuInfo > parseCpu(StringRef Name)
Definition: AArch64TargetParser.cpp:125
llvm::AArch64::getCpuSupportsMask
uint64_t getCpuSupportsMask(ArrayRef< StringRef > FeatureStrs)
Definition: AArch64TargetParser.cpp:50
llvm::AArch64::parseArch
const ArchInfo * parseArch(StringRef Arch)
Definition: AArch64TargetParser.cpp:103
llvm::AArch64::getArchForCpu
const ArchInfo * getArchForCpu(StringRef CPU)
Definition: AArch64TargetParser.cpp:32
llvm::AArch64::fillValidCPUArchList
void fillValidCPUArchList(SmallVectorImpl< StringRef > &Values)
Definition: AArch64TargetParser.cpp:89
llvm::AArch64::getExtensionByID
const ExtensionInfo & getExtensionByID(ArchExtKind(ExtID))
llvm::AArch64::CpuAliases
constexpr Alias CpuAliases[]
Definition: AArch64TargetParser.h:588
llvm::AArch64::resolveCPUAlias
StringRef resolveCPUAlias(StringRef CPU)
Definition: AArch64TargetParser.cpp:70
llvm::AArch64::getExtensionFeatures
bool getExtensionFeatures(const AArch64::ExtensionBitset &Extensions, std::vector< StringRef > &Features)
Definition: AArch64TargetParser.cpp:59
llvm::AArch64::ExtensionBitset
Bitset< AEK_NUM_EXTENSIONS > ExtensionBitset
Definition: AArch64TargetParser.h:110
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::IRMemLocation::Other
@ Other
Any other memory.
llvm::AArch64::ArchInfo::is_superset
bool is_superset(const ArchInfo &Other) const
Definition: AArch64TargetParser.h:234
llvm::AArch64::ArchInfo::getSubArch
StringRef getSubArch() const
Definition: AArch64TargetParser.h:239
llvm::AArch64::ArchInfo::implies
bool implies(const ArchInfo &Other) const
Definition: AArch64TargetParser.h:217
llvm::AArch64::ArchInfo::DefaultExts
AArch64::ExtensionBitset DefaultExts
Definition: AArch64TargetParser.h:198
llvm::AArch64::ArchInfo::findBySubArch
static std::optional< ArchInfo > findBySubArch(StringRef SubArch)
Definition: AArch64TargetParser.cpp:43
llvm::AArch64::ArchInfo::operator==
bool operator==(const ArchInfo &Other) const
Definition: AArch64TargetParser.h:200
llvm::AArch64::ArchInfo::operator!=
bool operator!=(const ArchInfo &Other) const
Definition: AArch64TargetParser.h:203
llvm::AArch64::CpuInfo::getImpliedExtensions
AArch64::ExtensionBitset getImpliedExtensions() const
Definition: AArch64TargetParser.h:256
llvm::AArch64::CpuInfo::DefaultExtensions
AArch64::ExtensionBitset DefaultExtensions
Definition: AArch64TargetParser.h:253
llvm::AArch64::ExtensionInfo::Alias
std::optional< StringRef > Alias
Definition: AArch64TargetParser.h:118
llvm::AArch64::ExtensionInfo::MaxFMVPriority
static constexpr unsigned MaxFMVPriority
Definition: AArch64TargetParser.h:128
llvm::AArch64::ExtensionSet::addCPUDefaults
void addCPUDefaults(const CpuInfo &CPU)
Definition: AArch64TargetParser.cpp:231
llvm::AArch64::ExtensionSet::toLLVMFeatureList
void toLLVMFeatureList(std::vector< StringRef > &Features) const
Definition: AArch64TargetParser.cpp:216
llvm::AArch64::ExtensionSet::parseModifier
bool parseModifier(StringRef Modifier)
Definition: AArch64TargetParser.cpp:250
llvm::AArch64::ExtensionSet::addArchDefaults
void addArchDefaults(const ArchInfo &Arch)
Definition: AArch64TargetParser.cpp:241
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