llvm.org GIT mirror llvm / ff6ab17
Until we have a "ALIGN" pseudo instruction, have asm printer emitted a .align to ensure the instruction that follows a TBB (when the number of table entries is odd) is 2-byte aligned. Patch by Sandeep Patel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77705 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 11 years ago
2 changed file(s) with 8 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
987987 if (i != e-1)
988988 O << '\n';
989989 }
990
991 // Make sure the instruction that follows TBB is 2-byte aligned.
992 // FIXME: Constant island pass should insert an "ALIGN" instruction instead.
993 if (ByteOffset && (JTBBs.size() & 1)) {
994 O << '\n';
995 EmitAlignment(1);
996 }
990997 }
991998
992999 void ARMAsmPrinter::printTBAddrMode(const MachineInstr *MI, int OpNum) {
44 entry:
55 ; CHECK: bar:
66 ; CHECK: tbb
7 ; CHECK: .align 1
78
89 switch i32 %n.u, label %bb12 [i32 1, label %bb i32 2, label %bb6 i32 4, label %bb7 i32 5, label %bb8 i32 6, label %bb10 i32 7, label %bb1 i32 8, label %bb3 i32 9, label %bb4 i32 10, label %bb9 i32 11, label %bb2 i32 12, label %bb5 i32 13, label %bb11 ]
910 bb: