llvm.org GIT mirror llvm / ff11026
- Added MRegisterInfo::getCrossCopyRegClass() hook. For register classes where reg to reg copies are not possible, this returns another register class which registers in the specified register class can be copied to (and copy back from). - X86 copyRegToReg() now supports copying between EFLAGS and GR32 / GR64 registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42372 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 12 years ago
3 changed file(s) with 46 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
314314 return Reg >= FirstVirtualRegister;
315315 }
316316
317 /// getPhysicalRegisterRegClass - Returns the Register Class of a physical
318 /// register of the given type.
319 const TargetRegisterClass *getPhysicalRegisterRegClass(MVT::ValueType VT,
320 unsigned Reg) const;
321
317322 /// getAllocatableSet - Returns a bitset indexed by register number
318323 /// indicating if a register is allocatable or not. If a register class is
319324 /// specified, returns the subset for the class.
507512 unsigned DestReg, unsigned SrcReg,
508513 const TargetRegisterClass *DestRC,
509514 const TargetRegisterClass *SrcRC) const = 0;
515
516 /// getCrossCopyRegClass - Returns a legal register class to copy a register
517 /// in the specified class to or from. Returns NULL if it is possible to copy
518 /// between a two registers of the specified class.
519 virtual const TargetRegisterClass *
520 getCrossCopyRegClass(const TargetRegisterClass *RC) const {
521 return NULL;
522 }
510523
511524 /// reMaterialize - Re-issue the specified 'original' instruction at the
512525 /// specific location targeting a new destination register.
233233 const TargetRegisterClass *DestRC,
234234 const TargetRegisterClass *SrcRC) const {
235235 if (DestRC != SrcRC) {
236 // Moving EFLAGS to / from another register requires a push and a pop.
237 if (SrcRC == &X86::CCRRegClass) {
238 assert(SrcReg == X86::EFLAGS);
239 if (DestRC == &X86::GR64RegClass) {
240 BuildMI(MBB, MI, TII.get(X86::PUSHFQ));
241 BuildMI(MBB, MI, TII.get(X86::POP64r), DestReg);
242 return;
243 } else if (DestRC == &X86::GR32RegClass) {
244 BuildMI(MBB, MI, TII.get(X86::PUSHFD));
245 BuildMI(MBB, MI, TII.get(X86::POP32r), DestReg);
246 return;
247 }
248 } else if (DestRC == &X86::CCRRegClass) {
249 assert(DestReg == X86::EFLAGS);
250 if (SrcRC == &X86::GR64RegClass) {
251 BuildMI(MBB, MI, TII.get(X86::PUSH64r)).addReg(SrcReg);
252 BuildMI(MBB, MI, TII.get(X86::POPFQ));
253 return;
254 } else if (SrcRC == &X86::GR32RegClass) {
255 BuildMI(MBB, MI, TII.get(X86::PUSH32r)).addReg(SrcReg);
256 BuildMI(MBB, MI, TII.get(X86::POPFD));
257 return;
258 }
259 }
236260 cerr << "Not yet supported!";
237261 abort();
238262 }
271295 BuildMI(MBB, MI, TII.get(Opc), DestReg).addReg(SrcReg);
272296 }
273297
298 const TargetRegisterClass *
299 X86RegisterInfo::getCrossCopyRegClass(const TargetRegisterClass *RC) const {
300 if (RC == &X86::CCRRegClass)
301 return &X86::GR32RegClass;
302 return NULL;
303 }
274304
275305 void X86RegisterInfo::reMaterialize(MachineBasicBlock &MBB,
276306 MachineBasicBlock::iterator I,
8080 const TargetRegisterClass *DestRC,
8181 const TargetRegisterClass *SrcRC) const;
8282
83 const TargetRegisterClass *
84 getCrossCopyRegClass(const TargetRegisterClass *RC) const;
85
8386 void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
8487 unsigned DestReg, const MachineInstr *Orig) const;
8588