llvm.org GIT mirror llvm / fe4b92b
Revert "Add a late SSEDomainFix pass that twiddles SSE instructions to avoid domain crossings." This reverts commit 99345. It was breaking buildbots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99352 91177308-0d34-0410-b5e6-96231b3b80d8 Jakob Stoklund Olesen 10 years ago
7 changed file(s) with 0 addition(s) and 574 deletion(s). Raw diff Collapse all Expand all
1414 tablegen(X86GenSubtarget.inc -gen-subtarget)
1515
1616 set(sources
17 SSEDomainFix.cpp
1817 X86AsmBackend.cpp
1918 X86CodeEmitter.cpp
2019 X86COFFMachineModuleInfo.cpp
+0
-536
lib/Target/X86/SSEDomainFix.cpp less more
None //===- SSEDomainFix.cpp - Use proper int/float domain for SSE ---*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the SSEDomainFix pass.
10 //
11 // Some SSE instructions like mov, and, or, xor are available in different
12 // variants for different operand types. These variant instructions are
13 // equivalent, but on Nehalem and newer cpus there is extra latency
14 // transferring data between integer and floating point domains.
15 //
16 // This pass changes the variant instructions to minimize domain crossings.
17 //
18 //===----------------------------------------------------------------------===//
19
20 #define DEBUG_TYPE "sse-domain-fix"
21 #include "X86InstrInfo.h"
22 #include "llvm/CodeGen/MachineFunctionPass.h"
23 #include "llvm/ADT/DepthFirstIterator.h"
24 #include "llvm/Support/Debug.h"
25 #include "llvm/Support/raw_ostream.h"
26
27 using namespace llvm;
28
29 namespace {
30 class SSEDomainFixPass : public MachineFunctionPass {
31 static char ID;
32 const X86InstrInfo *TII;
33
34 MachineFunction *MF;
35 MachineBasicBlock *MBB;
36 public:
37 SSEDomainFixPass() : MachineFunctionPass(&ID) {}
38
39 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
40 AU.setPreservesAll();
41 MachineFunctionPass::getAnalysisUsage(AU);
42 }
43
44 virtual bool runOnMachineFunction(MachineFunction &MF);
45
46 virtual const char *getPassName() const {
47 return "SSE execution domain fixup";
48 }
49
50 private:
51 void enterBasicBlock(MachineBasicBlock *MBB);
52 };
53 }
54
55 void SSEDomainFixPass::enterBasicBlock(MachineBasicBlock *mbb) {
56 MBB = mbb;
57 DEBUG(dbgs() << "Entering MBB " << MBB->getName() << "\n");
58 }
59
60 bool SSEDomainFixPass::runOnMachineFunction(MachineFunction &mf) {
61 MF = &mf;
62 TII = static_cast(MF->getTarget().getInstrInfo());
63
64 MachineBasicBlock *Entry = MF->begin();
65 SmallPtrSet Visited;
66 for (df_ext_iterator
67 SmallPtrSet >
68 DFI = df_ext_begin(Entry, Visited), DFE = df_ext_end(Entry, Visited);
69 DFI != DFE; ++DFI) {
70 enterBasicBlock(*DFI);
71 for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end(); I != E;
72 ++I) {
73 MachineInstr *MI = I;
74 const unsigned *equiv = 0;
75 X86InstrInfo::SSEDomain domain = TII->GetSSEDomain(MI, equiv);
76 DEBUG(dbgs() << "isd-"[domain] << (equiv ? "* " : " ") << *MI);
77 }
78 }
79 return false;
80 }
81
82 FunctionPass *llvm::createSSEDomainFixPass() {
83 return new SSEDomainFixPass();
84 }
85
86 // These are the replaceable instructions. Some of these have _Int variants
87 // that we don't include here. We don't want to replace instructions selected
88 // by intrinsics.
89 static const unsigned ReplaceableInstrs[][3] = {
90 //PackedInt PackedSingle PackedDouble
91 { X86::MOVDQAmr, X86::MOVAPSmr, X86::MOVAPDmr },
92 { X86::MOVDQArm, X86::MOVAPSrm, X86::MOVAPDrm },
93 { X86::MOVDQArr, X86::MOVAPSrr, X86::MOVAPDrr },
94 { X86::MOVDQUmr, X86::MOVUPSmr, X86::MOVUPDmr },
95 { X86::MOVDQUrm, X86::MOVUPSrm, X86::MOVUPDrm },
96 { X86::MOVNTDQmr, X86::MOVNTPSmr, X86::MOVNTPDmr },
97 { X86::PANDNrm, X86::ANDNPSrm, X86::ANDNPDrm },
98 { X86::PANDNrr, X86::ANDNPSrr, X86::ANDNPDrr },
99 { X86::PANDrm, X86::ANDPSrm, X86::ANDPDrm },
100 { X86::PANDrr, X86::ANDPSrr, X86::ANDPDrr },
101 { X86::PORrm, X86::ORPSrm, X86::ORPDrm },
102 { X86::PORrr, X86::ORPSrr, X86::ORPDrr },
103 { X86::PUNPCKHQDQrm, X86::UNPCKHPSrm, X86::UNPCKHPDrm },
104 { X86::PUNPCKHQDQrr, X86::UNPCKHPSrr, X86::UNPCKHPDrr },
105 { X86::PUNPCKLQDQrm, X86::UNPCKLPSrm, X86::UNPCKLPDrm },
106 { X86::PUNPCKLQDQrr, X86::UNPCKLPSrr, X86::UNPCKLPDrr },
107 { X86::PXORrm, X86::XORPSrm, X86::XORPDrm },
108 { X86::PXORrr, X86::XORPSrr, X86::XORPDrr },
109 };
110
111 void X86InstrInfo::populateSSEInstrDomainTable() {
112 // Instructions that execute in the packed integer domain.
113 static const unsigned PackedIntInstrs[] = {
114 X86::LDDQUrm,
115 X86::MASKMOVDQU,
116 X86::MASKMOVDQU64,
117 X86::MOVDI2PDIrm,
118 X86::MOVDI2PDIrr,
119 X86::MOVDQUmr_Int,
120 X86::MOVDQUrm_Int,
121 X86::MOVLQ128mr,
122 X86::MOVNTDQArm,
123 X86::MOVNTDQmr_Int,
124 X86::MOVNTDQ_64mr,
125 X86::MOVPDI2DImr,
126 X86::MOVPDI2DIrr,
127 X86::MOVPQI2QImr,
128 X86::MOVPQIto64rr,
129 X86::MOVQI2PQIrm,
130 X86::MOVQxrxr,
131 X86::MOVZDI2PDIrm,
132 X86::MOVZDI2PDIrr,
133 X86::MOVZPQILo2PQIrm,
134 X86::MOVZPQILo2PQIrr,
135 X86::MOVZQI2PQIrm,
136 X86::MOVZQI2PQIrr,
137 X86::MPSADBWrmi,
138 X86::MPSADBWrri,
139 X86::PABSBrm128,
140 X86::PABSBrr128,
141 X86::PABSDrm128,
142 X86::PABSDrr128,
143 X86::PABSWrm128,
144 X86::PABSWrr128,
145 X86::PACKSSDWrm,
146 X86::PACKSSDWrr,
147 X86::PACKSSWBrm,
148 X86::PACKSSWBrr,
149 X86::PACKUSDWrm,
150 X86::PACKUSDWrr,
151 X86::PACKUSWBrm,
152 X86::PACKUSWBrr,
153 X86::PADDBrm,
154 X86::PADDBrr,
155 X86::PADDDrm,
156 X86::PADDDrr,
157 X86::PADDQrm,
158 X86::PADDQrr,
159 X86::PADDSBrm,
160 X86::PADDSBrr,
161 X86::PADDSWrm,
162 X86::PADDSWrr,
163 X86::PADDUSBrm,
164 X86::PADDUSBrr,
165 X86::PADDUSWrm,
166 X86::PADDUSWrr,
167 X86::PADDWrm,
168 X86::PADDWrr,
169 X86::PALIGNR128rm,
170 X86::PALIGNR128rr,
171 X86::PAVGBrm,
172 X86::PAVGBrr,
173 X86::PAVGWrm,
174 X86::PAVGWrr,
175 X86::PBLENDVBrm0,
176 X86::PBLENDVBrr0,
177 X86::PBLENDWrmi,
178 X86::PBLENDWrri,
179 X86::PCMPEQBrm,
180 X86::PCMPEQBrr,
181 X86::PCMPEQDrm,
182 X86::PCMPEQDrr,
183 X86::PCMPEQQrm,
184 X86::PCMPEQQrr,
185 X86::PCMPEQWrm,
186 X86::PCMPEQWrr,
187 X86::PCMPESTRIArm,
188 X86::PCMPESTRIArr,
189 X86::PCMPESTRICrm,
190 X86::PCMPESTRICrr,
191 X86::PCMPESTRIOrm,
192 X86::PCMPESTRIOrr,
193 X86::PCMPESTRIrm,
194 X86::PCMPESTRIrr,
195 X86::PCMPESTRISrm,
196 X86::PCMPESTRISrr,
197 X86::PCMPESTRIZrm,
198 X86::PCMPESTRIZrr,
199 X86::PCMPESTRM128MEM,
200 X86::PCMPESTRM128REG,
201 X86::PCMPESTRM128rm,
202 X86::PCMPESTRM128rr,
203 X86::PCMPGTBrm,
204 X86::PCMPGTBrr,
205 X86::PCMPGTDrm,
206 X86::PCMPGTDrr,
207 X86::PCMPGTQrm,
208 X86::PCMPGTQrr,
209 X86::PCMPGTWrm,
210 X86::PCMPGTWrr,
211 X86::PCMPISTRIArm,
212 X86::PCMPISTRIArr,
213 X86::PCMPISTRICrm,
214 X86::PCMPISTRICrr,
215 X86::PCMPISTRIOrm,
216 X86::PCMPISTRIOrr,
217 X86::PCMPISTRIrm,
218 X86::PCMPISTRIrr,
219 X86::PCMPISTRISrm,
220 X86::PCMPISTRISrr,
221 X86::PCMPISTRIZrm,
222 X86::PCMPISTRIZrr,
223 X86::PCMPISTRM128MEM,
224 X86::PCMPISTRM128REG,
225 X86::PCMPISTRM128rm,
226 X86::PCMPISTRM128rr,
227 X86::PEXTRBmr,
228 X86::PEXTRBrr,
229 X86::PEXTRDmr,
230 X86::PEXTRDrr,
231 X86::PEXTRQmr,
232 X86::PEXTRQrr,
233 X86::PEXTRWmr,
234 X86::PEXTRWri,
235 X86::PHADDDrm128,
236 X86::PHADDDrr128,
237 X86::PHADDSWrm128,
238 X86::PHADDSWrr128,
239 X86::PHADDWrm128,
240 X86::PHADDWrr128,
241 X86::PHMINPOSUWrm128,
242 X86::PHMINPOSUWrr128,
243 X86::PHSUBDrm128,
244 X86::PHSUBDrr128,
245 X86::PHSUBSWrm128,
246 X86::PHSUBSWrr128,
247 X86::PHSUBWrm128,
248 X86::PHSUBWrr128,
249 X86::PINSRBrm,
250 X86::PINSRBrr,
251 X86::PINSRDrm,
252 X86::PINSRDrr,
253 X86::PINSRQrm,
254 X86::PINSRQrr,
255 X86::PINSRWrmi,
256 X86::PINSRWrri,
257 X86::PMADDUBSWrm128,
258 X86::PMADDUBSWrr128,
259 X86::PMADDWDrm,
260 X86::PMADDWDrr,
261 X86::PMAXSBrm,
262 X86::PMAXSBrr,
263 X86::PMAXSDrm,
264 X86::PMAXSDrr,
265 X86::PMAXSWrm,
266 X86::PMAXSWrr,
267 X86::PMAXUBrm,
268 X86::PMAXUBrr,
269 X86::PMAXUDrm,
270 X86::PMAXUDrr,
271 X86::PMAXUWrm,
272 X86::PMAXUWrr,
273 X86::PMINSBrm,
274 X86::PMINSBrr,
275 X86::PMINSDrm,
276 X86::PMINSDrr,
277 X86::PMINSWrm,
278 X86::PMINSWrr,
279 X86::PMINUBrm,
280 X86::PMINUBrr,
281 X86::PMINUDrm,
282 X86::PMINUDrr,
283 X86::PMINUWrm,
284 X86::PMINUWrr,
285 X86::PMOVSXBDrm,
286 X86::PMOVSXBDrr,
287 X86::PMOVSXBQrm,
288 X86::PMOVSXBQrr,
289 X86::PMOVSXBWrm,
290 X86::PMOVSXBWrr,
291 X86::PMOVSXDQrm,
292 X86::PMOVSXDQrr,
293 X86::PMOVSXWDrm,
294 X86::PMOVSXWDrr,
295 X86::PMOVSXWQrm,
296 X86::PMOVSXWQrr,
297 X86::PMOVZXBDrm,
298 X86::PMOVZXBDrr,
299 X86::PMOVZXBQrm,
300 X86::PMOVZXBQrr,
301 X86::PMOVZXBWrm,
302 X86::PMOVZXBWrr,
303 X86::PMOVZXDQrm,
304 X86::PMOVZXDQrr,
305 X86::PMOVZXWDrm,
306 X86::PMOVZXWDrr,
307 X86::PMOVZXWQrm,
308 X86::PMOVZXWQrr,
309 X86::PMULDQrm,
310 X86::PMULDQrr,
311 X86::PMULHRSWrm128,
312 X86::PMULHRSWrr128,
313 X86::PMULHUWrm,
314 X86::PMULHUWrr,
315 X86::PMULHWrm,
316 X86::PMULHWrr,
317 X86::PMULLDrm,
318 X86::PMULLDrm_int,
319 X86::PMULLDrr,
320 X86::PMULLDrr_int,
321 X86::PMULLWrm,
322 X86::PMULLWrr,
323 X86::PMULUDQrm,
324 X86::PMULUDQrr,
325 X86::PSADBWrm,
326 X86::PSADBWrr,
327 X86::PSHUFBrm128,
328 X86::PSHUFBrr128,
329 X86::PSHUFHWmi,
330 X86::PSHUFHWri,
331 X86::PSHUFLWmi,
332 X86::PSHUFLWri,
333 X86::PSIGNBrm128,
334 X86::PSIGNBrr128,
335 X86::PSIGNDrm128,
336 X86::PSIGNDrr128,
337 X86::PSIGNWrm128,
338 X86::PSIGNWrr128,
339 X86::PSLLDQri,
340 X86::PSLLDri,
341 X86::PSLLDrm,
342 X86::PSLLDrr,
343 X86::PSLLQri,
344 X86::PSLLQrm,
345 X86::PSLLQrr,
346 X86::PSLLWri,
347 X86::PSLLWrm,
348 X86::PSLLWrr,
349 X86::PSRADri,
350 X86::PSRADrm,
351 X86::PSRADrr,
352 X86::PSRAWri,
353 X86::PSRAWrm,
354 X86::PSRAWrr,
355 X86::PSRLDQri,
356 X86::PSRLDri,
357 X86::PSRLDrm,
358 X86::PSRLDrr,
359 X86::PSRLQri,
360 X86::PSRLQrm,
361 X86::PSRLQrr,
362 X86::PSRLWri,
363 X86::PSRLWrm,
364 X86::PSRLWrr,
365 X86::PSUBBrm,
366 X86::PSUBBrr,
367 X86::PSUBDrm,
368 X86::PSUBDrr,
369 X86::PSUBQrm,
370 X86::PSUBQrr,
371 X86::PSUBSBrm,
372 X86::PSUBSBrr,
373 X86::PSUBSWrm,
374 X86::PSUBSWrr,
375 X86::PSUBUSBrm,
376 X86::PSUBUSBrr,
377 X86::PSUBUSWrm,
378 X86::PSUBUSWrr,
379 X86::PSUBWrm,
380 X86::PSUBWrr,
381 X86::PUNPCKHBWrm,
382 X86::PUNPCKHBWrr,
383 X86::PUNPCKHWDrm,
384 X86::PUNPCKHWDrr,
385 X86::PUNPCKLBWrm,
386 X86::PUNPCKLBWrr,
387 X86::PUNPCKLWDrm,
388 X86::PUNPCKLWDrr,
389 };
390
391 // Instructions that execute in the packed single domain.
392 static const unsigned PackedSingleInstrs[] = {
393 X86::ADDPSrm,
394 X86::ADDPSrr,
395 X86::ADDSUBPSrm,
396 X86::ADDSUBPSrr,
397 X86::BLENDPSrmi,
398 X86::BLENDPSrri,
399 X86::BLENDVPSrm0,
400 X86::BLENDVPSrr0,
401 X86::CMPPSrmi,
402 X86::CMPPSrri,
403 X86::DIVPSrm,
404 X86::DIVPSrr,
405 X86::DPPSrmi,
406 X86::DPPSrri,
407 X86::EXTRACTPSmr,
408 X86::EXTRACTPSrr,
409 X86::HADDPSrm,
410 X86::HADDPSrr,
411 X86::HSUBPSrm,
412 X86::HSUBPSrr,
413 X86::INSERTPSrm,
414 X86::INSERTPSrr,
415 X86::MAXPSrm,
416 X86::MAXPSrm_Int,
417 X86::MAXPSrr,
418 X86::MAXPSrr_Int,
419 X86::MINPSrm,
420 X86::MINPSrm_Int,
421 X86::MINPSrr,
422 X86::MINPSrr_Int,
423 X86::MOVHLPSrr,
424 X86::MOVHPSmr,
425 X86::MOVHPSrm,
426 X86::MOVLHPSrr,
427 X86::MOVLPSmr,
428 X86::MOVLPSrm,
429 X86::MOVMSKPSrr,
430 X86::MOVNTPSmr_Int,
431 X86::MOVSHDUPrm,
432 X86::MOVSHDUPrr,
433 X86::MOVSLDUPrm,
434 X86::MOVSLDUPrr,
435 X86::MOVUPSmr_Int,
436 X86::MOVUPSrm_Int,
437 X86::MULPSrm,
438 X86::MULPSrr,
439 X86::RCPPSm,
440 X86::RCPPSm_Int,
441 X86::RCPPSr,
442 X86::RCPPSr_Int,
443 X86::ROUNDPSm_Int,
444 X86::ROUNDPSr_Int,
445 X86::RSQRTPSm,
446 X86::RSQRTPSm_Int,
447 X86::RSQRTPSr,
448 X86::RSQRTPSr_Int,
449 X86::SQRTPSm,
450 X86::SQRTPSm_Int,
451 X86::SQRTPSr,
452 X86::SQRTPSr_Int,
453 X86::SUBPSrm,
454 X86::SUBPSrr,
455 };
456
457 // Instructions that execute in the packed double domain.
458 static const unsigned PackedDoubleInstrs[] = {
459 X86::ADDPDrm,
460 X86::ADDPDrr,
461 X86::ADDSUBPDrm,
462 X86::ADDSUBPDrr,
463 X86::BLENDPDrmi,
464 X86::BLENDPDrri,
465 X86::BLENDVPDrm0,
466 X86::BLENDVPDrr0,
467 X86::CMPPDrmi,
468 X86::CMPPDrri,
469 X86::DIVPDrm,
470 X86::DIVPDrr,
471 X86::DPPDrmi,
472 X86::DPPDrri,
473 X86::HADDPDrm,
474 X86::HADDPDrr,
475 X86::HSUBPDrm,
476 X86::HSUBPDrr,
477 X86::MAXPDrm,
478 X86::MAXPDrm_Int,
479 X86::MAXPDrr,
480 X86::MAXPDrr_Int,
481 X86::MINPDrm,
482 X86::MINPDrm_Int,
483 X86::MINPDrr,
484 X86::MINPDrr_Int,
485 X86::MOVHPDmr,
486 X86::MOVHPDrm,
487 X86::MOVLPDmr,
488 X86::MOVLPDrm,
489 X86::MOVMSKPDrr,
490 X86::MOVNTPDmr_Int,
491 X86::MOVUPDmr_Int,
492 X86::MOVUPDrm_Int,
493 X86::MULPDrm,
494 X86::MULPDrr,
495 X86::ROUNDPDm_Int,
496 X86::ROUNDPDr_Int,
497 X86::SQRTPDm,
498 X86::SQRTPDm_Int,
499 X86::SQRTPDr,
500 X86::SQRTPDr_Int,
501 X86::SUBPDrm,
502 X86::SUBPDrr,
503 };
504
505 // Add non-negative entries for forcing instructions.
506 for (unsigned i = 0, e = array_lengthof(PackedIntInstrs); i != e; ++i)
507 SSEInstrDomainTable.insert(std::make_pair(PackedIntInstrs[i],
508 PackedInt));
509 for (unsigned i = 0, e = array_lengthof(PackedSingleInstrs); i != e; ++i)
510 SSEInstrDomainTable.insert(std::make_pair(PackedSingleInstrs[i],
511 PackedSingle));
512 for (unsigned i = 0, e = array_lengthof(PackedDoubleInstrs); i != e; ++i)
513 SSEInstrDomainTable.insert(std::make_pair(PackedDoubleInstrs[i],
514 PackedDouble));
515
516 // Add row number + 1 for replaceable instructions.
517 for (unsigned i = 0, e = array_lengthof(ReplaceableInstrs); i != e; ++i)
518 for (unsigned c = 0; c != 3; ++c)
519 SSEInstrDomainTable.insert(std::make_pair(ReplaceableInstrs[i][c],
520 c + 4*(i+1)));
521 }
522
523 X86InstrInfo::SSEDomain X86InstrInfo::GetSSEDomain(const MachineInstr *MI,
524 const unsigned *&equiv) const {
525 DenseMap::const_iterator i =
526 SSEInstrDomainTable.find(MI->getOpcode());
527 if (i == SSEInstrDomainTable.end())
528 return NotSSEDomain;
529 unsigned value = i->second;
530 if (value/4)
531 equiv = ReplaceableInstrs[value/4 - 1];
532 else
533 equiv = 0;
534 return SSEDomain(value & 3);
535 }
4040 ///
4141 FunctionPass *createX86FloatingPointStackifierPass();
4242
43 /// createSSEDomainFixPass - This pass twiddles SSE opcodes to prevent domain
44 /// crossings.
45 FunctionPass *createSSEDomainFixPass();
46
4743 /// createX87FPRegKillInserterPass - This function returns a pass which
4844 /// inserts FP_REG_KILL instructions where needed.
4945 ///
664664
665665 // Remove ambiguous entries.
666666 assert(AmbEntries.empty() && "Duplicated entries in unfolding maps?");
667
668 if (TM.getSubtarget().hasSSE2())
669 populateSSEInstrDomainTable();
670667 }
671668
672669 bool X86InstrInfo::isMoveInstr(const MachineInstr& MI,
485485 /// MemOp2RegOpTable - Load / store unfolding opcode map.
486486 ///
487487 DenseMap > MemOp2RegOpTable;
488
489 /// SSEInstrDomainTable - Map SSE opcodes to execution domain info.
490 DenseMap SSEInstrDomainTable;
491488
492489 public:
493490 explicit X86InstrInfo(X86TargetMachine &tm);
718715 ///
719716 unsigned getGlobalBaseReg(MachineFunction *MF) const;
720717
721 /// Some SSE instructions come in variants for three domains.
722 enum SSEDomain { PackedInt, PackedSingle, PackedDouble, NotSSEDomain };
723
724 /// GetSSEDomain - Return the SSE execution domain of MI, or NotSSEDomain for
725 /// unknown instructions. If the instruction has equivalents for other domain,
726 /// equiv points to a list of opcodes index by domain.
727 SSEDomain GetSSEDomain(const MachineInstr *MI, const unsigned *&equiv) const;
728
729718 private:
730719 MachineInstr * convertToThreeAddressWithLEA(unsigned MIOpc,
731720 MachineFunction::iterator &MFI,
742731 /// operand and follow operands form a reference to the stack frame.
743732 bool isFrameOperand(const MachineInstr *MI, unsigned int Op,
744733 int &FrameIndex) const;
745
746 // Implemented in SSEDomainFix.cpp
747 void populateSSEInstrDomainTable();
748734 };
749735
750736 } // End llvm namespace
1616 #include "llvm/PassManager.h"
1717 #include "llvm/CodeGen/MachineFunction.h"
1818 #include "llvm/CodeGen/Passes.h"
19 #include "llvm/Support/CommandLine.h"
2019 #include "llvm/Support/FormattedStream.h"
2120 #include "llvm/Target/TargetOptions.h"
2221 #include "llvm/Target/TargetRegistry.h"
2322 using namespace llvm;
24
25 static cl::opt
26 SSEDomainFix("sse-domain-fix",
27 cl::desc("Enable fixing of SSE execution domain"),
28 cl::init(false), cl::Hidden);
2923
3024 static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
3125 Triple TheTriple(TT);
174168 return true; // -print-machineinstr should print after this.
175169 }
176170
177 bool X86TargetMachine::addPreEmitPass(PassManagerBase &PM,
178 CodeGenOpt::Level OptLevel) {
179 if (SSEDomainFix && OptLevel != CodeGenOpt::None && Subtarget.hasSSE2()) {
180 PM.add(createSSEDomainFixPass());
181 return true;
182 }
183 return false;
184 }
185
186171 bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
187172 CodeGenOpt::Level OptLevel,
188173 JITCodeEmitter &JCE) {
6565 virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
6666 virtual bool addPreRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
6767 virtual bool addPostRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
68 virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
6968 virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
7069 JITCodeEmitter &JCE);
7170 };