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ARM: Use BKPT instead of TRAP to implement llvm.debugtrap. The BKPT instruction is specified to cause a software breakpoint, and at least on Linux results in a SIGTRAP. This makes it more suitable for implementing debugtrap than TRAP (aka UDF #254), which is specified to cause an undefined instruction exception and results in a SIGILL on Linux. Moreover, BKPT is not marked as a terminator, which is not only consistent with the IR instruction but allows the analyzeBlock function to correctly analyze a basic block containing the instruction, which fixes an assertion failure in the machine block placement pass previously triggered by the included test case. Because BKPT is only supported starting with ARMv5T, we continue to use UDF #254 when targeting v4T. Differential Revision: https://reviews.llvm.org/D53614 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345171 91177308-0d34-0410-b5e6-96231b3b80d8 Peter Collingbourne 1 year, 10 months ago
6 changed file(s) with 82 addition(s) and 9 deletion(s). Raw diff Collapse all Expand all
955955 setOperationAction(ISD::BlockAddress, MVT::i32, Custom);
956956
957957 setOperationAction(ISD::TRAP, MVT::Other, Legal);
958 setOperationAction(ISD::DEBUGTRAP, MVT::Other, Legal);
958959
959960 // Use the default implementation.
960961 setOperationAction(ISD::VASTART, MVT::Other, Custom);
220220 def NoV4T : Predicate<"!Subtarget->hasV4TOps()">;
221221 def HasV5T : Predicate<"Subtarget->hasV5TOps()">,
222222 AssemblerPredicate<"HasV5TOps", "armv5t">;
223 def NoV5T : Predicate<"!Subtarget->hasV5TOps()">;
223224 def HasV5TE : Predicate<"Subtarget->hasV5TEOps()">,
224225 AssemblerPredicate<"HasV5TEOps", "armv5te">;
225226 def HasV6 : Predicate<"Subtarget->hasV6Ops()">,
21992200 let Inst = 0xe7ffdefe;
22002201 }
22012202
2203 def : Pat<(debugtrap), (BKPT 0)>, Requires<[IsARM, HasV5T]>;
2204 def : Pat<(debugtrap), (UDF 254)>, Requires<[IsARM, NoV5T]>;
2205
22022206 // Address computation and loads and stores in PIC mode.
22032207 let isNotDuplicable = 1 in {
22042208 def PICADD : ARMPseudoInst<(outs GPR:$dst), (ins GPR:$a, pclabel:$cp, pred:$p),
13781378 let Inst{11-8} = 0b1110;
13791379 let Inst{7-0} = imm8;
13801380 }
1381
1382 def : Pat<(debugtrap), (tBKPT 0)>, Requires<[IsThumb, HasV5T]>;
1383 def : Pat<(debugtrap), (tUDF 254)>, Requires<[IsThumb, NoV5T]>;
13811384
13821385 def t__brkdiv0 : TI<(outs), (ins), IIC_Br, "__brkdiv0",
13831386 [(int_arm_undefined 249)]>, Encoding16,
0 ; RUN: llc -o - %s -mtriple thumbv4-unknown-linux-android | FileCheck --check-prefix=V4 %s
1 ; RUN: llc -o - %s -mtriple thumbv5-unknown-linux-android | FileCheck --check-prefix=V5 %s
2
3 ; V4: udf #254
4 ; V5: bkpt #0
5
6 define i1 @a(i32 %b) !dbg !3 {
7 br i1 undef, label %c, label %d, !dbg !4
8
9 d: ; preds = %0
10 call void @llvm.debugtrap()
11 br label %ah, !dbg !4
12
13 c: ; preds = %0
14 %aj = icmp ne i20 undef, 5
15 br label %ah, !dbg !4
16
17 ah: ; preds = %c, %d
18 %ak = phi i1 [ false, %d ], [ %aj, %c ]
19 call void @llvm.dbg.value(metadata i1 %ak, metadata !7, metadata !DIExpression()), !dbg !9
20 switch i32 %b, label %al [
21 i32 0, label %am
22 i32 10, label %an
23 ]
24
25 an: ; preds = %ah
26 %ch = select i1 %ak, i32 0, i32 5
27 br label %am, !dbg !10
28
29 al: ; preds = %ah
30 br label %am, !dbg !9
31
32 am: ; preds = %al, %an, %ah
33 %1 = phi i32 [ 0, %al ], [ %ch, %an ], [ %b, %ah ]
34 unreachable
35 }
36
37 ; Function Attrs: nounwind readnone speculatable
38 declare void @llvm.dbg.value(metadata, metadata, metadata) #0
39
40 ; Function Attrs: nounwind
41 declare void @llvm.debugtrap() #1
42
43 attributes #0 = { nounwind readnone speculatable }
44 attributes #1 = { nounwind }
45
46 !llvm.dbg.cu = !{!0}
47 !llvm.module.flags = !{!2}
48
49 !0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !1, isOptimized: false, runtimeVersion: 0, emissionKind: NoDebug)
50 !1 = !DIFile(filename: "a", directory: "")
51 !2 = !{i32 2, !"Debug Info Version", i32 3}
52 !3 = distinct !DISubprogram(scope: null, isLocal: false, isDefinition: true, isOptimized: false, unit: !0)
53 !4 = !DILocation(line: 0, scope: !5, inlinedAt: !6)
54 !5 = distinct !DISubprogram(scope: null, isLocal: false, isDefinition: true, isOptimized: false, unit: !0)
55 !6 = !DILocation(line: 0, scope: !3)
56 !7 = !DILocalVariable(scope: !8)
57 !8 = distinct !DISubprogram(scope: null, isLocal: false, isDefinition: true, isOptimized: false, unit: !0)
58 !9 = !DILocation(line: 0, scope: !8, inlinedAt: !6)
59 !10 = !DILocation(line: 0, scope: !11, inlinedAt: !6)
60 !11 = !DILexicalBlock(scope: !8)
0 ; This test ensures the @llvm.debugtrap() call is not removed when generating
11 ; the 'pop' instruction to restore the callee saved registers on ARM.
22
3 ; RUN: llc < %s -mtriple=armv7 -O0 -filetype=asm | FileCheck %s
3 ; RUN: llc < %s -mtriple=armv4 -O0 -filetype=asm | FileCheck --check-prefixes=CHECK,V4 %s
4 ; RUN: llc < %s -mtriple=armv5 -O0 -filetype=asm | FileCheck --check-prefixes=CHECK,V5 %s
5 ; RUN: llc < %s -mtriple=thumbv4 -O0 -filetype=asm | FileCheck --check-prefixes=CHECK,V4 %s
6 ; RUN: llc < %s -mtriple=thumbv5 -O0 -filetype=asm | FileCheck --check-prefixes=CHECK,V5 %s
47
58 declare void @llvm.debugtrap() nounwind
69 declare void @foo() nounwind
811 define void @test() nounwind {
912 entry:
1013 ; CHECK: bl foo
14 ; V4-NEXT: udf #254
15 ; V5-NEXT: bkpt #0
1116 ; CHECK-NEXT: pop
12 ; CHECK-NEXT: .inst 0xe7ffdefe
1317 call void @foo()
1418 call void @llvm.debugtrap()
1519 ret void
5858 define void @t2() nounwind {
5959 entry:
6060 ; DARWIN-LABEL: t2:
61 ; DARWIN: trap
61 ; DARWIN: udf #254
6262
6363 ; FUNC-LABEL: t2:
6464 ; FUNC: bl __trap
6565
6666 ; NACL-LABEL: t2:
67 ; NACL: .inst 0xe7fedef0
67 ; NACL: bkpt #0
6868
6969 ; ARM-LABEL: t2:
70 ; ARM: .inst 0xe7ffdefe
70 ; ARM: bkpt #0
7171
7272 ; THUMB-LABEL: t2:
73 ; THUMB: .inst.n 0xdefe
73 ; THUMB: bkpt #0
7474
75 ; ENCODING-NACL: f0 de fe e7 trap
75 ; ENCODING-NACL: 70 00 20 e1 bkpt #0
7676
77 ; ENCODING-ARM: fe de ff e7 trap
77 ; ENCODING-ARM: 70 00 20 e1 bkpt #0
7878
79 ; ENCODING-THUMB: fe de trap
79 ; ENCODING-THUMB: 00 be bkpt #0
8080
8181 call void @llvm.debugtrap()
8282 unreachable