llvm.org GIT mirror llvm / fdc8340
Refactor code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86423 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 11 years ago
7 changed file(s) with 67 addition(s) and 127 deletion(s). Raw diff Collapse all Expand all
1717 #include "ARMGenInstrInfo.inc"
1818 #include "ARMMachineFunctionInfo.h"
1919 #include "ARMRegisterInfo.h"
20 #include "llvm/Constants.h"
21 #include "llvm/Function.h"
22 #include "llvm/GlobalValue.h"
2023 #include "llvm/ADT/STLExtras.h"
2124 #include "llvm/CodeGen/LiveVariables.h"
2225 #include "llvm/CodeGen/MachineConstantPool.h"
896899 return false;
897900 }
898901
902 void ARMBaseInstrInfo::
903 reMaterialize(MachineBasicBlock &MBB,
904 MachineBasicBlock::iterator I,
905 unsigned DestReg, unsigned SubIdx,
906 const MachineInstr *Orig) const {
907 DebugLoc dl = Orig->getDebugLoc();
908 unsigned Opcode = Orig->getOpcode();
909 switch (Opcode) {
910 default: {
911 MachineInstr *MI = MBB.getParent()->CloneMachineInstr(Orig);
912 MI->getOperand(0).setReg(DestReg);
913 MBB.insert(I, MI);
914 break;
915 }
916 case ARM::tLDRpci_pic:
917 case ARM::t2LDRpci_pic: {
918 MachineFunction &MF = *MBB.getParent();
919 ARMFunctionInfo *AFI = MF.getInfo();
920 MachineConstantPool *MCP = MF.getConstantPool();
921 unsigned CPI = Orig->getOperand(1).getIndex();
922 const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPI];
923 assert(MCPE.isMachineConstantPoolEntry() &&
924 "Expecting a machine constantpool entry!");
925 ARMConstantPoolValue *ACPV =
926 static_cast(MCPE.Val.MachineCPVal);
927 unsigned PCLabelId = AFI->createConstPoolEntryUId();
928 ARMConstantPoolValue *NewCPV = 0;
929 if (ACPV->isGlobalValue())
930 NewCPV = new ARMConstantPoolValue(ACPV->getGV(), PCLabelId,
931 ARMCP::CPValue, 4);
932 else if (ACPV->isExtSymbol())
933 NewCPV = new ARMConstantPoolValue(MF.getFunction()->getContext(),
934 ACPV->getSymbol(), PCLabelId, 4);
935 else if (ACPV->isBlockAddress())
936 NewCPV = new ARMConstantPoolValue(ACPV->getBlockAddress(), PCLabelId,
937 ARMCP::CPBlockAddress, 4);
938 else
939 llvm_unreachable("Unexpected ARM constantpool value type!!");
940 CPI = MCP->getConstantPoolIndex(NewCPV, MCPE.getAlignment());
941 MachineInstrBuilder MIB = BuildMI(MBB, I, Orig->getDebugLoc(), get(Opcode),
942 DestReg)
943 .addConstantPoolIndex(CPI).addImm(PCLabelId);
944 (*MIB).setMemRefs(Orig->memoperands_begin(), Orig->memoperands_end());
945 break;
946 }
947 }
948
949 MachineInstr *NewMI = prior(I);
950 NewMI->getOperand(0).setSubReg(SubIdx);
951 }
952
899953 bool ARMBaseInstrInfo::isIdentical(const MachineInstr *MI0,
900954 const MachineInstr *MI1,
901955 const MachineRegisterInfo *MRI) const {
263263 const SmallVectorImpl &Ops,
264264 MachineInstr* LoadMI) const;
265265
266 virtual void reMaterialize(MachineBasicBlock &MBB,
267 MachineBasicBlock::iterator MI,
268 unsigned DestReg, unsigned SubIdx,
269 const MachineInstr *Orig) const;
270
266271 virtual bool isIdentical(const MachineInstr *MI, const MachineInstr *Other,
267272 const MachineRegisterInfo *MRI) const;
268273 };
7979 }
8080
8181 void ARMInstrInfo::
82 reMaterialize(MachineBasicBlock &MBB,
83 MachineBasicBlock::iterator I,
82 reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
8483 unsigned DestReg, unsigned SubIdx,
8584 const MachineInstr *Orig) const {
8685 DebugLoc dl = Orig->getDebugLoc();
8786 unsigned Opcode = Orig->getOpcode();
8887 switch (Opcode) {
89 default: {
90 MachineInstr *MI = MBB.getParent()->CloneMachineInstr(Orig);
91 MI->getOperand(0).setReg(DestReg);
92 MBB.insert(I, MI);
88 default:
9389 break;
94 }
95 case ARM::MOVi2pieces:
90 case ARM::MOVi2pieces: {
9691 RI.emitLoadConstPool(MBB, I, dl,
9792 DestReg, SubIdx,
9893 Orig->getOperand(1).getImm(),
9994 (ARMCC::CondCodes)Orig->getOperand(2).getImm(),
10095 Orig->getOperand(3).getReg());
101 break;
96 MachineInstr *NewMI = prior(I);
97 NewMI->getOperand(0).setSubReg(SubIdx);
98 return;
99 }
102100 }
103101
104 MachineInstr *NewMI = prior(I);
105 NewMI->getOperand(0).setSubReg(SubIdx);
102 return ARMBaseInstrInfo::reMaterialize(MBB, I, DestReg, SubIdx, Orig);
106103 }
107104
1212
1313 #include "Thumb1InstrInfo.h"
1414 #include "ARM.h"
15 #include "ARMConstantPoolValue.h"
1615 #include "ARMGenInstrInfo.inc"
1716 #include "ARMMachineFunctionInfo.h"
18 #include "llvm/Constants.h"
19 #include "llvm/Function.h"
20 #include "llvm/GlobalValue.h"
21 #include "llvm/CodeGen/MachineConstantPool.h"
2217 #include "llvm/CodeGen/MachineFrameInfo.h"
2318 #include "llvm/CodeGen/MachineInstrBuilder.h"
2419 #include "llvm/CodeGen/MachineMemOperand.h"
267262
268263 return NewMI;
269264 }
270
271 void Thumb1InstrInfo::reMaterialize(MachineBasicBlock &MBB,
272 MachineBasicBlock::iterator I,
273 unsigned DestReg, unsigned SubIdx,
274 const MachineInstr *Orig) const {
275 DebugLoc dl = Orig->getDebugLoc();
276 unsigned Opcode = Orig->getOpcode();
277 switch (Opcode) {
278 default: {
279 MachineInstr *MI = MBB.getParent()->CloneMachineInstr(Orig);
280 MI->getOperand(0).setReg(DestReg);
281 MBB.insert(I, MI);
282 break;
283 }
284 case ARM::tLDRpci_pic: {
285 MachineFunction &MF = *MBB.getParent();
286 ARMFunctionInfo *AFI = MF.getInfo();
287 MachineConstantPool *MCP = MF.getConstantPool();
288 unsigned CPI = Orig->getOperand(1).getIndex();
289 const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPI];
290 assert(MCPE.isMachineConstantPoolEntry() &&
291 "Expecting a machine constantpool entry!");
292 ARMConstantPoolValue *ACPV =
293 static_cast(MCPE.Val.MachineCPVal);
294 unsigned PCLabelId = AFI->createConstPoolEntryUId();
295 ARMConstantPoolValue *NewCPV = 0;
296 if (ACPV->isGlobalValue())
297 NewCPV = new ARMConstantPoolValue(ACPV->getGV(), PCLabelId,
298 ARMCP::CPValue, 4);
299 else if (ACPV->isExtSymbol())
300 NewCPV = new ARMConstantPoolValue(MF.getFunction()->getContext(),
301 ACPV->getSymbol(), PCLabelId, 4);
302 else if (ACPV->isBlockAddress())
303 NewCPV = new ARMConstantPoolValue(ACPV->getBlockAddress(), PCLabelId,
304 ARMCP::CPBlockAddress, 4);
305 else
306 llvm_unreachable("Unexpected ARM constantpool value type!!");
307 CPI = MCP->getConstantPoolIndex(NewCPV, MCPE.getAlignment());
308 MachineInstrBuilder MIB = BuildMI(MBB, I, Orig->getDebugLoc(), get(Opcode),
309 DestReg)
310 .addConstantPoolIndex(CPI).addImm(PCLabelId);
311 (*MIB).setMemRefs(Orig->memoperands_begin(), Orig->memoperands_end());
312 break;
313 }
314 }
315
316 MachineInstr *NewMI = prior(I);
317 NewMI->getOperand(0).setSubReg(SubIdx);
318 }
319
7575 MachineInstr* LoadMI) const {
7676 return 0;
7777 }
78
79 void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
80 unsigned DestReg, unsigned SubIdx,
81 const MachineInstr *Orig) const;
8278 };
8379 }
8480
1616 #include "ARMAddressingModes.h"
1717 #include "ARMGenInstrInfo.inc"
1818 #include "ARMMachineFunctionInfo.h"
19 #include "llvm/Constants.h"
20 #include "llvm/Function.h"
21 #include "llvm/GlobalValue.h"
22 #include "llvm/CodeGen/MachineConstantPool.h"
2319 #include "llvm/CodeGen/MachineFrameInfo.h"
2420 #include "llvm/CodeGen/MachineInstrBuilder.h"
2521 #include "llvm/CodeGen/MachineMemOperand.h"
134130 }
135131
136132 ARMBaseInstrInfo::loadRegFromStackSlot(MBB, I, DestReg, FI, RC);
137 }
138
139 void Thumb2InstrInfo::reMaterialize(MachineBasicBlock &MBB,
140 MachineBasicBlock::iterator I,
141 unsigned DestReg, unsigned SubIdx,
142 const MachineInstr *Orig) const {
143 DebugLoc dl = Orig->getDebugLoc();
144 unsigned Opcode = Orig->getOpcode();
145 switch (Opcode) {
146 default: {
147 MachineInstr *MI = MBB.getParent()->CloneMachineInstr(Orig);
148 MI->getOperand(0).setReg(DestReg);
149 MBB.insert(I, MI);
150 break;
151 }
152 case ARM::t2LDRpci_pic: {
153 MachineFunction &MF = *MBB.getParent();
154 ARMFunctionInfo *AFI = MF.getInfo();
155 MachineConstantPool *MCP = MF.getConstantPool();
156 unsigned CPI = Orig->getOperand(1).getIndex();
157 const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPI];
158 assert(MCPE.isMachineConstantPoolEntry() &&
159 "Expecting a machine constantpool entry!");
160 ARMConstantPoolValue *ACPV =
161 static_cast(MCPE.Val.MachineCPVal);
162 unsigned PCLabelId = AFI->createConstPoolEntryUId();
163 ARMConstantPoolValue *NewCPV = 0;
164 if (ACPV->isGlobalValue())
165 NewCPV = new ARMConstantPoolValue(ACPV->getGV(), PCLabelId,
166 ARMCP::CPValue, 4);
167 else if (ACPV->isExtSymbol())
168 NewCPV = new ARMConstantPoolValue(MF.getFunction()->getContext(),
169 ACPV->getSymbol(), PCLabelId, 4);
170 else if (ACPV->isBlockAddress())
171 NewCPV = new ARMConstantPoolValue(ACPV->getBlockAddress(), PCLabelId,
172 ARMCP::CPBlockAddress, 4);
173 else
174 llvm_unreachable("Unexpected ARM constantpool value type!!");
175 CPI = MCP->getConstantPoolIndex(NewCPV, MCPE.getAlignment());
176 MachineInstrBuilder MIB = BuildMI(MBB, I, Orig->getDebugLoc(), get(Opcode),
177 DestReg)
178 .addConstantPoolIndex(CPI).addImm(PCLabelId);
179 (*MIB).setMemRefs(Orig->memoperands_begin(), Orig->memoperands_end());
180 break;
181 }
182 }
183
184 MachineInstr *NewMI = prior(I);
185 NewMI->getOperand(0).setSubReg(SubIdx);
186133 }
187134
188135 void llvm::emitT2RegPlusImmediate(MachineBasicBlock &MBB,
4949 unsigned DestReg, int FrameIndex,
5050 const TargetRegisterClass *RC) const;
5151
52 void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
53 unsigned DestReg, unsigned SubIdx,
54 const MachineInstr *Orig) const;
55
5652 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
5753 /// such, whenever a client has an instance of instruction info, it should
5854 /// always be able to get register info as well (through this method).