llvm.org GIT mirror llvm / fd46b84
[asan] Fix instrumentation of x86 intel syntax inline assembly. Patch by Yuri Gorshenin. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207092 91177308-0d34-0410-b5e6-96231b3b80d8 Evgeniy Stepanov 6 years ago
2 changed file(s) with 88 addition(s) and 17 deletion(s). Raw diff Collapse all Expand all
8181 MCContext &Ctx, MCStreamer &Out) {
8282 // Access size in bytes.
8383 unsigned AccessSize = 0;
84 unsigned long OpIx = Operands.size();
84
85 // FIXME: use MCInstrDesc to get proper value of IsWrite.
86 bool IsWrite = false;
8587 switch (Inst.getOpcode()) {
8688 case X86::MOV8mi:
8789 case X86::MOV8mr:
8890 AccessSize = 1;
89 OpIx = 2;
91 IsWrite = true;
9092 break;
9193 case X86::MOV8rm:
9294 AccessSize = 1;
93 OpIx = 1;
9495 break;
9596 case X86::MOV16mi:
9697 case X86::MOV16mr:
9798 AccessSize = 2;
98 OpIx = 2;
99 IsWrite = true;
99100 break;
100101 case X86::MOV16rm:
101102 AccessSize = 2;
102 OpIx = 1;
103103 break;
104104 case X86::MOV32mi:
105105 case X86::MOV32mr:
106106 AccessSize = 4;
107 OpIx = 2;
107 IsWrite = true;
108108 break;
109109 case X86::MOV32rm:
110110 AccessSize = 4;
111 OpIx = 1;
112111 break;
113112 case X86::MOV64mi32:
114113 case X86::MOV64mr:
115114 AccessSize = 8;
116 OpIx = 2;
115 IsWrite = true;
117116 break;
118117 case X86::MOV64rm:
119118 AccessSize = 8;
120 OpIx = 1;
121119 break;
122120 case X86::MOVAPDmr:
123121 case X86::MOVAPSmr:
124122 AccessSize = 16;
125 OpIx = 2;
123 IsWrite = true;
126124 break;
127125 case X86::MOVAPDrm:
128126 case X86::MOVAPSrm:
129127 AccessSize = 16;
130 OpIx = 1;
131 break;
132 }
133 if (OpIx >= Operands.size())
128 break;
129 default:
134130 return;
135
136 const bool IsWrite = (OpIx != 1);
137 InstrumentMemOperand(Operands[OpIx], AccessSize, IsWrite, Ctx, Out);
131 }
132
133 for (unsigned Ix = 0; Ix < Operands.size(); ++Ix) {
134 MCParsedAsmOperand *Op = Operands[Ix];
135 if (Op && Op->isMem())
136 InstrumentMemOperand(Op, AccessSize, IsWrite, Ctx, Out);
137 }
138138 }
139139
140140 class X86AddressSanitizer32 : public X86AddressSanitizer {
0 # RUN: llvm-mc %s -x86-asm-syntax=intel -triple=x86_64-unknown-linux-gnu -asm-instrumentation=address | FileCheck %s
1
2 .text
3 .globl swap
4 .align 16, 0x90
5 .type swap,@function
6 # CHECK-LABEL: swap:
7 #
8 # CHECK: subq $128, %rsp
9 # CHECK-NEXT: pushq %rdi
10 # CHECK-NEXT: leaq (%rcx), %rdi
11 # CHECK-NEXT: callq __sanitizer_sanitize_load8@PLT
12 # CHECK-NEXT: popq %rdi
13 # CHECK-NEXT: addq $128, %rsp
14 #
15 # CHECK-NEXT: movq (%rcx), %rax
16 #
17 # CHECK-NEXT: subq $128, %rsp
18 # CHECK-NEXT: pushq %rdi
19 # CHECK-NEXT: leaq (%rdx), %rdi
20 # CHECK-NEXT: callq __sanitizer_sanitize_load8@PLT
21 # CHECK-NEXT: popq %rdi
22 # CHECK-NEXT: addq $128, %rsp
23 #
24 # CHECK-NEXT: movq (%rdx), %rbx
25 #
26 # CHECK: subq $128, %rsp
27 # CHECK-NEXT: pushq %rdi
28 # CHECK-NEXT: leaq (%rcx), %rdi
29 # CHECK-NEXT: callq __sanitizer_sanitize_store8@PLT
30 # CHECK-NEXT: popq %rdi
31 # CHECK-NEXT: addq $128, %rsp
32 #
33 # CHECK-NEXT: movq %rbx, (%rcx)
34 #
35 # CHECK-NEXT: subq $128, %rsp
36 # CHECK-NEXT: pushq %rdi
37 # CHECK-NEXT: leaq (%rdx), %rdi
38 # CHECK-NEXT: callq __sanitizer_sanitize_store8@PLT
39 # CHECK-NEXT: popq %rdi
40 # CHECK-NEXT: addq $128, %rsp
41 #
42 # CHECK-NEXT: movq %rax, (%rdx)
43 swap: # @swap
44 .cfi_startproc
45 # BB#0:
46 push rbx
47 .Ltmp0:
48 .cfi_def_cfa_offset 16
49 .Ltmp1:
50 .cfi_offset rbx, -16
51 mov rcx, rdi
52 mov rdx, rsi
53 #APP
54
55
56 mov rax, qword ptr [rcx]
57 mov rbx, qword ptr [rdx]
58 mov qword ptr [rcx], rbx
59 mov qword ptr [rdx], rax
60
61 #NO_APP
62 pop rbx
63 ret
64 .Ltmp2:
65 .size swap, .Ltmp2-swap
66 .cfi_endproc
67
68
69 .ident "clang version 3.5.0 "
70 .section ".note.GNU-stack","",@progbits