llvm.org GIT mirror llvm / fce288f
Eliminate more uses of llvm-as and llvm-dis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81293 91177308-0d34-0410-b5e6-96231b3b80d8 Dan Gohman 10 years ago
1178 changed file(s) with 1654 addition(s) and 1654 deletion(s). Raw diff Collapse all Expand all
None ; RUN: llvm-as %s -o - | opt -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {MayAlias:.*i32\\* %., i32\\* %.} | grep {%x} | grep {%y}
0 ; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {MayAlias:.*i32\\* %., i32\\* %.} | grep {%x} | grep {%y}
11
22 declare i32* @unclear(i32* %a)
33
None ; RUN: llvm-as %s -o - | opt -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {9 no alias}
1 ; RUN: llvm-as %s -o - | opt -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {6 may alias}
2 ; RUN: llvm-as %s -o - | opt -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {MayAlias:.*i32\\* %Ipointer, i32\\* %Jpointer}
0 ; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {9 no alias}
1 ; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {6 may alias}
2 ; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {MayAlias:.*i32\\* %Ipointer, i32\\* %Jpointer}
33
44 define void @foo(i32* noalias %p, i32* noalias %q, i32 %i, i32 %j) {
55 %Ipointer = getelementptr i32* %p, i32 %i
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6
0 ; RUN: llc < %s -march=arm -mattr=+v6
11
22 %struct.layer_data = type { i32, [2048 x i8], i8*, [16 x i8], i32, i8*, i32, i32, [64 x i32], [64 x i32], [64 x i32], [64 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [12 x [64 x i16]] }
33 @ld = external global %struct.layer_data* ; <%struct.layer_data**> [#uses=1]
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2
0 ; RUN: llc < %s -march=arm -mattr=+v6,+vfp2
11
22 @quant_coef = external global [6 x [4 x [4 x i32]]] ; <[6 x [4 x [4 x i32]]]*> [#uses=1]
33 @dequant_coef = external global [6 x [4 x [4 x i32]]] ; <[6 x [4 x [4 x i32]]]*> [#uses=1]
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+v6,+vfp2
0 ; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6,+vfp2
11
22 define fastcc i8* @read_sleb128(i8* %p, i32* %val) {
33 br label %bb
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -relocation-model=pic \
0 ; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic \
11 ; RUN: -mattr=+v6 | grep r9
2 ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -relocation-model=pic \
2 ; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic \
33 ; RUN: -mattr=+v6 -arm-reserve-r9 -ifcvt-limit=0 -stats |& grep asm-printer
44 ; | grep 35
55
None ; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi
0 ; RUN: llc < %s -mtriple=arm-linux-gnueabi
11 ; PR1257
22
33 %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32 }
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11 ; PR1266
22
33 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
None ; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi
0 ; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi
11 ; PR1279
22
33 %struct.rtx_def = type { i16, i8, i8, %struct.u }
None ; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi
0 ; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi
11 ; PR1279
22
33 %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32 }
None ; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-apple-darwin
0 ; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin
11
22 %struct.H_TBL = type { [17 x i8], [256 x i8], i32 }
33 %struct.Q_TBL = type { [64 x i16], i32 }
None ; RUN: llvm-as < %s | llc -march=arm | not grep {add.*#0}
0 ; RUN: llc < %s -march=arm | not grep {add.*#0}
11
22 define i32 @foo() {
33 entry:
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -relocation-model=pic | \
0 ; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic | \
11 ; RUN: not grep LPC9
22
33 %struct.B = type { i32 }
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+v6,+vfp2
0 ; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6,+vfp2
11
22 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
33 target triple = "arm-apple-darwin8"
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
0 ; RUN: llc < %s -mtriple=arm-apple-darwin
11
22 %struct.Connection = type { i32, [10 x i8], i32 }
33 %struct.IntChunk = type { %struct.cppobjtype, i32, i32*, i32 }
None ; RUN: llvm-as < %s | llc | not grep 1_0
0 ; RUN: llc < %s | not grep 1_0
11 ; This used to create an extra branch to 'entry', LBB1_0.
22
33 ; ModuleID = 'bug.bc'
None ; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*baz | count 1
1 ; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*quux | count 1
2 ; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge -enable-eh | grep bl.*baz | count 1
3 ; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge -enable-eh | grep bl.*quux | count 1
0 ; RUN: llc < %s -march=arm -enable-tail-merge | grep bl.*baz | count 1
1 ; RUN: llc < %s -march=arm -enable-tail-merge | grep bl.*quux | count 1
2 ; RUN: llc < %s -march=arm -enable-tail-merge -enable-eh | grep bl.*baz | count 1
3 ; RUN: llc < %s -march=arm -enable-tail-merge -enable-eh | grep bl.*quux | count 1
44 ; Check that calls to baz and quux are tail-merged.
55 ; PR1628
66
None ; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*baz | count 1
1 ; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*quux | count 1
2 ; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge -enable-eh | grep bl.*baz | count 1
3 ; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge -enable-eh | grep bl.*quux | count 1
0 ; RUN: llc < %s -march=arm -enable-tail-merge | grep bl.*baz | count 1
1 ; RUN: llc < %s -march=arm -enable-tail-merge | grep bl.*quux | count 1
2 ; RUN: llc < %s -march=arm -enable-tail-merge -enable-eh | grep bl.*baz | count 1
3 ; RUN: llc < %s -march=arm -enable-tail-merge -enable-eh | grep bl.*quux | count 1
44 ; Check that calls to baz and quux are tail-merged.
55 ; PR1628
66
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6
0 ; RUN: llc < %s -march=arm -mattr=+v6
11
22 define i32 @test3() {
33 tail call void asm sideeffect "/* number: ${0:c} */", "i"( i32 1 )
None ; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi
0 ; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi
11 ; PR1406
22
33 %struct.AVClass = type { i8*, i8* (i8*)*, %struct.AVOption* }
None ; RUN: llvm-as < %s | llc -march=arm | grep bl.*baz | count 1
1 ; RUN: llvm-as < %s | llc -march=arm | grep bl.*quux | count 1
2 ; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge=0 | grep bl.*baz | count 2
3 ; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge=0 | grep bl.*quux | count 2
4 ; RUN: llvm-as < %s | llc -march=arm -enable-eh | grep bl.*baz | count 1
5 ; RUN: llvm-as < %s | llc -march=arm -enable-eh | grep bl.*quux | count 1
6 ; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge=0 -enable-eh | grep bl.*baz | count 2
7 ; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge=0 -enable-eh | grep bl.*quux | count 2
0 ; RUN: llc < %s -march=arm | grep bl.*baz | count 1
1 ; RUN: llc < %s -march=arm | grep bl.*quux | count 1
2 ; RUN: llc < %s -march=arm -enable-tail-merge=0 | grep bl.*baz | count 2
3 ; RUN: llc < %s -march=arm -enable-tail-merge=0 | grep bl.*quux | count 2
4 ; RUN: llc < %s -march=arm -enable-eh | grep bl.*baz | count 1
5 ; RUN: llc < %s -march=arm -enable-eh | grep bl.*quux | count 1
6 ; RUN: llc < %s -march=arm -enable-tail-merge=0 -enable-eh | grep bl.*baz | count 2
7 ; RUN: llc < %s -march=arm -enable-tail-merge=0 -enable-eh | grep bl.*quux | count 2
88 ; Check that tail merging is the default on ARM, and that -enable-tail-merge=0 works.
99 ; PR1628
1010
None ; RUN: llvm-as < %s | llc -march=arm | not grep {str.*\\!}
0 ; RUN: llc < %s -march=arm | not grep {str.*\\!}
11
22 %struct.shape_edge_t = type { %struct.shape_edge_t*, %struct.shape_edge_t*, i32, i32, i32, i32 }
33 %struct.shape_path_t = type { %struct.shape_edge_t*, %struct.shape_edge_t*, i32, i32, i32, i32, i32, i32 }
None ; RUN: llvm-as < %s | llc
0 ; RUN: llc < %s
11 ; PR1424
22
33 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -relocation-model=pic -mattr=+v6
0 ; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic -mattr=+v6
11 ; PR1609
22
33 %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
None ; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi -regalloc=local
0 ; RUN: llc < %s -mtriple=arm-linux-gnueabi -regalloc=local
11 ; PR1925
22
33 %struct.encode_aux_nearestmatch = type { i32*, i32*, i32*, i32*, i32, i32 }
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -regalloc=local
0 ; RUN: llc < %s -mtriple=arm-apple-darwin -regalloc=local
11 ; PR1925
22
33 %"struct.kc::impl_Ccode_option" = type { %"struct.kc::impl_abstract_phylum" }
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | not grep 255
0 ; RUN: llc < %s -march=arm -mattr=+v6 | not grep 255
11
22 define i32 @main(i32 %argc, i8** %argv) {
33 entry:
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+v6,+vfp2
0 ; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6,+vfp2
11
22 @accum = external global { double, double } ; <{ double, double }*> [#uses=1]
33 @.str = external constant [4 x i8] ; <[4 x i8]*> [#uses=1]
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
0 ; RUN: llc < %s -mtriple=arm-apple-darwin
11
22 @numBinsY = external global i32 ; [#uses=1]
33
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
0 ; RUN: llc < %s -mtriple=arm-apple-darwin
11
22 %struct.CONTENTBOX = type { i32, i32, i32, i32, i32 }
33 %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
0 ; RUN: llc < %s -mtriple=arm-apple-darwin
11
22 declare void @foo(i8*, i8*, i32, i32, i32, i32, i32, i32, i32)
33
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
0 ; RUN: llc < %s -mtriple=arm-apple-darwin
11
22 %struct.BiContextType = type { i16, i8, i32 }
33 %struct.Bitstream = type { i32, i32, i8, i32, i32, i8, i8, i32, i32, i8*, i32 }
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
0 ; RUN: llc < %s -mtriple=arm-apple-darwin
11
22 %struct.Decoders = type { i32**, i16***, i16****, i16***, i16**, i8**, i8** }
33 @decoders = external global %struct.Decoders ; <%struct.Decoders*> [#uses=1]
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11
22 define float @f(float %a, float %b) nounwind {
33 %tmp = fdiv float %a, %b
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11 ; PR2589
22
33 define void @main({ i32 }*) {
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+v6 -relocation-model=pic | grep comm
0 ; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6 -relocation-model=pic | grep comm
11
22 %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
33 %struct.__gcov_var = type { %struct.FILE*, i32, i32, i32, i32, i32, i32, [1025 x i32] }
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
0 ; RUN: llc < %s -mtriple=arm-apple-darwin
11
22 @"\01LC1" = external constant [288 x i8] ; <[288 x i8]*> [#uses=1]
33
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
0 ; RUN: llc < %s -mtriple=arm-apple-darwin
11
22 define void @gcov_exit() nounwind {
33 entry:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2
0 ; RUN: llc < %s -march=arm -mattr=+v6,+vfp2
11
22 define hidden i64 @__muldi3(i64 %u, i64 %v) nounwind {
33 entry:
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin9 -stats |& grep asm-printer | grep 164
0 ; RUN: llc < %s -mtriple=arm-apple-darwin9 -stats |& grep asm-printer | grep 164
11
22 %"struct.Adv5::Ekin<3>" = type <{ i8 }>
33 %"struct.Adv5::X::Energyflux<3>" = type { double }
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2
0 ; RUN: llc < %s -march=arm -mattr=+v6,+vfp2
11
22 target triple = "arm-apple-darwin9"
33 %struct.FILE_POS = type { i8, i8, i16, i32 }
None ; RUN: llvm-as < %s | llc
0 ; RUN: llc < %s
11 ; PR3610
22 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-s0:0:64-f80:32:32"
33 target triple = "arm-elf"
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2
0 ; RUN: llc < %s -march=arm -mattr=+v6,+vfp2
11
22 target triple = "arm-apple-darwin9"
33 @a = external global double ; [#uses=1]
None ; RUN: llvm-as < %s | llc -mtriple=armv6-apple-darwin9 -mattr=+vfp2
0 ; RUN: llc < %s -mtriple=armv6-apple-darwin9 -mattr=+vfp2
11 ; rdar://6653182
22
33 %struct.ggBRDF = type { i32 (...)** }
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11
22 %struct.hit_t = type { %struct.v_t, double }
33 %struct.node_t = type { %struct.hit_t, %struct.hit_t, i32 }
None ; RUN: llvm-as < %s | llc -march=arm | grep {swi 107}
0 ; RUN: llc < %s -march=arm | grep {swi 107}
11
22 define i32 @_swilseek(i32) nounwind {
33 entry:
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11 ; PR3795
22
33 define fastcc void @_D3foo3fooFAriZv({ i32, { double, double }* } %d_arg, i32 %x_arg) {
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11
22 declare i32 @printf(i8*, ...)
33
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11
22 define void @execute_shader(<4 x float>* %OUT, <4 x float>* %IN, <4 x float>* %CONST) {
33 entry:
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11 ; PR3954
22
33 define void @foo(...) nounwind {
None ; RUN: llvm-as < %s | llc -mtriple=arm-linuxeabi-unknown-gnu -mattr=+v6
0 ; RUN: llc < %s -mtriple=arm-linuxeabi-unknown-gnu -mattr=+v6
11 ; PR4166
22
33 %"byte[]" = type { i32, i8* }
None ; RUN: llvm-as < %s | llc -mtriple=armv5-unknown-linux-gnueabi -O0 -regalloc=local
0 ; RUN: llc < %s -mtriple=armv5-unknown-linux-gnueabi -O0 -regalloc=local
11 ; PR4100
22 @.str = external constant [30 x i8] ; <[30 x i8]*> [#uses=1]
33
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11 %struct.List = type { %struct.List*, i32 }
22 @Node5 = external constant %struct.List ; <%struct.List*> [#uses=1]
33 @"\01LC" = external constant [7 x i8] ; <[7 x i8]*> [#uses=1]
None ; RUN: llvm-as < %s | llc -march=arm | grep swp
0 ; RUN: llc < %s -march=arm | grep swp
11 ; PR4091
22
33 define void @foo(i32 %i, i32* %p) nounwind {
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -relocation-model=pic -mattr=+v6,+vfp2
0 ; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic -mattr=+v6,+vfp2
11
22 @"\01LC" = external constant [15 x i8] ; <[15 x i8]*> [#uses=1]
33
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+v6
0 ; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6
11
22 %struct.anon = type { i16, i16 }
33 %struct.cab_archive = type { i32, i16, i16, i16, i16, i8, %struct.cab_folder*, %struct.cab_file* }
None ; RUN: llvm-as < %s | llc -mtriple=armv6-apple-darwin
0 ; RUN: llc < %s -mtriple=armv6-apple-darwin
11
22 type { i32, i32, %struct.D_Sym**, [3 x %struct.D_Sym*] } ; type %0
33 type { i32, %struct.D_Reduction** } ; type %1
None ; RUN: llvm-as < %s | llc -mtriple=armv6-apple-darwin
0 ; RUN: llc < %s -mtriple=armv6-apple-darwin
11
22 %struct.term = type { i32, i32, i32 }
33
None ; RUN: llvm-as < %s | llc -mtriple=armv6-eabi -mattr=+vfp2 -float-abi=hard
0 ; RUN: llc < %s -mtriple=armv6-eabi -mattr=+vfp2 -float-abi=hard
11 ; PR4419
22
33 define float @__ieee754_acosf(float %x) nounwind {
None ; RUN: llvm-as < %s | llc -mtriple=armv6-apple-darwin
0 ; RUN: llc < %s -mtriple=armv6-apple-darwin
11
22 %struct.rtunion = type { i64 }
33 %struct.rtx_def = type { i16, i8, i8, [1 x %struct.rtunion] }
None ; RUN: llvm-as < %s | llc -march=arm -mtriple=armv6-apple-darwin9
0 ; RUN: llc < %s -march=arm -mtriple=armv6-apple-darwin9
11
22 @nn = external global i32 ; [#uses=1]
33 @al_len = external global i32 ; [#uses=2]
None ; RUN: llvm-as < %s | llc -march=arm -mtriple=armv6-apple-darwin9
0 ; RUN: llc < %s -march=arm -mtriple=armv6-apple-darwin9
11
22 @no_mat = external global i32 ; [#uses=1]
33 @no_mis = external global i32 ; [#uses=2]
None ; RUN: llvm-as < %s | llc -march=arm -mtriple=armv6-apple-darwin9
0 ; RUN: llc < %s -march=arm -mtriple=armv6-apple-darwin9
11
22 @JJ = external global i32* ; [#uses=1]
33
None ; RUN: llvm-as < %s | llc -march=arm -mtriple=armv6-apple-darwin9
0 ; RUN: llc < %s -march=arm -mtriple=armv6-apple-darwin9
11
22 @r = external global i32 ; [#uses=1]
33 @qr = external global i32 ; [#uses=1]
None ; RUN: llvm-as < %s | llc -march=arm -mtriple=armv6-apple-darwin9
0 ; RUN: llc < %s -march=arm -mtriple=armv6-apple-darwin9
11
22 @XX = external global i32* ; [#uses=1]
33
None ; RUN: llvm-as < %s | llc -march=arm -mtriple=armv6-apple-darwin9
0 ; RUN: llc < %s -march=arm -mtriple=armv6-apple-darwin9
11
22 @qr = external global i32 ; [#uses=1]
33 @II = external global i32* ; [#uses=1]
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6
0 ; RUN: llc < %s -march=arm -mattr=+v6
11
22 define void @test(i8* %x) nounwind {
33 entry:
None ; RUN: llvm-as < %s | llc -mtriple=armv6-apple-darwin10 -mattr=+vfp2 | grep fcmpezd | count 13
0 ; RUN: llc < %s -mtriple=armv6-apple-darwin10 -mattr=+vfp2 | grep fcmpezd | count 13
11
22 %struct.EDGE_PAIR = type { %struct.edge_rec*, %struct.edge_rec* }
33 %struct.VEC2 = type { double, double, double }
None ; RUN: llvm-as < %s | llc -mtriple=armv6-apple-darwin10
0 ; RUN: llc < %s -mtriple=armv6-apple-darwin10
11
22 %struct.cli_ac_alt = type { i8, i8*, i16, i16, %struct.cli_ac_alt* }
33 %struct.cli_ac_node = type { i8, i8, %struct.cli_ac_patt*, %struct.cli_ac_node**, %struct.cli_ac_node* }
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11
22 %struct.cli_ac_alt = type { i8, i8*, i16, i16, %struct.cli_ac_alt* }
33 %struct.cli_ac_node = type { i8, i8, %struct.cli_ac_patt*, %struct.cli_ac_node**, %struct.cli_ac_node* }
None ; RUN: llvm-as < %s | llc -mtriple=armv7-apple-darwin10 -mattr=+vfp3
0 ; RUN: llc < %s -mtriple=armv7-apple-darwin10 -mattr=+vfp3
11
22 @a = external global double ; [#uses=1]
33
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon
0 ; RUN: llc < %s -march=arm -mattr=+neon
11 ; PR4657
22
33 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
None ; RUN: llvm-as < %s | llc -mtriple=armv6-elf
0 ; RUN: llc < %s -mtriple=armv6-elf
11 ; PR4528
22
33 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
None ; RUN: llvm-as < %s | llc -mtriple=armv6-elf
0 ; RUN: llc < %s -mtriple=armv6-elf
11 ; PR4528
22
33 define arm_aapcscc i32 @file_read_actor(i32 %desc, i32 %page, i32 %offset, i32 %size) nounwind optsize {
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11 ; PR4528
22
33 ; Inline asm is allowed to contain operands "=&r", "0".
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11 ; PR4716
22
33 define arm_aapcscc void @_start() nounwind naked {
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 -mcpu=cortex-a8 -disable-post-RA-scheduler=0 -avoid-hazards
0 ; RUN: llc < %s -march=arm -mattr=+vfp2 -mcpu=cortex-a8 -disable-post-RA-scheduler=0 -avoid-hazards
11
22 ; ModuleID = ''
33 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
None ; RUN: llvm-as < %s | llc -asm-verbose=false -O3 -relocation-model=pic -disable-fp-elim -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -disable-post-RA-scheduler=0 -avoid-hazards
0 ; RUN: llc < %s -asm-verbose=false -O3 -relocation-model=pic -disable-fp-elim -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -disable-post-RA-scheduler=0 -avoid-hazards
11
22 ; ModuleID = ''
33 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
None ; RUN: llvm-as < %s | llc -asm-verbose=false -O3 -relocation-model=pic -disable-fp-elim -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -disable-post-RA-scheduler=0 -avoid-hazards
0 ; RUN: llc < %s -asm-verbose=false -O3 -relocation-model=pic -disable-fp-elim -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -disable-post-RA-scheduler=0 -avoid-hazards
11
22 ; ModuleID = ''
33 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
None ; RUN: llvm-as < %s | llc -asm-verbose=false -O3 -relocation-model=pic -disable-fp-elim -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -disable-post-RA-scheduler=0 -avoid-hazards
0 ; RUN: llc < %s -asm-verbose=false -O3 -relocation-model=pic -disable-fp-elim -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -disable-post-RA-scheduler=0 -avoid-hazards
11
22 ; ModuleID = ''
33 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
None ; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-apple-darwin | FileCheck %s
0 ; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | FileCheck %s
11
22 ; ModuleID = '/Volumes/MacOS9/tests/WebKit/JavaScriptCore/profiler/ProfilerServer.mm'
33
None ; RUN: llvm-as < %s | llc -mattr=+neon | not grep fldmfdd
0 ; RUN: llc < %s -mattr=+neon | not grep fldmfdd
11 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
22 target triple = "thumbv7-elf"
33
None ; RUN: llvm-as < %s | llc -mattr=+neon | not grep fldmfdd
0 ; RUN: llc < %s -mattr=+neon | not grep fldmfdd
11 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
22 target triple = "thumbv7-elf"
33
None ; RUN: llvm-as < %s | llc -mattr=+neon
0 ; RUN: llc < %s -mattr=+neon
11 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
22 target triple = "thumbv7-elf"
33
None ; RUN: llvm-as < %s | llc -mattr=+neon
0 ; RUN: llc < %s -mattr=+neon
11 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
22 target triple = "thumbv7-elf"
33
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin9 -march=arm -f | FileCheck %s
0 ; RUN: llc < %s -mtriple=arm-apple-darwin9 -march=arm -f | FileCheck %s
11
22 %struct.A = type { i32* }
33
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11 ; pr4843
22 define <4 x i16> @v2regbug(<4 x i16>* %B) nounwind {
33 ;CHECK: v2regbug:
None ; RUN: llvm-as < %s | llc -march=arm -stats |& grep asm-printer | grep 4
0 ; RUN: llc < %s -march=arm -stats |& grep asm-printer | grep 4
11
22 define i32 @t1(i32 %a) {
33 %b = mul i32 %a, 9
None ; RUN: llvm-as < %s | llc -march=arm | grep align.*1 | count 1
1 ; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | \
0 ; RUN: llc < %s -march=arm | grep align.*1 | count 1
1 ; RUN: llc < %s -mtriple=arm-linux-gnueabi | \
22 ; RUN: grep align.*2 | count 2
3 ; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | \
3 ; RUN: llc < %s -mtriple=arm-linux-gnueabi | \
44 ; RUN: grep align.*3 | count 2
5 ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | \
5 ; RUN: llc < %s -mtriple=arm-apple-darwin | \
66 ; RUN: grep align.*2 | count 4
77
88 @a = global i1 true
None ; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnu | \
0 ; RUN: llc < %s -march=arm -mtriple=arm-linux-gnu | \
11 ; RUN: grep {mov r11, sp}
2 ; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnu | \
2 ; RUN: llc < %s -march=arm -mtriple=arm-linux-gnu | \
33 ; RUN: grep {mov sp, r11}
44
55 define void @f(i32 %a) {
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11
22 define void @f(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e) {
33 entry:
None ; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | not grep r3
0 ; RUN: llc < %s -mtriple=arm-linux-gnueabi | not grep r3
11 ; PR4059
22
33 define i32 @f(i64 %z, i32 %a, double %b) {
None ; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | not grep r3
0 ; RUN: llc < %s -mtriple=arm-linux-gnueabi | not grep r3
11 ; PR4058
22
33 define i32 @f(i64 %z, i32 %a, i64 %b) {
None ; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | \
0 ; RUN: llc < %s -mtriple=arm-linux-gnueabi | \
11 ; RUN: grep {mov r0, r2} | count 1
2 ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | \
2 ; RUN: llc < %s -mtriple=arm-apple-darwin | \
33 ; RUN: grep {mov r0, r1} | count 1
44
55 define i32 @f(i32 %a, i64 %b) {
None ; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi
1 ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
0 ; RUN: llc < %s -mtriple=arm-linux-gnueabi
1 ; RUN: llc < %s -mtriple=arm-apple-darwin
22
33 define i32 @f(i32 %a, i128 %b) {
44 %tmp = call i32 @g(i128 %b)
None ; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi
1 ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
0 ; RUN: llc < %s -mtriple=arm-linux-gnueabi
1 ; RUN: llc < %s -mtriple=arm-apple-darwin
22
33 define i64 @f(i32 %a, i128 %b) {
44 %tmp = call i64 @g(i128 %b)
None ; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi
1 ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
0 ; RUN: llc < %s -mtriple=arm-linux-gnueabi
1 ; RUN: llc < %s -mtriple=arm-apple-darwin
22
33 define float @f(i32 %a, i128 %b) {
44 %tmp = call float @g(i128 %b)
None ; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi
1 ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
0 ; RUN: llc < %s -mtriple=arm-linux-gnueabi
1 ; RUN: llc < %s -mtriple=arm-apple-darwin
22
33 define double @f(i32 %a, i128 %b) {
44 %tmp = call double @g(i128 %b)
None ; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi
1 ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
0 ; RUN: llc < %s -mtriple=arm-linux-gnueabi
1 ; RUN: llc < %s -mtriple=arm-apple-darwin
22
33 define i128 @f(i32 %a, i128 %b) {
44 %tmp = call i128 @g(i128 %b)
None ; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi
1 ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
0 ; RUN: llc < %s -mtriple=arm-linux-gnueabi
1 ; RUN: llc < %s -mtriple=arm-apple-darwin
22
33 define double @f(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, double %b) {
44 %tmp = call double @g(i32 %a2, i32 %a3, i32 %a4, i32 %a5, double %b)
None ; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi
1 ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
0 ; RUN: llc < %s -mtriple=arm-linux-gnueabi
1 ; RUN: llc < %s -mtriple=arm-apple-darwin
22
33 define i64 @f(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i64 %b) {
44 %tmp = call i64 @g(i32 %a2, i32 %a3, i32 %a4, i32 %a5, i64 %b)
None ; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi -mattr=+vfp2 -float-abi=hard | grep {fcpys s0, s1}
0 ; RUN: llc < %s -mtriple=arm-linux-gnueabi -mattr=+vfp2 -float-abi=hard | grep {fcpys s0, s1}
11
22 define float @f(float %z, double %a, float %b) {
33 %tmp = call float @g(float %b)
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11
22 define void @frame_dummy() {
33 entry:
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep mov | grep r7
1 ; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | grep mov | grep r11
0 ; RUN: llc < %s -mtriple=arm-apple-darwin | grep mov | grep r7
1 ; RUN: llc < %s -mtriple=arm-linux-gnueabi | grep mov | grep r11
22 ; PR4344
33 ; PR4416
44
None ; RUN: llvm-as < %s | llc -march=arm | grep {str r1, \\\[r.*, -r.*, lsl #2\}
0 ; RUN: llc < %s -march=arm | grep {str r1, \\\[r.*, -r.*, lsl #2\}
11
22 define void @test(i32* %P, i32 %A, i32 %i) nounwind {
33 entry:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6t2 | grep "bfc " | count 3
0 ; RUN: llc < %s -march=arm -mattr=+v6t2 | grep "bfc " | count 3
11
22 ; 4278190095 = 0xff00000f
33 define i32 @f1(i32 %a) {
None ; RUN: llvm-as < %s | llc -march=arm | grep {bic\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*} | count 2
0 ; RUN: llc < %s -march=arm | grep {bic\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*} | count 2
11
22 define i32 @f1(i32 %a, i32 %b) {
33 %tmp = xor i32 %b, 4294967295
None ; RUN: llvm-as < %s | llc -march=arm > %t
0 ; RUN: llc < %s -march=arm > %t
11 ; RUN: grep and %t | count 1
22 ; RUN: grep orr %t | count 1
33 ; RUN: grep eor %t | count 1
None ; RUN: llvm-as < %s | llc -march=arm -disable-arm-if-conversion > %t
0 ; RUN: llc < %s -march=arm -disable-arm-if-conversion > %t
11 ; RUN: grep bne %t
22 ; RUN: grep bge %t
33 ; RUN: grep bhs %t
None ; RUN: llvm-as < %s | llc -march=arm
1 ; RUN: llvm-as < %s | llc -march=arm | not grep bx
0 ; RUN: llc < %s -march=arm
1 ; RUN: llc < %s -march=arm | not grep bx
22
33 define void @test(i32 %Ptr, i8* %L) {
44 entry:
None ; RUN: llvm-as < %s | llc -march=arm | grep {mov lr, pc}
1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+v5t | grep blx
2 ; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi\
0 ; RUN: llc < %s -march=arm | grep {mov lr, pc}
1 ; RUN: llc < %s -march=arm -mattr=+v5t | grep blx
2 ; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi\
33 ; RUN: -relocation-model=pic | grep {PLT}
44
55 @t = weak global i32 ()* null ; [#uses=1]
None ; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \
0 ; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi | \
11 ; RUN: not grep {bx lr}
22
33 %struct.anon = type { i32 (i32, i32, i32)*, i32, i32, [3 x i32], i8*, i8*, i8* }
None ; RUN: llvm-as < %s | llc -march=arm | grep "subs r" | count 2
1 ; RUN: llvm-as < %s | llc -march=arm | grep "adc r"
2 ; RUN: llvm-as < %s | llc -march=arm | grep "sbc r" | count 2
0 ; RUN: llc < %s -march=arm | grep "subs r" | count 2
1 ; RUN: llc < %s -march=arm | grep "adc r"
2 ; RUN: llc < %s -march=arm | grep "sbc r" | count 2
33
44 define i64 @f1(i64 %a, i64 %b) {
55 entry:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+v5t | grep clz
0 ; RUN: llc < %s -march=arm -mattr=+v5t | grep clz
11
22 declare i32 @llvm.ctlz.i32(i32)
33
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 | \
0 ; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | \
11 ; RUN: grep fcmpes
22
33 define void @test3(float* %glob, i32 %X) {
None ; RUN: llvm-as < %s | llc -march=arm | \
0 ; RUN: llc < %s -march=arm | \
11 ; RUN: grep {mov r0, #0} | count 1
2 ; RUN: llvm-as < %s | llc -march=arm | \
2 ; RUN: llc < %s -march=arm | \
33 ; RUN: grep {mov r0, #255$} | count 1
4 ; RUN: llvm-as < %s | llc -march=arm -asm-verbose | \
4 ; RUN: llc < %s -march=arm -asm-verbose | \
55 ; RUN: grep {mov r0.*256} | count 1
6 ; RUN: llvm-as < %s | llc -march=arm -asm-verbose | grep {orr.*256} | count 1
7 ; RUN: llvm-as < %s | llc -march=arm -asm-verbose | grep {mov r0, .*-1073741761} | count 1
8 ; RUN: llvm-as < %s | llc -march=arm -asm-verbose | grep {mov r0, .*1008} | count 1
9 ; RUN: llvm-as < %s | llc -march=arm | grep {cmp r0, #1, 16} | count 1
6 ; RUN: llc < %s -march=arm -asm-verbose | grep {orr.*256} | count 1
7 ; RUN: llc < %s -march=arm -asm-verbose | grep {mov r0, .*-1073741761} | count 1
8 ; RUN: llc < %s -march=arm -asm-verbose | grep {mov r0, .*1008} | count 1
9 ; RUN: llc < %s -march=arm | grep {cmp r0, #1, 16} | count 1
1010
1111 define i32 @f1() {
1212 ret i32 0
None ; RUN: llvm-as < %s | llc -march=arm | grep {bl.\*__ltdf} | count 1
0 ; RUN: llc < %s -march=arm | grep {bl.\*__ltdf} | count 1
11 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
22 target triple = "i386-apple-darwin8"
33
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | FileCheck %s -check-prefix=DARWIN
1 ; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnu | FileCheck %s -check-prefix=ELF
2 ; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | FileCheck %s -check-prefix=GNUEABI
0 ; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s -check-prefix=DARWIN
1 ; RUN: llc < %s -mtriple=arm-linux-gnu | FileCheck %s -check-prefix=ELF
2 ; RUN: llc < %s -mtriple=arm-linux-gnueabi | FileCheck %s -check-prefix=GNUEABI
33
44 ; DARWIN: .section __DATA,__mod_init_func,mod_init_funcs
55 ; DARWIN: .section __DATA,__mod_term_func,mod_term_funcs
None ; RUN: llvm-as < %s | llc -march=arm > %t
0 ; RUN: llc < %s -march=arm > %t
11 ; RUN: grep __divsi3 %t
22 ; RUN: grep __udivsi3 %t
33 ; RUN: grep __modsi3 %t
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11
22 %struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* }
33 %struct.info = type { i32, i32, i32, i32, i32, i32, i32, i8* }
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11 @handler_installed.6144.b = external global i1 ; [#uses=1]
22
33 define void @__mf_sigusr1_respond() {
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fabss\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep -E {vabs.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
2 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep -E {fabss\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
3 ; RUN: llvm-as < %s | llc -march=arm -mcpu=cortex-a8 | grep -E {vabs.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
4 ; RUN: llvm-as < %s | llc -march=arm -mcpu=cortex-a9 | grep -E {fabss\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
0 ; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fabss\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
1 ; RUN: llc < %s -march=arm -mattr=+neon,+neonfp | grep -E {vabs.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
2 ; RUN: llc < %s -march=arm -mattr=+neon,-neonfp | grep -E {fabss\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
3 ; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {vabs.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
4 ; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {fabss\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
55
66 define float @test(float %a, float %b) {
77 entry:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fadds\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep -E {vadd.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
2 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep -E {fadds\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
3 ; RUN: llvm-as < %s | llc -march=arm -mcpu=cortex-a8 | grep -E {vadd.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
4 ; RUN: llvm-as < %s | llc -march=arm -mcpu=cortex-a9 | grep -E {fadds\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
0 ; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fadds\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
1 ; RUN: llc < %s -march=arm -mattr=+neon,+neonfp | grep -E {vadd.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
2 ; RUN: llc < %s -march=arm -mattr=+neon,-neonfp | grep -E {fadds\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
3 ; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {vadd.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
4 ; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {fadds\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
55
66 define float @test(float %a, float %b) {
77 entry:
None ; RUN: llvm-as < %s | llc -march=arm | grep bic | count 2
1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 | \
0 ; RUN: llc < %s -march=arm | grep bic | count 2
1 ; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | \
22 ; RUN: grep fneg | count 2
33
44 define float @test1(float %x, double %y) {
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fdivs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep -E {fdivs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
2 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep -E {fdivs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
3 ; RUN: llvm-as < %s | llc -march=arm -mcpu=cortex-a8 | grep -E {fdivs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
4 ; RUN: llvm-as < %s | llc -march=arm -mcpu=cortex-a9 | grep -E {fdivs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
0 ; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fdivs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
1 ; RUN: llc < %s -march=arm -mattr=+neon,+neonfp | grep -E {fdivs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
2 ; RUN: llc < %s -march=arm -mattr=+neon,-neonfp | grep -E {fdivs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
3 ; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {fdivs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
4 ; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {fdivs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
55
66 define float @test(float %a, float %b) {
77 entry:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2
1 ; RUN: llvm-as < %s | llc -march=arm -mattr=vfp2 | not grep fstd
0 ; RUN: llc < %s -march=arm -mattr=+vfp2
1 ; RUN: llc < %s -march=arm -mattr=vfp2 | not grep fstd
22
33 define hidden i64 @__fixunsdfdi(double %x) nounwind readnone {
44 entry:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep -E {vmla.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
2 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep -E {fmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
3 ; RUN: llvm-as < %s | llc -march=arm -mcpu=cortex-a8 | grep -E {vmla.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
4 ; RUN: llvm-as < %s | llc -march=arm -mcpu=cortex-a9 | grep -E {fmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
0 ; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
1 ; RUN: llc < %s -march=arm -mattr=+neon,+neonfp | grep -E {vmla.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
2 ; RUN: llc < %s -march=arm -mattr=+neon,-neonfp | grep -E {fmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
3 ; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {vmla.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
4 ; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {fmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
55
66 define float @test(float %acc, float %a, float %b) {
77 entry:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=vfp2 | not grep fmdrr
1 ; RUN: llvm-as < %s | llc -march=arm -mattr=vfp2 | not grep fmrrd
0 ; RUN: llc < %s -march=arm -mattr=vfp2 | not grep fmdrr
1 ; RUN: llc < %s -march=arm -mattr=vfp2 | not grep fmrrd
22
33 ; naive codegen for this is:
44 ; _i:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep -E {fmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
2 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep -E {fmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
3 ; RUN: llvm-as < %s | llc -march=arm -mcpu=cortex-a8 | grep -E {fmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
4 ; RUN: llvm-as < %s | llc -march=arm -mcpu=cortex-a9 | grep -E {fmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
0 ; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
1 ; RUN: llc < %s -march=arm -mattr=+neon,+neonfp | grep -E {fmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
2 ; RUN: llc < %s -march=arm -mattr=+neon,-neonfp | grep -E {fmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
3 ; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {fmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
4 ; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {fmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
55
66 define float @test(float %acc, float %a, float %b) {
77 entry:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fmuls\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep -E {vmul.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
2 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep -E {fmuls\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
3 ; RUN: llvm-as < %s | llc -march=arm -mcpu=cortex-a8 | grep -E {vmul.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
4 ; RUN: llvm-as < %s | llc -march=arm -mcpu=cortex-a9 | grep -E {fmuls\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
0 ; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fmuls\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
1 ; RUN: llc < %s -march=arm -mattr=+neon,+neonfp | grep -E {vmul.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
2 ; RUN: llc < %s -march=arm -mattr=+neon,-neonfp | grep -E {fmuls\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
3 ; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {vmul.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
4 ; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {fmuls\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
55
66 define float @test(float %a, float %b) {
77 entry:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fnegs\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2
1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep -E {vneg.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 2
2 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep -E {fnegs\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2
3 ; RUN: llvm-as < %s | llc -march=arm -mcpu=cortex-a8 | grep -E {vneg.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 2
4 ; RUN: llvm-as < %s | llc -march=arm -mcpu=cortex-a9 | grep -E {fnegs\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2
0 ; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fnegs\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2
1 ; RUN: llc < %s -march=arm -mattr=+neon,+neonfp | grep -E {vneg.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 2
2 ; RUN: llc < %s -march=arm -mattr=+neon,-neonfp | grep -E {fnegs\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2
3 ; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {vneg.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 2
4 ; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {fnegs\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2
55
66 define float @test1(float* %a) {
77 entry:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fnmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep -E {vmls.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
2 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep -E {fnmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
3 ; RUN: llvm-as < %s | llc -march=arm -mcpu=cortex-a8 | grep -E {vmls.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
4 ; RUN: llvm-as < %s | llc -march=arm -mcpu=cortex-a9 | grep -E {fnmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
0 ; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fnmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
1 ; RUN: llc < %s -march=arm -mattr=+neon,+neonfp | grep -E {vmls.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
2 ; RUN: llc < %s -march=arm -mattr=+neon,-neonfp | grep -E {fnmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
3 ; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {vmls.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
4 ; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {fnmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
55
66 define float @test(float %acc, float %a, float %b) {
77 entry:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | FileCheck %s
1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | FileCheck %s
2 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | FileCheck %s
3 ; RUN: llvm-as < %s | llc -march=arm -mcpu=cortex-a8 | FileCheck %s
4 ; RUN: llvm-as < %s | llc -march=arm -mcpu=cortex-a9 | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s
1 ; RUN: llc < %s -march=arm -mattr=+neon,+neonfp | FileCheck %s
2 ; RUN: llc < %s -march=arm -mattr=+neon,-neonfp | FileCheck %s
3 ; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s
4 ; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s
55
66 define float @test1(float %acc, float %a, float %b) nounwind {
77 ; CHECK: fnmscs s2, s1, s0
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 | grep fnmuld
1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 -enable-sign-dependent-rounding-fp-math | grep fmul
0 ; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | grep fnmuld
1 ; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 -enable-sign-dependent-rounding-fp-math | grep fmul
22
33
44 define double @t1(double %a, double %b) {
0 ; XFAIL: *
1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | FileCheck %s
2 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | FileCheck %s
3 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | FileCheck %s
4 ; RUN: llvm-as < %s | llc -march=arm -mcpu=cortex-a8 | FileCheck %s
5 ; RUN: llvm-as < %s | llc -march=arm -mcpu=cortex-a9 | FileCheck %s
1 ; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s
2 ; RUN: llc < %s -march=arm -mattr=+neon,+neonfp | FileCheck %s
3 ; RUN: llc < %s -march=arm -mattr=+neon,-neonfp | FileCheck %s
4 ; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s
5 ; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s
66
77 define float @test1(float %a, float %b) nounwind {
88 ; CHECK: fnmscs s2, s1, s0
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2
0 ; RUN: llc < %s -march=arm -mattr=+vfp2
11
22 declare void @bar(i64 %x, i64 %y)
33
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 > %t
0 ; RUN: llc < %s -march=arm -mattr=+vfp2 > %t
11 ; RUN: grep fmsr %t | count 4
22 ; RUN: grep fsitos %t
33 ; RUN: grep fmrs %t | count 2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2
1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | FileCheck %s -check-prefix=NEON
2 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | FileCheck %s -check-prefix=VFP2
3 ; RUN: llvm-as < %s | llc -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=NEON
4 ; RUN: llvm-as < %s | llc -march=arm -mcpu=cortex-a9 | FileCheck %s -check-prefix=VFP2
0 ; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2
1 ; RUN: llc < %s -march=arm -mattr=+neon,+neonfp | FileCheck %s -check-prefix=NEON
2 ; RUN: llc < %s -march=arm -mattr=+neon,-neonfp | FileCheck %s -check-prefix=VFP2
3 ; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=NEON
4 ; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s -check-prefix=VFP2
55
66 define i32 @test1(float %a, float %b) {
77 ; VFP2: test1:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 > %t
0 ; RUN: llc < %s -march=arm -mattr=+vfp2 > %t
11 ; RUN: grep fadds %t
22 ; RUN: grep faddd %t
33 ; RUN: grep fmuls %t
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 > %t
0 ; RUN: llc < %s -march=arm -mattr=+vfp2 > %t
11 ; RUN: grep movmi %t
22 ; RUN: grep moveq %t
33 ; RUN: grep movgt %t
None ; RUN: llvm-as < %s | llc -march=arm | grep moveq
1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep movvs
0 ; RUN: llc < %s -march=arm | grep moveq
1 ; RUN: llc < %s -march=arm -mattr=+vfp2 | grep movvs
22
33 define i32 @f7(float %a, float %b) {
44 entry:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 > %t
0 ; RUN: llc < %s -march=arm -mattr=+vfp2 > %t
11 ; RUN: grep fcvtsd %t
22 ; RUN: grep fcvtds %t
33 ; RUN: grep ftosizs %t
88 ; RUN: grep fsitod %t
99 ; RUN: grep fuitos %t
1010 ; RUN: grep fuitod %t
11 ; RUN: llvm-as < %s | llc -march=arm > %t
11 ; RUN: llc < %s -march=arm > %t
1212 ; RUN: grep truncdfsf2 %t
1313 ; RUN: grep extendsfdf2 %t
1414 ; RUN: grep fixsfsi %t
None ; RUN: llvm-as < %s | llc -march=arm | \
0 ; RUN: llc < %s -march=arm | \
11 ; RUN: grep {mov r0, #0} | count 1
2 ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | \
2 ; RUN: llc < %s -march=arm -mattr=+vfp2 | \
33 ; RUN: grep {flds.*\\\[} | count 1
4 ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | \
4 ; RUN: llc < %s -march=arm -mattr=+vfp2 | \
55 ; RUN: grep {fsts.*\\\[} | count 1
66
77 define float @f1(float %a) {
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11
22 define double @t(double %x, double %y) nounwind optsize {
33 entry:
None ; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | grep powidf2
0 ; RUN: llc < %s -mtriple=arm-linux-gnueabi | grep powidf2
11 ; PR1287
22
33 ; ModuleID = ''
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 | grep fmrs | count 1
1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 | not grep fmrrd
0 ; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | grep fmrs | count 1
1 ; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | not grep fmrrd
22
33 @i = weak global i32 0 ; [#uses=2]
44 @u = weak global i32 0 ; [#uses=2]
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fsubs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep -E {vsub.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
2 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep -E {fsubs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
0 ; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fsubs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
1 ; RUN: llc < %s -march=arm -mattr=+neon,+neonfp | grep -E {vsub.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
2 ; RUN: llc < %s -march=arm -mattr=+neon,-neonfp | grep -E {fsubs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
33
44 define float @test(float %a, float %b) {
55 entry:
None ; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi -mattr=+neon -float-abi=hard
0 ; RUN: llc < %s -mtriple=arm-linux-gnueabi -mattr=+neon -float-abi=hard
11
22 define <16 x i8> @vmulQi8_reg(<16 x i8> %A, <16 x i8> %B) nounwind {
33 %tmp1 = mul <16 x i8> %A, %B
None ; RUN: llvm-as < %s | llc -march=arm
1 ; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | grep mov | count 1
2 ; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnu --disable-fp-elim | \
0 ; RUN: llc < %s -march=arm
1 ; RUN: llc < %s -mtriple=arm-linux-gnueabi | grep mov | count 1
2 ; RUN: llc < %s -mtriple=arm-linux-gnu --disable-fp-elim | \
33 ; RUN: grep mov | count 3
4 ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep mov | count 2
4 ; RUN: llc < %s -mtriple=arm-apple-darwin | grep mov | count 2
55
66 @str = internal constant [12 x i8] c"Hello World\00"
77
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | FileCheck %s
0 ; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s
11
22 @x = weak hidden global i32 0 ; [#uses=1]
33
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin9 | FileCheck %s
0 ; RUN: llc < %s -mtriple=arm-apple-darwin9 | FileCheck %s
11
22 @x = external hidden global i32 ; [#uses=1]
33 @y = extern_weak hidden global i32 ; [#uses=1]
None ; RUN: llvm-as < %s | llc -mtriple=arm-linux | FileCheck %s -check-prefix=LINUX
1 ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | FileCheck %s -check-prefix=DARWIN
0 ; RUN: llc < %s -mtriple=arm-linux | FileCheck %s -check-prefix=LINUX
1 ; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s -check-prefix=DARWIN
22
33 @a = hidden global i32 0
44 @b = external global i32
None ; RUN: llvm-as < %s | llc -march=arm -stats |& \
0 ; RUN: llc < %s -march=arm -stats |& \
11 ; RUN: grep {3 .*Number of machine instrs printed}
22
33 ;; Integer absolute value, should produce something as good as: ARM:
None ; RUN: llvm-as < %s | llc -march=arm
1 ; RUN: llvm-as < %s | llc -march=arm | grep bx | count 1
0 ; RUN: llc < %s -march=arm
1 ; RUN: llc < %s -march=arm | grep bx | count 1
22
33 define i32 @t1(i32 %a, i32 %b) {
44 %tmp2 = icmp eq i32 %a, 0
None ; RUN: llvm-as < %s | llc -march=arm
1 ; RUN: llvm-as < %s | llc -march=arm | grep bxlt | count 1
2 ; RUN: llvm-as < %s | llc -march=arm | grep bxgt | count 1
3 ; RUN: llvm-as < %s | llc -march=arm | grep bxge | count 1
0 ; RUN: llc < %s -march=arm
1 ; RUN: llc < %s -march=arm | grep bxlt | count 1
2 ; RUN: llc < %s -march=arm | grep bxgt | count 1
3 ; RUN: llc < %s -march=arm | grep bxge | count 1
44
55 define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) {
66 %tmp2 = icmp sgt i32 %c, 10
None ; RUN: llvm-as < %s | llc -march=arm
1 ; RUN: llvm-as < %s | llc -march=arm | grep cmpne | count 1
2 ; RUN: llvm-as < %s | llc -march=arm | grep bx | count 2
0 ; RUN: llc < %s -march=arm
1 ; RUN: llc < %s -march=arm | grep cmpne | count 1
2 ; RUN: llc < %s -march=arm | grep bx | count 2
33
44 define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) {
55 switch i32 %c, label %cond_next [
None ; RUN: llvm-as < %s | llc -march=arm
1 ; RUN: llvm-as < %s | llc -march=arm | grep subgt | count 1
2 ; RUN: llvm-as < %s | llc -march=arm | grep suble | count 1
0 ; RUN: llc < %s -march=arm
1 ; RUN: llc < %s -march=arm | grep subgt | count 1
2 ; RUN: llc < %s -march=arm | grep suble | count 1
33 ; FIXME: Check for # of unconditional branch after adding branch folding post ifcvt.
44
55 define i32 @t(i32 %a, i32 %b) {
None ; RUN: llvm-as < %s | llc -march=arm
1 ; RUN: llvm-as < %s | llc -march=arm | grep blge | count 1
0 ; RUN: llc < %s -march=arm
1 ; RUN: llc < %s -march=arm | grep blge | count 1
22
33 @x = external global i32* ; [#uses=1]
44
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11
22 define fastcc void @t() nounwind {
33 entry:
None ; RUN: llvm-as < %s | llc -march=arm
1 ; RUN: llvm-as < %s | llc -mtriple=arm-linux
0 ; RUN: llc < %s -march=arm
1 ; RUN: llc < %s -mtriple=arm-linux
22
33 define void @foo(<8 x float>* %f, <8 x float>* %g, <4 x i64>* %y)
44 {
None ; RUN: llvm-as < %s | llc -march=arm | not grep CPI
0 ; RUN: llc < %s -march=arm | not grep CPI
11
22 define i32 @test1(i32 %A) {
33 %B = add i32 %A, -268435441 ; [#uses=1]
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11
22 ; Test ARM-mode "I" constraint, for any Data Processing immediate.
33 define i32 @testI(i32 %x) {
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6
0 ; RUN: llc < %s -march=arm -mattr=+v6
11
22 define i32 @test1(i32 %tmp54) {
33 %tmp56 = tail call i32 asm "uxtb16 $0,$1", "=r,r"( i32 %tmp54 ) ; [#uses=1]
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2
0 ; RUN: llc < %s -march=arm -mattr=+vfp2
11
22 define double @__ieee754_sqrt(double %x) {
33 %tmp2 = tail call double asm "fsqrtd ${0:P}, ${1:P}", "=w,w"( double %x )
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6
1 ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+v6 |\
0 ; RUN: llc < %s -march=arm -mattr=+v6
1 ; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6 |\
22 ; RUN: grep mov | count 3
33
44 define i32 @test(i32 %x) {
None ; RUN: llvm-as < %s | llc -march=arm | grep {mov r0, r0, lsr #31}
0 ; RUN: llc < %s -march=arm | grep {mov r0, r0, lsr #31}
11
22 define i32 @test1(i32 %X) {
33 entry:
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11
22 define void @test1() {
33 %tmp = alloca [ 64 x i32 ] , align 4
None ; RUN: llvm-as < %s | llc -march=arm | \
0 ; RUN: llc < %s -march=arm | \
11 ; RUN: grep ldmia | count 2
2 ; RUN: llvm-as < %s | llc -march=arm | \
2 ; RUN: llc < %s -march=arm | \
33 ; RUN: grep ldmib | count 1
4 ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | \
4 ; RUN: llc < %s -mtriple=arm-apple-darwin | \
55 ; RUN: grep {ldmfd sp\!} | count 3
66
77 @X = external global [0 x i32] ; <[0 x i32]*> [#uses=5]
None ; RUN: llvm-as < %s | llc -march=arm | grep {ldr r0} | count 7
1 ; RUN: llvm-as < %s | llc -march=arm | grep mov | grep 1
2 ; RUN: llvm-as < %s | llc -march=arm | not grep mvn
3 ; RUN: llvm-as < %s | llc -march=arm | grep ldr | grep lsl
4 ; RUN: llvm-as < %s | llc -march=arm | grep ldr | grep lsr
0 ; RUN: llc < %s -march=arm | grep {ldr r0} | count 7
1 ; RUN: llc < %s -march=arm | grep mov | grep 1
2 ; RUN: llc < %s -march=arm | not grep mvn
3 ; RUN: llc < %s -march=arm | grep ldr | grep lsl
4 ; RUN: llc < %s -march=arm | grep ldr | grep lsr
55
66 define i32 @f1(i32* %v) {
77 entry:
None ; RUN: llvm-as < %s | llc -march=arm | FileCheck %s
0 ; RUN: llc < %s -march=arm | FileCheck %s
11
22 define i32 @test1(i8* %t1) nounwind {
33 ; CHECK: ldrb
None ; RUN: llvm-as < %s | llc -march=arm | not grep mov
0 ; RUN: llc < %s -march=arm | not grep mov
11
22 define i32 @f1() {
33 %buf = alloca [32 x i32], align 4
None ; RUN: llvm-as < %s | llc -march=arm | \
0 ; RUN: llc < %s -march=arm | \
11 ; RUN: grep {ldr.*\\\[.*\],} | count 1
22
33 define i32 @test(i32 %a, i32 %b, i32 %c) {
None ; RUN: llvm-as < %s | llc -march=arm | \
0 ; RUN: llc < %s -march=arm | \
11 ; RUN: grep {ldr.*\\!} | count 2
22
33 define i32* @test1(i32* %X, i32* %dest) {
None ; RUN: llvm-as < %s | llc -mtriple=armv6-apple-darwin | grep ldrd
1 ; RUN: llvm-as < %s | llc -mtriple=armv5-apple-darwin | not grep ldrd
2 ; RUN: llvm-as < %s | llc -mtriple=armv6-eabi | not grep ldrd
0 ; RUN: llc < %s -mtriple=armv6-apple-darwin | grep ldrd
1 ; RUN: llc < %s -mtriple=armv5-apple-darwin | not grep ldrd
2 ; RUN: llc < %s -mtriple=armv6-eabi | not grep ldrd
33 ; rdar://r6949835
44
55 @b = external global i64*
None ; RUN: llvm-as < %s | llc -march=arm > %t
0 ; RUN: llc < %s -march=arm > %t
11 ; RUN: grep ldrsb %t
22 ; RUN: grep ldrb %t
33 ; RUN: grep ldrsh %t
None ; RUN: llvm-as < %s | llc -march=arm | grep cmp | count 1
0 ; RUN: llc < %s -march=arm | grep cmp | count 1
11
22
33 define i1 @t1(i64 %x) {
None ; RUN: llvm-as < %s | llc -march=arm -asm-verbose | \
0 ; RUN: llc < %s -march=arm -asm-verbose | \
11 ; RUN: grep -- {-2147483648} | count 3
2 ; RUN: llvm-as < %s | llc -march=arm | grep mvn | count 3
3 ; RUN: llvm-as < %s | llc -march=arm | grep adds | count 1
4 ; RUN: llvm-as < %s | llc -march=arm | grep adc | count 1
5 ; RUN: llvm-as < %s | llc -march=arm | grep {subs } | count 1
6 ; RUN: llvm-as < %s | llc -march=arm | grep sbc | count 1
7 ; RUN: llvm-as < %s | llc -march=arm | \
2 ; RUN: llc < %s -march=arm | grep mvn | count 3
3 ; RUN: llc < %s -march=arm | grep adds | count 1
4 ; RUN: llc < %s -march=arm | grep adc | count 1
5 ; RUN: llc < %s -march=arm | grep {subs } | count 1
6 ; RUN: llc < %s -march=arm | grep sbc | count 1
7 ; RUN: llc < %s -march=arm | \
88 ; RUN: grep smull | count 1
9 ; RUN: llvm-as < %s | llc -march=arm | \
9 ; RUN: llc < %s -march=arm | \
1010 ; RUN: grep umull | count 1
1111
1212 define i64 @f1() {
None ; RUN: llvm-as < %s | llc -march=arm > %t
0 ; RUN: llc < %s -march=arm > %t
11 ; RUN: grep rrx %t | count 1
22 ; RUN: grep __ashldi3 %t
33 ; RUN: grep __ashrdi3 %t
None ; RUN: llvm-as < %s | llc -stats |& grep {40.*Number of machine instrs printed}
1 ; RUN: llvm-as < %s | llc -stats |& grep {.*Number of re-materialization}
0 ; RUN: llc < %s -stats |& grep {40.*Number of machine instrs printed}
1 ; RUN: llc < %s -stats |& grep {.*Number of re-materialization}
22 ; This test really wants to check that the resultant "cond_true" block only
33 ; has a single store in it, and that cond_true55 only has code to materialize
44 ; the constant and do a store. We do *not* want something like this:
None ; RUN: llvm-as < %s | llc -march=arm | grep lsl | grep -F {lsl #2\]}
0 ; RUN: llc < %s -march=arm | grep lsl | grep -F {lsl #2\]}
11 ; Should use scaled addressing mode.
22
33 define void @sintzero(i32* %a) nounwind {
None ; RUN: llvm-as < %s | llc -march=arm | grep strb
1 ; RUN: llvm-as < %s | llc -march=arm | grep strh
0 ; RUN: llc < %s -march=arm | grep strb
1 ; RUN: llc < %s -march=arm | grep strh
22
33 define void @f1() {
44 entry:
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep ldmia
1 ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep stmia
2 ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep ldrb
3 ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep ldrh
0 ; RUN: llc < %s -mtriple=arm-apple-darwin | grep ldmia
1 ; RUN: llc < %s -mtriple=arm-apple-darwin | grep stmia
2 ; RUN: llc < %s -mtriple=arm-apple-darwin | grep ldrb
3 ; RUN: llc < %s -mtriple=arm-apple-darwin | grep ldrh
44
55 %struct.x = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 }
66 @src = external global %struct.x
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11
22 define void @f() {
33 entry:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6t2 | grep {mls\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1
0 ; RUN: llc < %s -march=arm -mattr=+v6t2 | grep {mls\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1
11
22 define i32 @f1(i32 %a, i32 %b, i32 %c) {
33 %tmp1 = mul i32 %a, %b
None ; RUN: llvm-as < %s | llc -march=arm | grep mul | count 2
1 ; RUN: llvm-as < %s | llc -march=arm | grep lsl | count 2
0 ; RUN: llc < %s -march=arm | grep mul | count 2
1 ; RUN: llc < %s -march=arm | grep lsl | count 2
22
33 define i32 @f1(i32 %u) {
44 %tmp = mul i32 %u, %u
None ; RUN: llvm-as < %s | llc -march=arm | FileCheck %s
0 ; RUN: llc < %s -march=arm | FileCheck %s
11
22 define i32 @t1(i32 %v) nounwind readnone {
33 entry:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6
1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | \
0 ; RUN: llc < %s -march=arm -mattr=+v6
1 ; RUN: llc < %s -march=arm -mattr=+v6 | \
22 ; RUN: grep smmul | count 1
3 ; RUN: llvm-as < %s | llc -march=arm | grep umull | count 1
3 ; RUN: llc < %s -march=arm | grep umull | count 1
44
55 define i32 @smulhi(i32 %x, i32 %y) {
66 %tmp = sext i32 %x to i64 ; [#uses=1]
None ; RUN: llvm-as < %s | llc -march=arm | grep mvn | count 8
0 ; RUN: llc < %s -march=arm | grep mvn | count 8
11
22 define i32 @f1() {
33 entry:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | grep vadd
0 ; RUN: llc < %s -march=arm -mattr=+neon | grep vadd
11
22 define <8 x i8> @t_i8x8(<8 x i8> %a, <8 x i8> %b) nounwind {
33 entry:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | grep fldd | count 4
1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | grep fstd
2 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | grep fmrrd
0 ; RUN: llc < %s -march=arm -mattr=+neon | grep fldd | count 4
1 ; RUN: llc < %s -march=arm -mattr=+neon | grep fstd
2 ; RUN: llc < %s -march=arm -mattr=+neon | grep fmrrd
33
44 define void @t1(<2 x i32>* %r, <4 x i16>* %a, <4 x i16>* %b) nounwind {
55 entry:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | grep vldmia | count 4
1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | grep vstmia | count 1
2 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | grep fmrrd | count 2
0 ; RUN: llc < %s -march=arm -mattr=+neon | grep vldmia | count 4
1 ; RUN: llc < %s -march=arm -mattr=+neon | grep vstmia | count 1
2 ; RUN: llc < %s -march=arm -mattr=+neon | grep fmrrd | count 2
33
44 define void @t1(<4 x i32>* %r, <2 x i64>* %a, <2 x i64>* %b) nounwind {
55 entry:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | \
0 ; RUN: llc < %s -march=arm -mattr=+v6 | \
11 ; RUN: grep pkhbt | count 5
2 ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | \
2 ; RUN: llc < %s -march=arm -mattr=+v6 | \
33 ; RUN: grep pkhtb | count 4
44
55 define i32 @test1(i32 %X, i32 %Y) {
None ; RUN: llvm-as < %s | llc -mtriple=arm-none-linux-gnueabi
0 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi
11 ;pr3502
22
33 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
0 ; Test to make sure that the 'private' is used correctly.
11 ;
2 ; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi > %t
2 ; RUN: llc < %s -mtriple=arm-linux-gnueabi > %t
33 ; RUN: grep .Lfoo: %t
44 ; RUN: egrep bl.*\.Lfoo %t
55 ; RUN: grep .Lbaz: %t
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
1 ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -stats -info-output-file - | grep "Number of re-materialization" | grep 2
0 ; RUN: llc < %s -mtriple=arm-apple-darwin
1 ; RUN: llc < %s -mtriple=arm-apple-darwin -stats -info-output-file - | grep "Number of re-materialization" | grep 2
22
33 %struct.CONTENTBOX = type { i32, i32, i32, i32, i32 }
44 %struct.LOCBOX = type { i32, i32, i32, i32 }
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11
22 define i32 @test() {
33 ret i32 0
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11
22 define i32 @test(i32 %a1) {
33 ret i32 %a1
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11
22 define i32 @test(i32 %a1, i32 %a2) {
33 ret i32 %a2
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11 define i32 @test(i32 %a1, i32 %a2, i32 %a3) {
22 ret i32 %a3
33 }
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11
22 define i32 @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
33 ret i32 %a4
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11
22 define i32 @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5) {
33 ret i32 %a5
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2
0 ; RUN: llc < %s -march=arm -mattr=+vfp2
11
22 define float @test_f32(float %a1, float %a2) {
33 ret float %a2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2
0 ; RUN: llc < %s -march=arm -mattr=+vfp2
11
22 define float @test_f32_arg5(float %a1, float %a2, float %a3, float %a4, float %a5) {
33 ret float %a5
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2
0 ; RUN: llc < %s -march=arm -mattr=+vfp2
11
22 define double @test_f64(double %a1, double %a2) {
33 ret double %a2
None ; RUN: llvm-as < %s | llc -march=arm -mcpu=arm8 -mattr=+vfp2
0 ; RUN: llc < %s -march=arm -mcpu=arm8 -mattr=+vfp2
11
22 define double @test_double_arg_reg_split(i32 %a1, double %a2) {
33 ret double %a2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2
0 ; RUN: llc < %s -march=arm -mattr=+vfp2
11
22 define double @test_double_arg_split(i64 %a1, i32 %a2, double %a3) {
33 ret double %a3
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2
0 ; RUN: llc < %s -march=arm -mattr=+vfp2
11
22 define double @test_double_arg_stack(i64 %a1, i32 %a2, i32 %a3, double %a4) {
33 ret double %a4
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2
0 ; RUN: llc < %s -march=arm -mattr=+vfp2
11
22 define i128 @test_i128(i128 %a1, i128 %a2, i128 %a3) {
33 ret i128 %a3
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2
0 ; RUN: llc < %s -march=arm -mattr=+vfp2
11
22 define i64 @test_i64(i64 %a1, i64 %a2) {
33 ret i64 %a2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2
0 ; RUN: llc < %s -march=arm -mattr=+vfp2
11
22 define i64 @test_i64_arg3(i64 %a1, i64 %a2, i64 %a3) {
33 ret i64 %a3
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2
0 ; RUN: llc < %s -march=arm -mattr=+vfp2
11
22 define i64 @test_i64_arg_split(i64 %a1, i32 %a2, i64 %a3) {
33 ret i64 %a3
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11
22 define void @test() {
33 ret void
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep rev16
1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep revsh
0 ; RUN: llc < %s -march=arm -mattr=+v6 | grep rev16
1 ; RUN: llc < %s -march=arm -mattr=+v6 | grep revsh
22
33 define i32 @test1(i32 %X) {
44 %tmp1 = lshr i32 %X, 8 ; [#uses=3]
None ; RUN: llvm-as < %s | llc -mtriple=arm-linux | \
0 ; RUN: llc < %s -mtriple=arm-linux | \
11 ; RUN: grep {__DTOR_END__:}
2 ; RUN: llvm-as < %s | llc -mtriple=arm-linux | \
2 ; RUN: llc < %s -mtriple=arm-linux | \
33 ; RUN: grep {\\.section.\\.dtors,"aw",.progbits}
44
55 @__DTOR_END__ = internal global [1 x i32] zeroinitializer, section ".dtors" ; <[1 x i32]*> [#uses=0]
None ; RUN: llvm-as < %s | llc -march=arm | grep moveq | count 1
1 ; RUN: llvm-as < %s | llc -march=arm | grep movgt | count 1
2 ; RUN: llvm-as < %s | llc -march=arm | grep movlt | count 3
3 ; RUN: llvm-as < %s | llc -march=arm | grep movle | count 1
4 ; RUN: llvm-as < %s | llc -march=arm | grep movls | count 1
5 ; RUN: llvm-as < %s | llc -march=arm | grep movhi | count 1
6 ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | \
0 ; RUN: llc < %s -march=arm | grep moveq | count 1
1 ; RUN: llc < %s -march=arm | grep movgt | count 1
2 ; RUN: llc < %s -march=arm | grep movlt | count 3
3 ; RUN: llc < %s -march=arm | grep movle | count 1
4 ; RUN: llc < %s -march=arm | grep movls | count 1
5 ; RUN: llc < %s -march=arm | grep movhi | count 1
6 ; RUN: llc < %s -march=arm -mattr=+vfp2 | \
77 ; RUN: grep fcpydmi | count 1
88
99 define i32 @f1(i32 %a.s) {
None ; RUN: llvm-as < %s | llc -march=arm | grep mov | count 2
0 ; RUN: llc < %s -march=arm | grep mov | count 2
11
22 define i32 @t1(i32 %a, i32 %b, i32 %c) nounwind {
33 %tmp1 = icmp sgt i32 %c, 10
None ; RUN: llvm-as < %s | llc -march=arm | grep add | grep lsl
1 ; RUN: llvm-as < %s | llc -march=arm | grep bic | grep asr
0 ; RUN: llc < %s -march=arm | grep add | grep lsl
1 ; RUN: llc < %s -march=arm | grep bic | grep asr
22
33
44 define i32 @test1(i32 %X, i32 %Y, i8 %sh) {
None ; RUN: llvm-as < %s | llc -march=arm
1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+v5TE
2 ; RUN: llvm-as < %s | llc -march=arm -mattr=+v5TE | \
0 ; RUN: llc < %s -march=arm
1 ; RUN: llc < %s -march=arm -mattr=+v5TE
2 ; RUN: llc < %s -march=arm -mattr=+v5TE | \
33 ; RUN: grep smulbt | count 1
4 ; RUN: llvm-as < %s | llc -march=arm -mattr=+v5TE | \
4 ; RUN: llc < %s -march=arm -mattr=+v5TE | \
55 ; RUN: grep smultt | count 1
6 ; RUN: llvm-as < %s | llc -march=arm -mattr=+v5TE | \
6 ; RUN: llc < %s -march=arm -mattr=+v5TE | \
77 ; RUN: grep smlabt | count 1
88
99 @x = weak global i16 0 ; [#uses=1]
None ; RUN: llvm-as < %s | llc -mtriple=armv7-elf -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -mtriple=armv7-elf -mattr=+neon | FileCheck %s
11 ; PR4789
22
33 %bar = type { float, float, float }
None ; RUN: llvm-as < %s | llc -march=arm
1 ; RUN: llvm-as < %s | llc -march=arm | grep add | count 1
0 ; RUN: llc < %s -march=arm
1 ; RUN: llc < %s -march=arm | grep add | count 1
22
33 define void @f1() {
44 %c = alloca i8, align 1
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+v6,+vfp2 | grep stm | count 2
0 ; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6,+vfp2 | grep stm | count 2
11
22 @"\01LC" = internal constant [32 x i8] c"Boolean Not: %d %d %d %d %d %d\0A\00", section "__TEXT,__cstring,cstring_literals" ; <[32 x i8]*> [#uses=1]
33 @"\01LC1" = internal constant [26 x i8] c"Bitwise Not: %d %d %d %d\0A\00", section "__TEXT,__cstring,cstring_literals" ; <[26 x i8]*> [#uses=1]
None ; RUN: llvm-as < %s | llc -march=arm | \
0 ; RUN: llc < %s -march=arm | \
11 ; RUN: grep {strh .*\\\[.*\], #-4} | count 1
2 ; RUN: llvm-as < %s | llc -march=arm | \
2 ; RUN: llc < %s -march=arm | \
33 ; RUN: grep {str .*\\\[.*\],} | count 1
44
55 define i16 @test1(i32* %X, i16* %A) {
None ; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnu | grep {str.*\\!}
1 ; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnu | grep {ldr.*\\\[.*\], #+4}
0 ; RUN: llc < %s -mtriple=arm-linux-gnu | grep {str.*\\!}
1 ; RUN: llc < %s -mtriple=arm-linux-gnu | grep {ldr.*\\\[.*\], #+4}
22
33 @b = external global i64*
44
None ; RUN: llvm-as < %s | llc -march=arm | \
0 ; RUN: llc < %s -march=arm | \
11 ; RUN: grep {str.*\\!} | count 2
22
33 define void @test1(i32* %X, i32* %A, i32** %dest) {
None ; RUN: llvm-as < %s | llc -march=arm | \
0 ; RUN: llc < %s -march=arm | \
11 ; RUN: grep strb | count 1
2 ; RUN: llvm-as < %s | llc -march=arm | \
2 ; RUN: llc < %s -march=arm | \
33 ; RUN: grep strh | count 1
44
55 define void @test1(i32 %v, i16* %ptr) {
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | \
0 ; RUN: llc < %s -march=arm -mattr=+v6 | \
11 ; RUN: grep sxtb | count 2
2 ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | \
2 ; RUN: llc < %s -march=arm -mattr=+v6 | \
33 ; RUN: grep sxtb | grep ror | count 1
4 ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | \
4 ; RUN: llc < %s -march=arm -mattr=+v6 | \
55 ; RUN: grep sxtab | count 1
66
77 define i32 @test0(i8 %A) {
None ; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \
0 ; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi | \
11 ; RUN: grep {__aeabi_read_tp}
22
33 define i8* @test() {
None ; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \
0 ; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi | \
11 ; RUN: grep {i(tpoff)}
2 ; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \
2 ; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi | \
33 ; RUN: grep {__aeabi_read_tp}
4 ; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi \
4 ; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi \
55 ; RUN: -relocation-model=pic | grep {__tls_get_addr}
66
77
None ; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \
0 ; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi | \
11 ; RUN: grep {i(gottpoff)}
2 ; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \
2 ; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi | \
33 ; RUN: grep {ldr r., \[pc, r.\]}
4 ; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi \
4 ; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi \
55 ; RUN: -relocation-model=pic | grep {__tls_get_addr}
66
77 @i = external thread_local global i32 ; [#uses=2]
None ; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \
0 ; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi | \
11 ; RUN: grep {tbss}
22
33 %struct.anon = type { i32, i32 }
None ; RUN: llvm-as < %s | llc -march=arm | grep ldrb.*7 | count 1
1 ; RUN: llvm-as < %s | llc -march=arm | grep ldrsb.*7 | count 1
0 ; RUN: llc < %s -march=arm | grep ldrb.*7 | count 1
1 ; RUN: llc < %s -march=arm | grep ldrsb.*7 | count 1
22
33 %struct.A = type { i8, i8, i8, i8, i16, i8, i8, %struct.B** }
44 %struct.B = type { float, float, i32, i32, i32, [0 x i8] }
None ; RUN: llvm-as < %s | llc -march=arm | not grep orr
1 ; RUN: llvm-as < %s | llc -march=arm | not grep mov
0 ; RUN: llc < %s -march=arm | not grep orr
1 ; RUN: llc < %s -march=arm | not grep mov
22
33 define void @bar(i8* %P, i16* %Q) {
44 entry:
None ; RUN: llvm-as < %s | llc -march=arm | grep tst
1 ; RUN: llvm-as < %s | llc -march=arm | grep teq
0 ; RUN: llc < %s -march=arm | grep tst
1 ; RUN: llc < %s -march=arm | grep teq
22
33 define i32 @f(i32 %a) {
44 entry:
None ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+vfp2
0 ; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+vfp2
11
22 %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
33 %struct.__sFILEX = type opaque
None ; RUN: llvm-as < %s | llc -march=arm | FileCheck %s -check-prefix=GENERIC
1 ; RUN: llvm-as < %s | llc -mtriple=armv6-apple-darwin | FileCheck %s -check-prefix=DARWIN_V6
2 ; RUN: llvm-as < %s | llc -march=arm -mattr=+v7a | FileCheck %s -check-prefix=V7
0 ; RUN: llc < %s -march=arm | FileCheck %s -check-prefix=GENERIC
1 ; RUN: llc < %s -mtriple=armv6-apple-darwin | FileCheck %s -check-prefix=DARWIN_V6
2 ; RUN: llc < %s -march=arm -mattr=+v7a | FileCheck %s -check-prefix=V7
33
44 ; rdar://7113725
55
None ; RUN: llvm-as < %s | llc -march=arm | grep movne | count 1
1 ; RUN: llvm-as < %s | llc -march=arm | grep moveq | count 1
0 ; RUN: llc < %s -march=arm | grep movne | count 1
1 ; RUN: llc < %s -march=arm | grep moveq | count 1
22
33 define i32 @f1(float %X, float %Y) {
44 %tmp = fcmp uno float %X, %Y
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep uxtb | count 1
1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep uxtab | count 1
2 ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep uxth | count 1
0 ; RUN: llc < %s -march=arm -mattr=+v6 | grep uxtb | count 1
1 ; RUN: llc < %s -march=arm -mattr=+v6 | grep uxtab | count 1
2 ; RUN: llc < %s -march=arm -mattr=+v6 | grep uxth | count 1
33
44 define i8 @test1(i32 %A.u) zeroext {
55 %B.u = trunc i32 %A.u to i8
None ; RUN: llvm-as < %s | llc -mtriple=armv6-apple-darwin | \
0 ; RUN: llc < %s -mtriple=armv6-apple-darwin | \
11 ; RUN: grep uxt | count 10
22
33 define i32 @test1(i32 %x) {
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define <8 x i8> @vabas8(<8 x i8>* %A, <8 x i8>* %B, <8 x i8>* %C) nounwind {
33 ;CHECK: vabas8:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define <8 x i16> @vabals8(<8 x i16>* %A, <8 x i8>* %B, <8 x i8>* %C) nounwind {
33 ;CHECK: vabals8:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define <8 x i8> @vabds8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
33 ;CHECK: vabds8:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define <8 x i16> @vabdls8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
33 ;CHECK: vabdls8:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define <8 x i8> @vabss8(<8 x i8>* %A) nounwind {
33 ;CHECK: vabss8:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define <2 x i32> @vacgef32(<2 x float>* %A, <2 x float>* %B) nounwind {
33 ;CHECK: vacgef32:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define <2 x i32> @vacgtf32(<2 x float>* %A, <2 x float>* %B) nounwind {
33 ;CHECK: vacgtf32:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define <8 x i8> @vaddi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
33 ;CHECK: vaddi8:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define <8 x i8> @vaddhni16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
33 ;CHECK: vaddhni16:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define <8 x i16> @vaddls8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
33 ;CHECK: vaddls8:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define <8 x i16> @vaddws8(<8 x i16>* %A, <8 x i8>* %B) nounwind {
33 ;CHECK: vaddws8:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define <8 x i8> @v_andi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
33 ;CHECK: v_andi8:
None ; RUN: llvm-as < %s | llc -march=arm
0 ; RUN: llc < %s -march=arm
11 @str = internal constant [43 x i8] c"Hello World %d %d %d %d %d %d %d %d %d %d\0A\00" ; <[43 x i8]*> [#uses=1]
22
33 define i32 @main() {
None ; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \
0 ; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi | \
11 ; RUN: grep {add sp, sp, #16} | count 1
2 ; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnu | \
2 ; RUN: llc < %s -march=arm -mtriple=arm-linux-gnu | \
33 ; RUN: grep {add sp, sp, #12} | count 2
44
55 define i32 @f(i32 %a, ...) {
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define <8 x i8> @v_bici8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
33 ;CHECK: v_bici8:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define <8 x i8> @v_bsli8(<8 x i8>* %A, <8 x i8>* %B, <8 x i8>* %C) nounwind {
33 ;CHECK: v_bsli8:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define <8 x i8> @vceqi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
33 ;CHECK: vceqi8:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define <8 x i8> @vcges8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
33 ;CHECK: vcges8:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define <8 x i8> @vcgts8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
33 ;CHECK: vcgts8:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define <8 x i8> @vclss8(<8 x i8>* %A) nounwind {
33 ;CHECK: vclss8:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define <8 x i8> @vclz8(<8 x i8>* %A) nounwind {
33 ;CHECK: vclz8:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define <8 x i8> @vcnt8(<8 x i8>* %A) nounwind {
33 ;CHECK: vcnt8:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon
0 ; RUN: llc < %s -march=arm -mattr=+neon
11
22 define <16 x i8> @vcombine8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
33 %tmp1 = load <8 x i8>* %A
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define <2 x i32> @vcvt_f32tos32(<2 x float>* %A) nounwind {
33 ;CHECK: vcvt_f32tos32:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define <2 x i32> @vcvt_f32tos32(<2 x float>* %A) nounwind {
33 ;CHECK: vcvt_f32tos32:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define <8 x i8> @v_dup8(i8 %A) nounwind {
33 ;CHECK: v_dup8:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define <8 x i8> @vduplane8(<8 x i8>* %A) nounwind {
33 ;CHECK: vduplane8:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep veor %t | count 8
22 ; Note: function names do not include "veor" to allow simple grep for opcodes
33
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define arm_apcscc <8 x i8> @test_vextd(<8 x i8>* %A, <8 x i8>* %B) nounwind {
33 ;CHECK: test_vextd:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vceq\\.f32} %t | count 1
22 ; RUN: grep {vcgt\\.f32} %t | count 9
33 ; RUN: grep {vcge\\.f32} %t | count 5
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | \
0 ; RUN: llc < %s -march=arm -mattr=+vfp2 | \
11 ; RUN: grep fabs | count 2
2 ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | \
2 ; RUN: llc < %s -march=arm -mattr=+vfp2 | \
33 ; RUN: grep fmscs | count 1
4 ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | \
4 ; RUN: llc < %s -march=arm -mattr=+vfp2 | \
55 ; RUN: grep fcvt | count 2
6 ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | \
6 ; RUN: llc < %s -march=arm -mattr=+vfp2 | \
77 ; RUN: grep fuito | count 2
8 ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | \
8 ; RUN: llc < %s -march=arm -mattr=+vfp2 | \
99 ; RUN: grep fto.i | count 4
10 ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | \
10 ; RUN: llc < %s -march=arm -mattr=+vfp2 | \
1111 ; RUN: grep bmi | count 1
12 ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | \
12 ; RUN: llc < %s -march=arm -mattr=+vfp2 | \
1313 ; RUN: grep bgt | count 1
14 ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | \
14 ; RUN: llc < %s -march=arm -mattr=+vfp2 | \
1515 ; RUN: grep fcmpezs | count 1
1616
1717 define void @test(float* %P, double* %D) {
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vmov\\.s8} %t | count 2
22 ; RUN: grep {vmov\\.s16} %t | count 2
33 ; RUN: grep {vmov\\.u8} %t | count 2
None ; RUN: llvm-as < %s | llc -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -mattr=+neon | FileCheck %s
11 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
22 target triple = "thumbv7-elf"
33
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vhadd\\.s8} %t | count 2
22 ; RUN: grep {vhadd\\.s16} %t | count 2
33 ; RUN: grep {vhadd\\.s32} %t | count 2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vhsub\\.s8} %t | count 2
22 ; RUN: grep {vhsub\\.s16} %t | count 2
33 ; RUN: grep {vhsub\\.s32} %t | count 2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vceq\\.i8} %t | count 2
22 ; RUN: grep {vceq\\.i16} %t | count 2
33 ; RUN: grep {vceq\\.i32} %t | count 2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define <8 x i8> @vld1i8(i8* %A) nounwind {
33 ;CHECK: vld1i8:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 %struct.__builtin_neon_v8qi2 = type { <8 x i8>, <8 x i8> }
33 %struct.__builtin_neon_v4hi2 = type { <4 x i16>, <4 x i16> }
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 %struct.__builtin_neon_v8qi3 = type { <8 x i8>, <8 x i8>, <8 x i8> }
33 %struct.__builtin_neon_v4hi3 = type { <4 x i16>, <4 x i16>, <4 x i16> }
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 %struct.__builtin_neon_v8qi4 = type { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> }
33 %struct.__builtin_neon_v4hi4 = type { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> }
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 %struct.__builtin_neon_v8qi2 = type { <8 x i8>, <8 x i8> }
33 %struct.__builtin_neon_v4hi2 = type { <4 x i16>, <4 x i16> }
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vmax\\.s8} %t | count 2
22 ; RUN: grep {vmax\\.s16} %t | count 2
33 ; RUN: grep {vmax\\.s32} %t | count 2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vmin\\.s8} %t | count 2
22 ; RUN: grep {vmin\\.s16} %t | count 2
33 ; RUN: grep {vmin\\.s32} %t | count 2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vmla\\.i8} %t | count 2
22 ; RUN: grep {vmla\\.i16} %t | count 2
33 ; RUN: grep {vmla\\.i32} %t | count 2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vmlal\\.s8} %t | count 1
22 ; RUN: grep {vmlal\\.s16} %t | count 1
33 ; RUN: grep {vmlal\\.s32} %t | count 1
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vmls\\.i8} %t | count 2
22 ; RUN: grep {vmls\\.i16} %t | count 2
33 ; RUN: grep {vmls\\.i32} %t | count 2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vmlsl\\.s8} %t | count 1
22 ; RUN: grep {vmlsl\\.s16} %t | count 1
33 ; RUN: grep {vmlsl\\.s32} %t | count 1
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep vmov.i8 %t | count 2
22 ; RUN: grep vmov.i16 %t | count 4
33 ; RUN: grep vmov.i32 %t | count 12
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vmovl\\.s8} %t | count 1
22 ; RUN: grep {vmovl\\.s16} %t | count 1
33 ; RUN: grep {vmovl\\.s32} %t | count 1
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vmovn\\.i16} %t | count 1
22 ; RUN: grep {vmovn\\.i32} %t | count 1
33 ; RUN: grep {vmovn\\.i64} %t | count 1
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vmul\\.i8} %t | count 2
22 ; RUN: grep {vmul\\.i16} %t | count 2
33 ; RUN: grep {vmul\\.i32} %t | count 2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vmull\\.s8} %t | count 1
22 ; RUN: grep {vmull\\.s16} %t | count 1
33 ; RUN: grep {vmull\\.s32} %t | count 1
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep vmvn %t | count 8
22 ; Note: function names do not include "vmvn" to allow simple grep for opcodes
33
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vneg\\.s8} %t | count 2
22 ; RUN: grep {vneg\\.s16} %t | count 2
33 ; RUN: grep {vneg\\.s32} %t | count 2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep vorn %t | count 8
22 ; Note: function names do not include "vorn" to allow simple grep for opcodes
33
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep vorr %t | count 8
22 ; Note: function names do not include "vorr" to allow simple grep for opcodes
33
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vpadal\\.s8} %t | count 2
22 ; RUN: grep {vpadal\\.s16} %t | count 2
33 ; RUN: grep {vpadal\\.s32} %t | count 2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vpadd\\.i8} %t | count 1
22 ; RUN: grep {vpadd\\.i16} %t | count 1
33 ; RUN: grep {vpadd\\.i32} %t | count 1
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vpaddl\\.s8} %t | count 2
22 ; RUN: grep {vpaddl\\.s16} %t | count 2
33 ; RUN: grep {vpaddl\\.s32} %t | count 2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vpmax\\.s8} %t | count 1
22 ; RUN: grep {vpmax\\.s16} %t | count 1
33 ; RUN: grep {vpmax\\.s32} %t | count 1
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vpmin\\.s8} %t | count 1
22 ; RUN: grep {vpmin\\.s16} %t | count 1
33 ; RUN: grep {vpmin\\.s32} %t | count 1
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vqabs\\.s8} %t | count 2
22 ; RUN: grep {vqabs\\.s16} %t | count 2
33 ; RUN: grep {vqabs\\.s32} %t | count 2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vqadd\\.s8} %t | count 2
22 ; RUN: grep {vqadd\\.s16} %t | count 2
33 ; RUN: grep {vqadd\\.s32} %t | count 2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vqdmlal\\.s16} %t | count 1
22 ; RUN: grep {vqdmlal\\.s32} %t | count 1
33
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vqdmlsl\\.s16} %t | count 1
22 ; RUN: grep {vqdmlsl\\.s32} %t | count 1
33
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vqdmulh\\.s16} %t | count 2
22 ; RUN: grep {vqdmulh\\.s32} %t | count 2
33 ; RUN: grep {vqrdmulh\\.s16} %t | count 2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vqdmull\\.s16} %t | count 1
22 ; RUN: grep {vqdmull\\.s32} %t | count 1
33
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vqmovn\\.s16} %t | count 1
22 ; RUN: grep {vqmovn\\.s32} %t | count 1
33 ; RUN: grep {vqmovn\\.s64} %t | count 1
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vqneg\\.s8} %t | count 2
22 ; RUN: grep {vqneg\\.s16} %t | count 2
33 ; RUN: grep {vqneg\\.s32} %t | count 2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vqrshl\\.s8} %t | count 2
22 ; RUN: grep {vqrshl\\.s16} %t | count 2
33 ; RUN: grep {vqrshl\\.s32} %t | count 2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vqrshrn\\.s16} %t | count 1
22 ; RUN: grep {vqrshrn\\.s32} %t | count 1
33 ; RUN: grep {vqrshrn\\.s64} %t | count 1
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vqshl\\.s8} %t | count 4
22 ; RUN: grep {vqshl\\.s16} %t | count 4
33 ; RUN: grep {vqshl\\.s32} %t | count 4
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vqshrn\\.s16} %t | count 1
22 ; RUN: grep {vqshrn\\.s32} %t | count 1
33 ; RUN: grep {vqshrn\\.s64} %t | count 1
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vqsub\\.s8} %t | count 2
22 ; RUN: grep {vqsub\\.s16} %t | count 2
33 ; RUN: grep {vqsub\\.s32} %t | count 2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vraddhn\\.i16} %t | count 1
22 ; RUN: grep {vraddhn\\.i32} %t | count 1
33 ; RUN: grep {vraddhn\\.i64} %t | count 1
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vrecpe\\.u32} %t | count 2
22 ; RUN: grep {vrecpe\\.f32} %t | count 2
33
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vrecps\\.f32} %t | count 2
22
33 define <2 x float> @vrecpsf32(<2 x float>* %A, <2 x float>* %B) nounwind {
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define arm_apcscc <8 x i8> @test_vrev64D8(<8 x i8>* %A) nounwind {
33 ;CHECK: test_vrev64D8:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vrhadd\\.s8} %t | count 2
22 ; RUN: grep {vrhadd\\.s16} %t | count 2
33 ; RUN: grep {vrhadd\\.s32} %t | count 2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vrshl\\.s8} %t | count 2
22 ; RUN: grep {vrshl\\.s16} %t | count 2
33 ; RUN: grep {vrshl\\.s32} %t | count 2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vrshrn\\.i16} %t | count 1
22 ; RUN: grep {vrshrn\\.i32} %t | count 1
33 ; RUN: grep {vrshrn\\.i64} %t | count 1
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vrsqrte\\.u32} %t | count 2
22 ; RUN: grep {vrsqrte\\.f32} %t | count 2
33
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vrsqrts\\.f32} %t | count 2
22
33 define <2 x float> @vrsqrtsf32(<2 x float>* %A, <2 x float>* %B) nounwind {
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vrsubhn\\.i16} %t | count 1
22 ; RUN: grep {vrsubhn\\.i32} %t | count 1
33 ; RUN: grep {vrsubhn\\.i64} %t | count 1
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vmov\\.8} %t | count 2
22 ; RUN: grep {vmov\\.16} %t | count 2
33 ; RUN: grep {vmov\\.32} %t | count 2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vshl\\.s8} %t | count 2
22 ; RUN: grep {vshl\\.s16} %t | count 2
33 ; RUN: grep {vshl\\.s32} %t | count 2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=-neon
0 ; RUN: llc < %s -march=arm -mattr=-neon
11
22 ; Example that requires splitting and expanding a vector shift.
33 define <2 x i64> @update(<2 x i64> %val) nounwind readnone {
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vsli\\.8} %t | count 2
22 ; RUN: grep {vsli\\.16} %t | count 2
33 ; RUN: grep {vsli\\.32} %t | count 2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vshl\\.s8} %t | count 2
22 ; RUN: grep {vshl\\.s16} %t | count 2
33 ; RUN: grep {vshl\\.s32} %t | count 2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vshll\\.s8} %t | count 1
22 ; RUN: grep {vshll\\.s16} %t | count 1
33 ; RUN: grep {vshll\\.s32} %t | count 1
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vshrn\\.i16} %t | count 1
22 ; RUN: grep {vshrn\\.i32} %t | count 1
33 ; RUN: grep {vshrn\\.i64} %t | count 1
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vsra\\.s8} %t | count 2
22 ; RUN: grep {vsra\\.s16} %t | count 2
33 ; RUN: grep {vsra\\.s32} %t | count 2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define void @vst1i8(i8* %A, <8 x i8>* %B) nounwind {
33 ;CHECK: vst1i8:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define void @vst2i8(i8* %A, <8 x i8>* %B) nounwind {
33 ;CHECK: vst2i8:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define void @vst3i8(i8* %A, <8 x i8>* %B) nounwind {
33 ;CHECK: vst3i8:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define void @vst4i8(i8* %A, <8 x i8>* %B) nounwind {
33 ;CHECK: vst4i8:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 define void @vst2lanei8(i8* %A, <8 x i8>* %B) nounwind {
33 ;CHECK: vst2lanei8:
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vsub\\.i8} %t | count 2
22 ; RUN: grep {vsub\\.i16} %t | count 2
33 ; RUN: grep {vsub\\.i32} %t | count 2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vsubhn\\.i16} %t | count 1
22 ; RUN: grep {vsubhn\\.i32} %t | count 1
33 ; RUN: grep {vsubhn\\.i64} %t | count 1
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vsubl\\.s8} %t | count 1
22 ; RUN: grep {vsubl\\.s16} %t | count 1
33 ; RUN: grep {vsubl\\.s32} %t | count 1
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vsubw\\.s8} %t | count 1
22 ; RUN: grep {vsubw\\.s16} %t | count 1
33 ; RUN: grep {vsubw\\.s32} %t | count 1
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 %struct.__builtin_neon_v8qi2 = type { <8 x i8>, <8 x i8> }
33 %struct.__builtin_neon_v8qi3 = type { <8 x i8>, <8 x i8>, <8 x i8> }
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 %struct.__builtin_neon_v8qi2 = type { <8 x i8>, <8 x i8> }
33 %struct.__builtin_neon_v4hi2 = type { <4 x i16>, <4 x i16> }
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
0 ; RUN: llc < %s -march=arm -mattr=+neon > %t
11 ; RUN: grep {vtst\\.i8} %t | count 2
22 ; RUN: grep {vtst\\.i16} %t | count 2
33 ; RUN: grep {vtst\\.i32} %t | count 2
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 %struct.__builtin_neon_v8qi2 = type { <8 x i8>, <8 x i8> }
33 %struct.__builtin_neon_v4hi2 = type { <4 x i16>, <4 x i16> }
None ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
22 %struct.__builtin_neon_v8qi2 = type { <8 x i8>, <8 x i8> }
33 %struct.__builtin_neon_v4hi2 = type { <4 x i16>, <4 x i16> }
None ; RUN: llvm-as < %s | llc -march=arm | grep .wea