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[llvm-exegesis][X86] Handle CMOVcc/SETcc OPERAND_COND_CODE OperandType Summary: D60041 / D60138 refactoring changed how CMOV/SETcc opcodes are handled. concode is now an immediate, with it's own operand type. This at least allows to not crash on the opcode. However, this still won't generate all the snippets with all the condcode enumerators. D60066 does that. Reviewers: courbet, gchatelet Reviewed By: gchatelet Subscribers: tschuett, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60057 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357841 91177308-0d34-0410-b5e6-96231b3b80d8 Roman Lebedev 1 year, 7 months ago
6 changed file(s) with 69 addition(s) and 27 deletion(s). Raw diff Collapse all Expand all
0 # RUN: llvm-exegesis -mode=latency -opcode-name=CMOV32rr | FileCheck %s
1
2 CHECK: ---
3 CHECK-NEXT: mode: latency
4 CHECK-NEXT: key:
5 CHECK-NEXT: instructions:
6 CHECK-NEXT: CMOV32rr
7 CHECK-NEXT: config: ''
8 CHECK-LAST: ...
1111 #include "Assembler.h"
1212 #include "MCInstrDescView.h"
1313 #include "SnippetGenerator.h"
14 #include "Target.h"
1415 #include "llvm/ADT/StringExtras.h"
1516 #include "llvm/ADT/StringRef.h"
1617 #include "llvm/ADT/Twine.h"
4950 BenchmarkCode BC;
5051 BC.Info = CT.Info;
5152 for (InstructionTemplate &IT : CT.Instructions) {
52 randomizeUnsetVariables(ForbiddenRegs, IT);
53 randomizeUnsetVariables(State.getExegesisTarget(), ForbiddenRegs, IT);
5354 BC.Instructions.push_back(IT.build());
5455 }
5556 if (CT.ScratchSpacePointerInReg)
155156 return Container[randomIndex(Container.size())];
156157 }
157158
158 static void randomize(const Instruction &Instr, const Variable &Var,
159 llvm::MCOperand &AssignedValue,
160 const llvm::BitVector &ForbiddenRegs) {
161 const Operand &Op = Instr.getPrimaryOperand(Var);
162 switch (Op.getExplicitOperandInfo().OperandType) {
163 case llvm::MCOI::OperandType::OPERAND_IMMEDIATE:
164 // FIXME: explore immediate values too.
165 AssignedValue = llvm::MCOperand::createImm(1);
166 break;
167 case llvm::MCOI::OperandType::OPERAND_REGISTER: {
168 assert(Op.isReg());
169 auto AllowedRegs = Op.getRegisterAliasing().sourceBits();
170 assert(AllowedRegs.size() == ForbiddenRegs.size());
171 for (auto I : ForbiddenRegs.set_bits())
172 AllowedRegs.reset(I);
173 AssignedValue = llvm::MCOperand::createReg(randomBit(AllowedRegs));
174 break;
175 }
176 default:
177 break;
178 }
179 }
180
181159 static void setRegisterOperandValue(const RegisterOperandAssignment &ROV,
182160 InstructionTemplate &IB) {
183161 assert(ROV.Op);
211189 setRegisterOperandValue(randomElement(RandomConf.Uses), UseIB);
212190 }
213191
214 void randomizeUnsetVariables(const llvm::BitVector &ForbiddenRegs,
192 void randomizeUnsetVariables(const ExegesisTarget &Target,
193 const llvm::BitVector &ForbiddenRegs,
215194 InstructionTemplate &IT) {
216195 for (const Variable &Var : IT.Instr.Variables) {
217196 llvm::MCOperand &AssignedValue = IT.getValueFor(Var);
218197 if (!AssignedValue.isValid())
219 randomize(IT.Instr, Var, AssignedValue, ForbiddenRegs);
198 Target.randomizeMCOperand(IT.Instr, Var, AssignedValue, ForbiddenRegs);
220199 }
221200 }
222201
8787
8888 // Assigns a Random Value to all Variables in IT that are still Invalid.
8989 // Do not use any of the registers in `ForbiddenRegs`.
90 void randomizeUnsetVariables(const llvm::BitVector &ForbiddenRegs,
90 void randomizeUnsetVariables(const ExegesisTarget &Target,
91 const llvm::BitVector &ForbiddenRegs,
9192 InstructionTemplate &IT);
9293
9394 } // namespace exegesis
8585 return llvm::make_unique(State);
8686 }
8787
88 void ExegesisTarget::randomizeMCOperand(
89 const Instruction &Instr, const Variable &Var,
90 llvm::MCOperand &AssignedValue,
91 const llvm::BitVector &ForbiddenRegs) const {
92 const Operand &Op = Instr.getPrimaryOperand(Var);
93 switch (Op.getExplicitOperandInfo().OperandType) {
94 case llvm::MCOI::OperandType::OPERAND_IMMEDIATE:
95 // FIXME: explore immediate values too.
96 AssignedValue = llvm::MCOperand::createImm(1);
97 break;
98 case llvm::MCOI::OperandType::OPERAND_REGISTER: {
99 assert(Op.isReg());
100 auto AllowedRegs = Op.getRegisterAliasing().sourceBits();
101 assert(AllowedRegs.size() == ForbiddenRegs.size());
102 for (auto I : ForbiddenRegs.set_bits())
103 AllowedRegs.reset(I);
104 AssignedValue = llvm::MCOperand::createReg(randomBit(AllowedRegs));
105 break;
106 }
107 default:
108 break;
109 }
110 }
111
88112 static_assert(std::is_pod::value,
89113 "We shouldn't have dynamic initialization here");
90114 const PfmCountersInfo PfmCountersInfo::Default = {nullptr, nullptr, nullptr,
101101 // matter as long as it's large enough.
102102 virtual unsigned getMaxMemoryAccessSize() const { return 0; }
103103
104 // Assigns a random operand of the right type to variable Var.
105 // The default implementation only handles generic operand types.
106 // The target is responsible for handling any operand
107 // starting from OPERAND_FIRST_TARGET.
108 virtual void randomizeMCOperand(const Instruction &Instr, const Variable &Var,
109 llvm::MCOperand &AssignedValue,
110 const llvm::BitVector &ForbiddenRegs) const;
111
104112 // Creates a snippet generator for the given mode.
105113 std::unique_ptr
106114 createSnippetGenerator(InstructionBenchmark::ModeE Mode,
432432
433433 unsigned getMaxMemoryAccessSize() const override { return 64; }
434434
435 void randomizeMCOperand(const Instruction &Instr, const Variable &Var,
436 llvm::MCOperand &AssignedValue,
437 const llvm::BitVector &ForbiddenRegs) const override;
438
435439 void fillMemoryOperands(InstructionTemplate &IT, unsigned Reg,
436440 unsigned Offset) const override;
437441
482486 return 0;
483487 }
484488 return TT.isOSWindows() ? llvm::X86::RCX : llvm::X86::RDI;
489 }
490
491 void ExegesisX86Target::randomizeMCOperand(
492 const Instruction &Instr, const Variable &Var,
493 llvm::MCOperand &AssignedValue,
494 const llvm::BitVector &ForbiddenRegs) const {
495 ExegesisTarget::randomizeMCOperand(Instr, Var, AssignedValue, ForbiddenRegs);
496
497 const Operand &Op = Instr.getPrimaryOperand(Var);
498 switch (Op.getExplicitOperandInfo().OperandType) {
499 case llvm::X86::OperandType::OPERAND_COND_CODE:
500 // FIXME: explore all CC variants.
501 AssignedValue = llvm::MCOperand::createImm(1);
502 break;
503 default:
504 break;
505 }
485506 }
486507
487508 void ExegesisX86Target::fillMemoryOperands(InstructionTemplate &IT,