llvm.org GIT mirror llvm / fa785cb
Disable statistics on Release builds and move tests that depend on -stats. Summary: Statistics are still available in Release+Asserts (any +Asserts builds), and stats can also be turned on with LLVM_ENABLE_STATS. Move some of the FastISel stats that were moved under DEBUG() back out of DEBUG(), since stats are disabled across the board now. Many tests depend on grepping "-stats" output. Move those into a orig_dir/Stats/. so that they can be marked as unsupported when building without statistics. Differential Revision: http://llvm-reviews.chandlerc.com/D486 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176733 91177308-0d34-0410-b5e6-96231b3b80d8 Jan Wen Voung 6 years ago
164 changed file(s) with 3750 addition(s) and 3628 deletion(s). Raw diff Collapse all Expand all
5050
5151 // Allow use of this class as the value itself.
5252 operator unsigned() const { return Value; }
53 const Statistic &operator=(unsigned Val) {
53
54 #if !defined(NDEBUG) || defined(LLVM_ENABLE_STATS)
55 const Statistic &operator=(unsigned Val) {
5456 Value = Val;
5557 return init();
5658 }
105107 return init();
106108 }
107109
110 #else // Statistics are disabled in release builds.
111
112 const Statistic &operator=(unsigned Val) {
113 return *this;
114 }
115
116 const Statistic &operator++() {
117 return *this;
118 }
119
120 unsigned operator++(int) {
121 return 0;
122 }
123
124 const Statistic &operator--() {
125 return *this;
126 }
127
128 unsigned operator--(int) {
129 return 0;
130 }
131
132 const Statistic &operator+=(const unsigned &V) {
133 return *this;
134 }
135
136 const Statistic &operator-=(const unsigned &V) {
137 return *this;
138 }
139
140 const Statistic &operator*=(const unsigned &V) {
141 return *this;
142 }
143
144 const Statistic &operator/=(const unsigned &V) {
145 return *this;
146 }
147
148 #endif // !defined(NDEBUG) || defined(LLVM_ENABLE_STATS)
149
108150 protected:
109151 Statistic &init() {
110152 bool tmp = Initialized;
6262 #include "llvm/Target/TargetMachine.h"
6363 using namespace llvm;
6464
65 #ifndef NDEBUG
6665 STATISTIC(NumFastIselSuccessIndependent, "Number of insts selected by "
6766 "target-independent selector");
6867 STATISTIC(NumFastIselSuccessTarget, "Number of insts selected by "
6968 "target-specific selector");
7069 STATISTIC(NumFastIselDead, "Number of dead insts removed on failure");
71 #endif // NDEBUG
7270
7371 /// startNewBlock - Set the current block to which generated machine
7472 /// instructions will be appended, and clear the local CSE map.
333331 MachineInstr *Dead = &*I;
334332 ++I;
335333 Dead->eraseFromParent();
336 DEBUG(++NumFastIselDead);
334 ++NumFastIselDead;
337335 }
338336 recomputeInsertPt();
339337 }
829827
830828 // First, try doing target-independent selection.
831829 if (SelectOperator(I, I->getOpcode())) {
832 DEBUG(++NumFastIselSuccessIndependent);
830 ++NumFastIselSuccessIndependent;
833831 DL = DebugLoc();
834832 return true;
835833 }
844842 // Next, try calling the target to attempt to handle the instruction.
845843 SavedInsertPt = FuncInfo.InsertPt;
846844 if (TargetSelectInstruction(I)) {
847 DEBUG(++NumFastIselSuccessTarget);
845 ++NumFastIselSuccessTarget;
848846 DL = DebugLoc();
849847 return true;
850848 }
5757 #include
5858 using namespace llvm;
5959
60 STATISTIC(NumFastIselFailures, "Number of instructions fast isel failed on");
61 STATISTIC(NumFastIselSuccess, "Number of instructions fast isel selected");
6062 STATISTIC(NumFastIselBlocks, "Number of blocks selected entirely by fast isel");
6163 STATISTIC(NumDAGBlocks, "Number of blocks selected using DAG");
64 STATISTIC(NumDAGIselRetries,"Number of times dag isel has to try another path");
6265
6366 #ifndef NDEBUG
64 STATISTIC(NumDAGIselRetries,"Number of times dag isel has to try another path");
65 STATISTIC(NumFastIselFailures, "Number of instructions fast isel failed on");
66 STATISTIC(NumFastIselSuccess, "Number of instructions fast isel selected");
67
6867 static cl::opt
6968 EnableFastISelVerbose2("fast-isel-verbose2", cl::Hidden,
7069 cl::desc("Enable extra verbose messages in the \"fast\" "
10891088 // Try to select the instruction with FastISel.
10901089 if (FastIS->SelectInstruction(Inst)) {
10911090 --NumFastIselRemaining;
1092 DEBUG(++NumFastIselSuccess);
1091 ++NumFastIselSuccess;
10931092 // If fast isel succeeded, skip over all the folded instructions, and
10941093 // then see if there is a load right before the selected instructions.
10951094 // Try to fold the load if so.
11051104 // If we succeeded, don't re-select the load.
11061105 BI = llvm::next(BasicBlock::const_iterator(BeforeInst));
11071106 --NumFastIselRemaining;
1108 DEBUG(++NumFastIselSuccess);
1107 ++NumFastIselSuccess;
11091108 }
11101109 continue;
11111110 }
11441143 // Recompute NumFastIselRemaining as Selection DAG instruction
11451144 // selection may have handled the call, input args, etc.
11461145 unsigned RemainingNow = std::distance(Begin, BI);
1147 (void) RemainingNow;
1148 DEBUG(NumFastIselFailures += NumFastIselRemaining - RemainingNow);
1149 DEBUG(NumFastIselRemaining = RemainingNow);
1146 NumFastIselFailures += NumFastIselRemaining - RemainingNow;
1147 NumFastIselRemaining = RemainingNow;
11501148 continue;
11511149 }
11521150
11531151 if (isa(Inst) && !isa(Inst)) {
11541152 // Don't abort, and use a different message for terminator misses.
1155 DEBUG(NumFastIselFailures += NumFastIselRemaining);
1153 NumFastIselFailures += NumFastIselRemaining;
11561154 if (EnableFastISelVerbose || EnableFastISelAbort) {
11571155 dbgs() << "FastISel missed terminator: ";
11581156 Inst->dump();
11591157 }
11601158 } else {
1161 DEBUG(NumFastIselFailures += NumFastIselRemaining);
1159 NumFastIselFailures += NumFastIselRemaining;
11621160 if (EnableFastISelVerbose || EnableFastISelAbort) {
11631161 dbgs() << "FastISel miss: ";
11641162 Inst->dump();
23562354 DEBUG(errs() << " Skipped scope entry (due to false predicate) at "
23572355 << "index " << MatcherIndexOfPredicate
23582356 << ", continuing at " << FailIndex << "\n");
2359 DEBUG(++NumDAGIselRetries);
2357 ++NumDAGIselRetries;
23602358
23612359 // Otherwise, we know that this case of the Scope is guaranteed to fail,
23622360 // move to the next case.
29372935 // another child to try in the current 'Scope', otherwise pop it until we
29382936 // find a case to check.
29392937 DEBUG(errs() << " Match failed at index " << CurrentOpcodeIndex << "\n");
2940 DEBUG(++NumDAGIselRetries);
2938 ++NumDAGIselRetries;
29412939 while (1) {
29422940 if (MatchScopes.empty()) {
29432941 CannotYetSelect(NodeToMatch);
3939 /// what they did.
4040 ///
4141 static cl::opt
42 Enabled("stats", cl::desc("Enable statistics output from program"));
42 Enabled(
43 "stats",
44 cl::desc("Enable statistics output from program (available with Asserts)"));
4345
4446
4547 namespace {
141143 }
142144
143145 void llvm::PrintStatistics() {
146 #if !defined(NDEBUG) || defined(LLVM_ENABLE_STATS)
144147 StatisticInfo &Stats = *StatInfo;
145148
146149 // Statistics not enabled?
150153 raw_ostream &OutStream = *CreateInfoOutputFile();
151154 PrintStatistics(OutStream);
152155 delete &OutStream; // Close the file.
156 #else
157 // Check if the -stats option is set instead of checking
158 // !Stats.Stats.empty(). In release builds, Statistics operators
159 // do nothing, so stats are never Registered.
160 if (Enabled) {
161 // Get the stream to write to.
162 raw_ostream &OutStream = *CreateInfoOutputFile();
163 OutStream << "Statistics are disabled. "
164 << "Build with asserts or with -DLLVM_ENABLE_STATS\n";
165 OutStream.flush();
166 delete &OutStream; // Close the file.
167 }
168 #endif
153169 }
0 ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats -analyze < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define void @BZ2_blockSort() nounwind {
6 start:
7 br label %while
8
9 while:
10 br label %while.body134.i.i
11
12 while.body134.i.i:
13 br i1 1, label %end, label %w
14
15 w:
16 br label %if.end140.i.i
17
18 if.end140.i.i:
19 br i1 1, label %while.end186.i.i, label %if.end183.i.i
20
21 if.end183.i.i:
22 br label %while.body134.i.i
23
24 while.end186.i.i:
25 br label %while
26
27 end:
28 ret void
29 }
30 ; CHECK-NOT: =>
31 ; CHECK: [0] start =>
32 ; CHECK: [1] while => end
33
34 ; STAT: 2 region - The # of regions
35 ; STAT: 1 region - The # of simple regions
36
37 ; BBIT: start, while, while.body134.i.i, end, w, if.end140.i.i, while.end186.i.i, if.end183.i.i,
38 ; BBIT: while, while.body134.i.i, w, if.end140.i.i, while.end186.i.i, if.end183.i.i,
39
40 ; RNIT: start, while => end, end,
41 ; RNIT: while, while.body134.i.i, w, if.end140.i.i, while.end186.i.i, if.end183.i.i,
0 ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define void @normal_condition() nounwind {
6 5:
7 br label %"0"
8
9 0:
10 br label %"1"
11 1:
12 br i1 1, label %"2", label %"3"
13 2:
14 ret void
15 3:
16 br i1 1, label %"1", label %"4"
17 4:
18 br label %"0"
19 }
20
21 ; CHECK-NOT: =>
22 ; CHECK: [0] 5 =>
23 ; CHECK: [1] 0 => 2
24
25 ; STAT: 2 region - The # of regions
26 ; STAT: 1 region - The # of simple regions
27
28 ; BBIT: 5, 0, 1, 2, 3, 4,
29 ; BBIT: 0, 1, 3, 4,
30
31 ; RNIT: 5, 0 => 2, 2,
32 ; RNIT: 0, 1, 3, 4,
0 ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define internal fastcc zeroext i8 @handle_compress() nounwind {
6 end165:
7 br i1 1, label %false239, label %true181
8
9 true181:
10 br i1 1, label %then187, label %else232
11
12 then187:
13 br label %end265
14
15 else232:
16 br i1 1, label %false239, label %then245
17
18 false239:
19 br i1 1, label %then245, label %else259
20
21 then245:
22 br i1 1, label %then251, label %end253
23
24 then251:
25 br label %end253
26
27 end253:
28 br label %end265
29
30 else259:
31 br label %end265
32
33 end265:
34 br i1 1, label %then291, label %end298
35
36 then291:
37 br label %end298
38
39 end298:
40 ret i8 1
41 }
42
43 ; CHECK-NOT: =>
44 ; CHECK: [0] end165 =>
45 ; CHECK-NEXT: [1] end165 => end265
46 ; CHECK-NEXT: [2] then245 => end253
47 ; CHECK-NEXT: [1] end265 => end298
48
49 ; STAT: 4 region - The # of regions
50
51 ; BBIT: end165, false239, then245, then251, end253, end265, then291, end298, else259, true181, then187, else232,
52 ; BBIT: end165, false239, then245, then251, end253, else259, true181, then187, else232,
53 ; BBIT: then245, then251,
54 ; BBIT: end265, then291,
55
56 ; RNIT: end165 => end265, end265 => end298, end298,
57 ; RNIT: end165, false239, then245 => end253, end253, else259, true181, then187, else232,
58 ; RNIT: then245, then251,
59 ; RNIT: end265, then291,
0 ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define internal fastcc void @compress() nounwind {
6 end33:
7 br i1 1, label %end124, label %lor.lhs.false95
8
9 lor.lhs.false95:
10 br i1 1, label %then107, label %end172
11
12 then107:
13 br i1 1, label %end124, label %then113
14
15 then113:
16 br label %end124
17
18 end124:
19 br label %exit
20
21 end172:
22 br label %exit
23
24
25 exit:
26 unreachable
27
28
29 }
30 ; CHECK-NOT: =>
31 ; CHECK: [0] end33 =>
32 ; CHECK-NEXT: [1] end33 => exit
33 ; CHECK-NEXT: [2] then107 => end124
34
35 ; STAT: 3 region - The # of regions
36
37 ; BBIT: end33, end124, exit, lor.lhs.false95, then107, then113, end172,
38 ; BBIT: end33, end124, lor.lhs.false95, then107, then113, end172,
39 ; BBIT: then107, then113,
40
41 ; RNIT: end33 => exit, exit,
42 ; RNIT: end33, end124, lor.lhs.false95, then107 => end124, end172,
43 ; RNIT: then107, then113,
0 ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define void @normal_condition() nounwind {
6 0:
7 br label %"1"
8 1:
9 br i1 1, label %"2", label %"3"
10 2:
11 br label %"3"
12 3:
13 ret void
14 }
15 ; CHECK-NOT: =>
16 ; CHECK: [0] 0 =>
17 ; CHECK: [1] 1 => 3
18
19 ; STAT: 2 region - The # of regions
20
21 ; BBIT: 0, 1, 2, 3,
22 ; BBIT: 1, 2,
23
24 ; RNIT: 0, 1 => 3, 3,
25 ; RNIT: 1, 2,
0 ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define void @normal_condition() nounwind {
6 0:
7 br i1 1, label %"1", label %"4"
8
9 1:
10 br i1 1, label %"2", label %"3"
11 2:
12 br label %"4"
13 3:
14 br label %"4"
15 4:
16 ret void
17 }
18 ; CHECK-NOT: =>
19 ; CHECK: [0] 0 =>
20 ; CHECK-NEXT: [1] 0 => 4
21 ; CHECK-NEXT: [2] 1 => 4
22 ; STAT: 3 region - The # of regions
23
24 ; BBIT: 0, 1, 2, 4, 3,
25 ; BBIT: 0, 1, 2, 3,
26 ; BBIT: 1, 2, 3,
27
28 ; RNIT: 0 => 4, 4,
29 ; RNIT: 0, 1 => 4,
30 ; RNIT: 1, 2, 3,
0 ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define void @normal_condition() nounwind {
6 0:
7 br label %"1"
8 1:
9 br i1 1, label %"2", label %"3"
10 2:
11 br label %"4"
12 3:
13 br label %"4"
14 4:
15 ret void
16 }
17
18 ; CHECK-NOT: =>
19 ; CHECK: [0] 0 =>
20 ; CHECK-NEXT: [1] 1 => 4
21 ; STAT: 2 region - The # of regions
22
23 ; BBIT: 0, 1, 2, 4, 3,
24 ; BBIT: 1, 2, 3,
25
26 ; RNIT: 0, 1 => 4, 4,
27 ; RNIT: 1, 2, 3,
0 ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define internal fastcc zeroext i8 @handle_compress() nounwind {
6 entry:
7 br label %outer
8
9 outer:
10 br label %body
11
12 body:
13 br i1 1, label %body.i, label %if.end
14
15 body.i:
16 br i1 1, label %end, label %if.end
17
18 if.end:
19 br label %if.then64
20
21 if.then64:
22 br label %outer
23
24 end:
25 ret i8 1
26 }
27 ; CHECK-NOT: =>
28 ; CHECK: [0] entry =>
29 ; CHECK-NEXT: [1] outer => end
30 ; STAT: 2 region - The # of regions
31 ; STAT: 1 region - The # of simple regions
32
33 ; BBIT: entry, outer, body, body.i, end, if.end, if.then64,
34 ; BBIT: outer, body, body.i, if.end, if.then64,
35
36 ; RNIT: entry, outer => end, end,
37 ; RNIT: outer, body, body.i, if.end, if.then64,
0 ; RUN: opt -regions -analyze < %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2
3 define void @normal_condition() nounwind {
4 0:
5 br label %"1"
6 1:
7 br i1 1, label %"2", label %"3"
8 2:
9 br label %"2"
10 3:
11 br label %"4"
12 4:
13 ret void
14 }
15 ; CHECK-NOT: =>
16 ; CHECK: [0] 0 =>
17 ; CHECK: [1] 1 => 4
18 ; STAT: 2 region - The # of regions
19 ; STAT: 1 region - The # of simple regions
0 ; RUN: opt -regions -analyze < %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define void @normal_condition() nounwind {
6 0:
7 br label %"1"
8 1:
9 br i1 1, label %"2", label %"3"
10 2:
11 br label %"5"
12 5:
13 br i1 1, label %"11", label %"12"
14 11:
15 br label %"6"
16 12:
17 br label %"6"
18 6:
19 br label %"2"
20 3:
21 br label %"4"
22 4:
23 ret void
24 }
25 ; CHECK-NOT: =>
26 ; CHECK: [0] 0 =>
27 ; CHECK: [1] 1 => 3
28 ; STAT: 2 region - The # of regions
29 ; STAT: 1 region - The # of simple regions
30
31 ; BBIT: 0, 1, 2, 5, 11, 6, 12, 3, 4,
32 ; BBIT: 1, 2, 5, 11, 6, 12,
33
34 ; RNIT: 0, 1 => 3, 3, 4,
35 ; RNIT: 1, 2, 5, 11, 6, 12,
0 ; RUN: opt -regions -analyze < %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2
3 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
4 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
5
6 define void @normal_condition() nounwind {
7 0:
8 br label %"7"
9 7:
10 br i1 1, label %"1", label %"8"
11 1:
12 br i1 1, label %"2", label %"3"
13 2:
14 br label %"5"
15 5:
16 br i1 1, label %"11", label %"12"
17 11:
18 br label %"6"
19 12:
20 br label %"6"
21 6:
22 br label %"2"
23 8:
24 br label %"9"
25 9:
26 br i1 1, label %"13", label %"14"
27 13:
28 br label %"10"
29 14:
30 br label %"10"
31 10:
32 br label %"8"
33 3:
34 br label %"4"
35 4:
36 ret void
37 }
38 ; CHECK-NOT: =>
39 ; CHECK: [0] 0 =>
40 ; CHECK-NEXT: [1] 1 => 3
41 ; CHECK-NEXT: [1] 7 => 1
42 ; STAT: 3 region - The # of regions
43 ; STAT: 2 region - The # of simple regions
44
45 ; BBIT: 0, 7, 1, 2, 5, 11, 6, 12, 3, 4, 8, 9, 13, 10, 14,
46 ; BBIT: 7, 8, 9, 13, 10, 14,
47 ; BBIT: 1, 2, 5, 11, 6, 12,
48
49 ; RNIT: 0, 7 => 1, 1 => 3, 3, 4,
50 ; RNIT: 7, 8, 9, 13, 10, 14,
51 ; RNIT: 1, 2, 5, 11, 6, 12,
0 ; RUN: opt -regions -analyze < %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define void @normal_condition() nounwind {
6 0:
7 br label %"7"
8 7:
9 br i1 1, label %"1", label %"8"
10 1:
11 br i1 1, label %"2", label %"3"
12 2:
13 br label %"5"
14 5:
15 br i1 1, label %"11", label %"12"
16 11:
17 br label %"6"
18 12:
19 br label %"6"
20 6:
21 br i1 1, label %"2", label %"10"
22 8:
23 br label %"9"
24 9:
25 br i1 1, label %"13", label %"14"
26 13:
27 br label %"10"
28 14:
29 br label %"10"
30 10:
31 br label %"8"
32 3:
33 br label %"4"
34 4:
35 ret void
36 }
37 ; CHECK-NOT: =>
38 ; CHECK: [0] 0 =>
39 ; CHECK-NEXT: [1] 7 => 3
40 ; STAT: 2 region - The # of regions
41 ; STAT: 1 region - The # of simple regions
42
43 ; BBIT: 0, 7, 1, 2, 5, 11, 6, 10, 8, 9, 13, 14, 12, 3, 4,
44 ; BBIT: 7, 1, 2, 5, 11, 6, 10, 8, 9, 13, 14, 12,
45
46 ; RNIT: 0, 7 => 3, 3, 4,
47 ; RNIT: 7, 1, 2, 5, 11, 6, 10, 8, 9, 13, 14, 12,
0 config.suffixes = ['.ll', '.c', '.cpp']
1
2 if not config.root.enable_assertions:
3 config.unsupported = True
0 ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2
3 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
4 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
5
6 define void @normal_condition() nounwind {
7 0:
8 br label %"1"
9 1:
10 br i1 1, label %"6", label %"2"
11 2:
12 br i1 1, label %"3", label %"4"
13 3:
14 br label %"5"
15 4:
16 br label %"5"
17 5:
18 br label %"8"
19 8:
20 br i1 1, label %"7", label %"9"
21 9:
22 br label %"2"
23 7:
24 br label %"6"
25 6:
26 ret void
27 }
28
29 ; CHECK-NOT: =>
30 ; CHECK: [0] 0 =>
31 ; CHECK-NEXT: [1] 1 => 6
32 ; CHECK-NEXT: [2] 2 => 7
33 ; CHECK-NEXT: [3] 2 => 5
34 ; STAT: 4 region - The # of regions
35 ; STAT: 1 region - The # of simple regions
36
37 ; BBIT: 0, 1, 6, 2, 3, 5, 8, 7, 9, 4,
38 ; BBIT: 1, 2, 3, 5, 8, 7, 9, 4,
39 ; BBIT: 2, 3, 5, 8, 9, 4,
40 ; BBIT: 2, 3, 4,
41
42 ; RNIT: 0, 1 => 6, 6,
43 ; RNIT: 1, 2 => 7, 7,
44 ; RNIT: 2 => 5, 5, 8, 9,
45 ; RNIT: 2, 3, 4,
0 ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define internal fastcc zeroext i8 @loops_1() nounwind {
6 entry:
7 br i1 1, label %outer , label %a
8
9 a:
10 br label %body
11
12 outer:
13 br label %body
14
15 body:
16 br i1 1, label %land, label %if
17
18 land:
19 br i1 1, label %exit, label %end
20
21 exit:
22 br i1 1, label %if, label %end
23
24 if:
25 br label %outer
26
27 end:
28 ret i8 1
29 }
30 ; CHECK-NOT: =>
31 ; CHECK: [0] entry =>
32 ; CHECK-NEXT: [1] entry => end
33 ; STAT: 2 region - The # of regions
34
35 ; BBIT: entry, outer, body, land, exit, if, end, a,
36 ; BBIT: entry, outer, body, land, exit, if, a,
37
38 ; RNIT: entry => end, end,
39 ; RNIT: entry, outer, body, land, exit, if, a,
0 ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define void @meread_() nounwind {
6 entry:
7 br label %bb23
8
9 bb23:
10 br label %bb.i
11
12 bb.i: ; preds = %bb.i, %bb54
13 br label %pflini_.exit
14
15 pflini_.exit: ; preds = %bb.i
16 br label %bb58thread-split
17
18 bb58thread-split: ; preds = %bb64, %bb61, %pflini_.exit
19 br label %bb58
20
21 bb58: ; preds = %bb60, %bb58thread-split
22 br i1 1, label %bb59, label %bb23
23
24 bb59: ; preds = %bb58
25 switch i32 1, label %bb60 [
26 i32 1, label %l98
27 ]
28
29 bb60: ; preds = %bb59
30 br i1 1, label %bb61, label %bb58
31
32 bb61: ; preds = %bb60
33 br label %bb58thread-split
34
35 l98: ; preds = %bb69, %bb59
36 ret void
37 }
38 ; CHECK-NOT: =>
39 ; CHECK: [0] entry =>
40 ; CHECK: [1] bb23 => l98
41 ; STAT: 2 region - The # of regions
42 ; STAT: 1 region - The # of simple regions
43
44 ; BBIT: entry, bb23, bb.i, pflini_.exit, bb58thread-split, bb58, bb59, bb60, bb61, l98,
45 ; BBIT: bb23, bb.i, pflini_.exit, bb58thread-split, bb58, bb59, bb60, bb61,
46
47 ; RNIT: entry, bb23 => l98, l98,
48 ; RNIT: bb23, bb.i, pflini_.exit, bb58thread-split, bb58, bb59, bb60, bb61,
0 ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2
3 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
4 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
5
6 define void @a_linear_impl_fig_1() nounwind {
7 0:
8
9 br i1 1, label %"1", label %"15"
10 1:
11 switch i32 0, label %"2" [ i32 0, label %"3"
12 i32 1, label %"7"]
13 2:
14 br label %"4"
15 3:
16 br label %"5"
17 4:
18 br label %"6"
19 5:
20 br label %"6"
21 6:
22 br label %"7"
23 7:
24 br label %"15"
25 15:
26 br label %"8"
27 8:
28 br label %"16"
29 16:
30 br label %"9"
31 9:
32 br i1 1, label %"10", label %"11"
33 11:
34 br i1 1, label %"13", label %"12"
35 13:
36 br label %"14"
37 12:
38 br label %"14"
39 14:
40 br label %"8"
41 10:
42 br label %"17"
43 17:
44 br label %"18"
45 18:
46 ret void
47 }
48
49 ; CHECK-NOT: =>
50 ; CHECK: [0] 0 =>
51 ; CHECK-NEXT: [1] 0 => 15
52 ; CHECK-NEXT: [2] 1 => 7
53 ; CHECK-NEXT: [1] 8 => 10
54 ; CHECK-NEXT: [2] 11 => 14
55 ; STAT: 5 region - The # of regions
56 ; STAT: 1 region - The # of simple regions
57
58 ; BBIT: 0, 1, 2, 4, 6, 7, 15, 8, 16, 9, 10, 17, 18, 11, 13, 14, 12, 3, 5,
59 ; BBIT: 0, 1, 2, 4, 6, 7, 3, 5,
60 ; BBIT: 1, 2, 4, 6, 3, 5,
61 ; BBIT: 8, 16, 9, 11, 13, 14, 12,
62 ; BBIT: 11, 13, 12,
63
64 ; RNIT: 0 => 15, 15, 8 => 10, 10, 17, 18,
65 ; RNIT: 0, 1 => 7, 7,
66 ; RNIT: 1, 2, 4, 6, 3, 5,
67 ; RNIT: 8, 16, 9, 11 => 14, 14,
68 ; RNIT: 11, 13, 12,
0 ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2
3 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
4 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
5
6 define internal fastcc zeroext i8 @handle_compress() nounwind {
7 entry:
8 br label %outer
9
10 outer:
11 br label %body
12
13 body:
14 br i1 1, label %exit172, label %end
15
16 exit172:
17 br i1 1, label %end, label %outer
18
19 end:
20 ret i8 1
21 }
22 ; CHECK-NOT: =>
23 ; CHECK: [0] entry =>
24 ; CHECK-NEXT: [1] outer => end
25
26 ; STAT: 2 region - The # of regions
27
28 ; BBIT: entry, outer, body, exit172, end,
29 ; BBIT: outer, body, exit172,
30
31 ; RNIT: entry, outer => end, end,
32 ; RNIT: outer, body, exit172,
0 ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define void @MAIN__() nounwind {
6 entry:
7 br label %__label_002001.outer
8
9 __label_002001.outer: ; preds = %bb236, %bb92
10 br label %__label_002001
11
12 __label_002001: ; preds = %bb229, %__label_002001.outer
13 br i1 1, label %bb93, label %__label_000020
14
15 bb93: ; preds = %__label_002001
16 br i1 1, label %__label_000020, label %bb197
17
18 bb197: ; preds = %bb193
19 br i1 1, label %bb229, label %bb224
20
21 bb224: ; preds = %bb223, %bb227
22 br i1 1, label %bb229, label %bb224
23
24 bb229: ; preds = %bb227, %bb223
25 br i1 1, label %__label_002001, label %__label_002001.outer
26
27 __label_000020: ; preds = %__label_002001, %bb194
28 ret void
29 }
30
31 ; CHECK-NOT: =>
32 ; CHECK: [0] entry =>
33 ; CHECK-NEXT: [1] __label_002001.outer => __label_000020
34 ; CHECK-NEXT: [2] bb197 => bb229
35 ; CHECK-NEXT: [3] bb224 => bb229
36
37 ; STAT: 4 region - The # of regions
38 ; STAT: 1 region - The # of simple regions
39
40 ; BBIT: entry, __label_002001.outer, __label_002001, bb93, __label_000020, bb197, bb229, bb224,
41 ; BBIT: __label_002001.outer, __label_002001, bb93, bb197, bb229, bb224,
42 ; BBIT: bb197, bb224,
43 ; BBIT: bb224,
44
45 ; RNIT: entry, __label_002001.outer => __label_000020, __label_000020,
46 ; RNIT: __label_002001.outer, __label_002001, bb93, bb197 => bb229, bb229,
47 ; RNIT: bb197, bb224 => bb229,
48 ; RNIT: bb224,
0 ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define void @a_linear_impl_fig_1() nounwind {
6 0:
7 br label %"1"
8 1:
9 br label %"2"
10 2:
11 br label %"3"
12 3:
13 br i1 1, label %"13", label %"4"
14 4:
15 br i1 1, label %"5", label %"1"
16 5:
17 br i1 1, label %"8", label %"6"
18 6:
19 br i1 1, label %"7", label %"4"
20 7:
21 ret void
22 8:
23 br i1 1, label %"9", label %"1"
24 9:
25 br label %"10"
26 10:
27 br i1 1, label %"12", label %"11"
28 11:
29 br i1 1, label %"9", label %"8"
30 13:
31 br i1 1, label %"2", label %"1"
32 12:
33 switch i32 0, label %"1" [ i32 0, label %"9"
34 i32 1, label %"8"]
35 }
36
37 ; CHECK-NOT: =>
38 ; CHECK: [0] 0 =>
39 ; CHECK-NEXT: [1] 1 => 7
40 ; CHECK-NEXT: [2] 1 => 4
41 ; CHECK-NEXT: [2] 8 => 1
42
43 ; STAT: 4 region - The # of regions
44 ; STAT: 1 region - The # of simple regions
45
46 ; BBIT: 0, 1, 2, 3, 13, 4, 5, 8, 9, 10, 12, 11, 6, 7,
47 ; BBIT: 1, 2, 3, 13, 4, 5, 8, 9, 10, 12, 11, 6,
48 ; BBIT: 1, 2, 3, 13,
49 ; BBIT: 8, 9, 10, 12, 11,
50
51 ; RNIT: 0, 1 => 7, 7,
52 ; RNIT: 1 => 4, 4, 5, 8 => 1, 6,
53 ; RNIT: 1, 2, 3, 13,
54 ; RNIT: 8, 9, 10, 12, 11,
0 ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define internal fastcc zeroext i8 @handle_compress() nounwind {
6 entry:
7 br label %outer
8
9 outer:
10 br label %body
11
12 body:
13 br i1 1, label %else, label %true77
14
15 true77:
16 br i1 1, label %then83, label %else
17
18 then83:
19 br label %outer
20
21 else:
22 br label %else106
23
24 else106:
25 br i1 1, label %end, label %outer
26
27 end:
28 ret i8 1
29 }
30
31 ; CHECK-NOT: =>
32 ; CHECK: [0] entry =>
33 ; CHECK-NEXT: [1] outer => end
34 ; CHECK-NEXT: [2] outer => else
35
36 ; STAT: 3 region - The # of regions
37 ; STAT: 1 region - The # of simple regions
38
39 ; BBIT: entry, outer, body, else, else106, end, true77, then83,
40 ; BBIT: outer, body, else, else106, true77, then83,
41 ; BBIT: outer, body, true77, then83,
42
43 ; RNIT: entry, outer => end, end,
44 ; RNIT: outer => else, else, else106,
45 ; RNIT: outer, body, true77, then83,
+0
-42
test/Analysis/RegionInfo/block_sort.ll less more
None ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats -analyze < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define void @BZ2_blockSort() nounwind {
6 start:
7 br label %while
8
9 while:
10 br label %while.body134.i.i
11
12 while.body134.i.i:
13 br i1 1, label %end, label %w
14
15 w:
16 br label %if.end140.i.i
17
18 if.end140.i.i:
19 br i1 1, label %while.end186.i.i, label %if.end183.i.i
20
21 if.end183.i.i:
22 br label %while.body134.i.i
23
24 while.end186.i.i:
25 br label %while
26
27 end:
28 ret void
29 }
30 ; CHECK-NOT: =>
31 ; CHECK: [0] start =>
32 ; CHECK: [1] while => end
33
34 ; STAT: 2 region - The # of regions
35 ; STAT: 1 region - The # of simple regions
36
37 ; BBIT: start, while, while.body134.i.i, end, w, if.end140.i.i, while.end186.i.i, if.end183.i.i,
38 ; BBIT: while, while.body134.i.i, w, if.end140.i.i, while.end186.i.i, if.end183.i.i,
39
40 ; RNIT: start, while => end, end,
41 ; RNIT: while, while.body134.i.i, w, if.end140.i.i, while.end186.i.i, if.end183.i.i,
+0
-33
test/Analysis/RegionInfo/cond_loop.ll less more
None ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define void @normal_condition() nounwind {
6 5:
7 br label %"0"
8
9 0:
10 br label %"1"
11 1:
12 br i1 1, label %"2", label %"3"
13 2:
14 ret void
15 3:
16 br i1 1, label %"1", label %"4"
17 4:
18 br label %"0"
19 }
20
21 ; CHECK-NOT: =>
22 ; CHECK: [0] 5 =>
23 ; CHECK: [1] 0 => 2
24
25 ; STAT: 2 region - The # of regions
26 ; STAT: 1 region - The # of simple regions
27
28 ; BBIT: 5, 0, 1, 2, 3, 4,
29 ; BBIT: 0, 1, 3, 4,
30
31 ; RNIT: 5, 0 => 2, 2,
32 ; RNIT: 0, 1, 3, 4,
+0
-60
test/Analysis/RegionInfo/condition_complicated.ll less more
None ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define internal fastcc zeroext i8 @handle_compress() nounwind {
6 end165:
7 br i1 1, label %false239, label %true181
8
9 true181:
10 br i1 1, label %then187, label %else232
11
12 then187:
13 br label %end265
14
15 else232:
16 br i1 1, label %false239, label %then245
17
18 false239:
19 br i1 1, label %then245, label %else259
20
21 then245:
22 br i1 1, label %then251, label %end253
23
24 then251:
25 br label %end253
26
27 end253:
28 br label %end265
29
30 else259:
31 br label %end265
32
33 end265:
34 br i1 1, label %then291, label %end298
35
36 then291:
37 br label %end298
38
39 end298:
40 ret i8 1
41 }
42
43 ; CHECK-NOT: =>
44 ; CHECK: [0] end165 =>
45 ; CHECK-NEXT: [1] end165 => end265
46 ; CHECK-NEXT: [2] then245 => end253
47 ; CHECK-NEXT: [1] end265 => end298
48
49 ; STAT: 4 region - The # of regions
50
51 ; BBIT: end165, false239, then245, then251, end253, end265, then291, end298, else259, true181, then187, else232,
52 ; BBIT: end165, false239, then245, then251, end253, else259, true181, then187, else232,
53 ; BBIT: then245, then251,
54 ; BBIT: end265, then291,
55
56 ; RNIT: end165 => end265, end265 => end298, end298,
57 ; RNIT: end165, false239, then245 => end253, end253, else259, true181, then187, else232,
58 ; RNIT: then245, then251,
59 ; RNIT: end265, then291,
+0
-44
test/Analysis/RegionInfo/condition_complicated_2.ll less more
None ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define internal fastcc void @compress() nounwind {
6 end33:
7 br i1 1, label %end124, label %lor.lhs.false95
8
9 lor.lhs.false95:
10 br i1 1, label %then107, label %end172
11
12 then107:
13 br i1 1, label %end124, label %then113
14
15 then113:
16 br label %end124
17
18 end124:
19 br label %exit
20
21 end172:
22 br label %exit
23
24
25 exit:
26 unreachable
27
28
29 }
30 ; CHECK-NOT: =>
31 ; CHECK: [0] end33 =>
32 ; CHECK-NEXT: [1] end33 => exit
33 ; CHECK-NEXT: [2] then107 => end124
34
35 ; STAT: 3 region - The # of regions
36
37 ; BBIT: end33, end124, exit, lor.lhs.false95, then107, then113, end172,
38 ; BBIT: end33, end124, lor.lhs.false95, then107, then113, end172,
39 ; BBIT: then107, then113,
40
41 ; RNIT: end33 => exit, exit,
42 ; RNIT: end33, end124, lor.lhs.false95, then107 => end124, end172,
43 ; RNIT: then107, then113,
+0
-26
test/Analysis/RegionInfo/condition_forward_edge.ll less more
None ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define void @normal_condition() nounwind {
6 0:
7 br label %"1"
8 1:
9 br i1 1, label %"2", label %"3"
10 2:
11 br label %"3"
12 3:
13 ret void
14 }
15 ; CHECK-NOT: =>
16 ; CHECK: [0] 0 =>
17 ; CHECK: [1] 1 => 3
18
19 ; STAT: 2 region - The # of regions
20
21 ; BBIT: 0, 1, 2, 3,
22 ; BBIT: 1, 2,
23
24 ; RNIT: 0, 1 => 3, 3,
25 ; RNIT: 1, 2,
+0
-31
test/Analysis/RegionInfo/condition_same_exit.ll less more
None ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define void @normal_condition() nounwind {
6 0:
7 br i1 1, label %"1", label %"4"
8
9 1:
10 br i1 1, label %"2", label %"3"
11 2:
12 br label %"4"
13 3:
14 br label %"4"
15 4:
16 ret void
17 }
18 ; CHECK-NOT: =>
19 ; CHECK: [0] 0 =>
20 ; CHECK-NEXT: [1] 0 => 4
21 ; CHECK-NEXT: [2] 1 => 4
22 ; STAT: 3 region - The # of regions
23
24 ; BBIT: 0, 1, 2, 4, 3,
25 ; BBIT: 0, 1, 2, 3,
26 ; BBIT: 1, 2, 3,
27
28 ; RNIT: 0 => 4, 4,
29 ; RNIT: 0, 1 => 4,
30 ; RNIT: 1, 2, 3,
+0
-28
test/Analysis/RegionInfo/condition_simple.ll less more
None ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define void @normal_condition() nounwind {
6 0:
7 br label %"1"
8 1:
9 br i1 1, label %"2", label %"3"
10 2:
11 br label %"4"
12 3:
13 br label %"4"
14 4:
15 ret void
16 }
17
18 ; CHECK-NOT: =>
19 ; CHECK: [0] 0 =>
20 ; CHECK-NEXT: [1] 1 => 4
21 ; STAT: 2 region - The # of regions
22
23 ; BBIT: 0, 1, 2, 4, 3,
24 ; BBIT: 1, 2, 3,
25
26 ; RNIT: 0, 1 => 4, 4,
27 ; RNIT: 1, 2, 3,
+0
-38
test/Analysis/RegionInfo/exit_in_condition.ll less more
None ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define internal fastcc zeroext i8 @handle_compress() nounwind {
6 entry:
7 br label %outer
8
9 outer:
10 br label %body
11
12 body:
13 br i1 1, label %body.i, label %if.end
14
15 body.i:
16 br i1 1, label %end, label %if.end
17
18 if.end:
19 br label %if.then64
20
21 if.then64:
22 br label %outer
23
24 end:
25 ret i8 1
26 }
27 ; CHECK-NOT: =>
28 ; CHECK: [0] entry =>
29 ; CHECK-NEXT: [1] outer => end
30 ; STAT: 2 region - The # of regions
31 ; STAT: 1 region - The # of simple regions
32
33 ; BBIT: entry, outer, body, body.i, end, if.end, if.then64,
34 ; BBIT: outer, body, body.i, if.end, if.then64,
35
36 ; RNIT: entry, outer => end, end,
37 ; RNIT: outer, body, body.i, if.end, if.then64,
+0
-20
test/Analysis/RegionInfo/infinite_loop.ll less more
None ; RUN: opt -regions -analyze < %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2
3 define void @normal_condition() nounwind {
4 0:
5 br label %"1"
6 1:
7 br i1 1, label %"2", label %"3"
8 2:
9 br label %"2"
10 3:
11 br label %"4"
12 4:
13 ret void
14 }
15 ; CHECK-NOT: =>
16 ; CHECK: [0] 0 =>
17 ; CHECK: [1] 1 => 4
18 ; STAT: 2 region - The # of regions
19 ; STAT: 1 region - The # of simple regions
+0
-36
test/Analysis/RegionInfo/infinite_loop_2.ll less more
None ; RUN: opt -regions -analyze < %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define void @normal_condition() nounwind {
6 0:
7 br label %"1"
8 1:
9 br i1 1, label %"2", label %"3"
10 2:
11 br label %"5"
12 5:
13 br i1 1, label %"11", label %"12"
14 11:
15 br label %"6"
16 12:
17 br label %"6"
18 6:
19 br label %"2"
20 3:
21 br label %"4"
22 4:
23 ret void
24 }
25 ; CHECK-NOT: =>
26 ; CHECK: [0] 0 =>
27 ; CHECK: [1] 1 => 3
28 ; STAT: 2 region - The # of regions
29 ; STAT: 1 region - The # of simple regions
30
31 ; BBIT: 0, 1, 2, 5, 11, 6, 12, 3, 4,
32 ; BBIT: 1, 2, 5, 11, 6, 12,
33
34 ; RNIT: 0, 1 => 3, 3, 4,
35 ; RNIT: 1, 2, 5, 11, 6, 12,
+0
-52
test/Analysis/RegionInfo/infinite_loop_3.ll less more
None ; RUN: opt -regions -analyze < %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2
3 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
4 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
5
6 define void @normal_condition() nounwind {
7 0:
8 br label %"7"
9 7:
10 br i1 1, label %"1", label %"8"
11 1:
12 br i1 1, label %"2", label %"3"
13 2:
14 br label %"5"
15 5:
16 br i1 1, label %"11", label %"12"
17 11:
18 br label %"6"
19 12:
20 br label %"6"
21 6:
22 br label %"2"
23 8:
24 br label %"9"
25 9:
26 br i1 1, label %"13", label %"14"
27 13:
28 br label %"10"
29 14:
30 br label %"10"
31 10:
32 br label %"8"
33 3:
34 br label %"4"
35 4:
36 ret void
37 }
38 ; CHECK-NOT: =>
39 ; CHECK: [0] 0 =>
40 ; CHECK-NEXT: [1] 1 => 3
41 ; CHECK-NEXT: [1] 7 => 1
42 ; STAT: 3 region - The # of regions
43 ; STAT: 2 region - The # of simple regions
44
45 ; BBIT: 0, 7, 1, 2, 5, 11, 6, 12, 3, 4, 8, 9, 13, 10, 14,
46 ; BBIT: 7, 8, 9, 13, 10, 14,
47 ; BBIT: 1, 2, 5, 11, 6, 12,
48
49 ; RNIT: 0, 7 => 1, 1 => 3, 3, 4,
50 ; RNIT: 7, 8, 9, 13, 10, 14,
51 ; RNIT: 1, 2, 5, 11, 6, 12,
+0
-48
test/Analysis/RegionInfo/infinite_loop_4.ll less more
None ; RUN: opt -regions -analyze < %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define void @normal_condition() nounwind {
6 0:
7 br label %"7"
8 7:
9 br i1 1, label %"1", label %"8"
10 1:
11 br i1 1, label %"2", label %"3"
12 2:
13 br label %"5"
14 5:
15 br i1 1, label %"11", label %"12"
16 11:
17 br label %"6"
18 12:
19 br label %"6"
20 6:
21 br i1 1, label %"2", label %"10"
22 8:
23 br label %"9"
24 9:
25 br i1 1, label %"13", label %"14"
26 13:
27 br label %"10"
28 14:
29 br label %"10"
30 10:
31 br label %"8"
32 3:
33 br label %"4"
34 4:
35 ret void
36 }
37 ; CHECK-NOT: =>
38 ; CHECK: [0] 0 =>
39 ; CHECK-NEXT: [1] 7 => 3
40 ; STAT: 2 region - The # of regions
41 ; STAT: 1 region - The # of simple regions
42
43 ; BBIT: 0, 7, 1, 2, 5, 11, 6, 10, 8, 9, 13, 14, 12, 3, 4,
44 ; BBIT: 7, 1, 2, 5, 11, 6, 10, 8, 9, 13, 14, 12,
45
46 ; RNIT: 0, 7 => 3, 3, 4,
47 ; RNIT: 7, 1, 2, 5, 11, 6, 10, 8, 9, 13, 14, 12,
+0
-46
test/Analysis/RegionInfo/loop_with_condition.ll less more
None ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2
3 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
4 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
5
6 define void @normal_condition() nounwind {
7 0:
8 br label %"1"
9 1:
10 br i1 1, label %"6", label %"2"
11 2:
12 br i1 1, label %"3", label %"4"
13 3:
14 br label %"5"
15 4:
16 br label %"5"
17 5:
18 br label %"8"
19 8:
20 br i1 1, label %"7", label %"9"
21 9:
22 br label %"2"
23 7:
24 br label %"6"
25 6:
26 ret void
27 }
28
29 ; CHECK-NOT: =>
30 ; CHECK: [0] 0 =>
31 ; CHECK-NEXT: [1] 1 => 6
32 ; CHECK-NEXT: [2] 2 => 7
33 ; CHECK-NEXT: [3] 2 => 5
34 ; STAT: 4 region - The # of regions
35 ; STAT: 1 region - The # of simple regions
36
37 ; BBIT: 0, 1, 6, 2, 3, 5, 8, 7, 9, 4,
38 ; BBIT: 1, 2, 3, 5, 8, 7, 9, 4,
39 ; BBIT: 2, 3, 5, 8, 9, 4,
40 ; BBIT: 2, 3, 4,
41
42 ; RNIT: 0, 1 => 6, 6,
43 ; RNIT: 1, 2 => 7, 7,
44 ; RNIT: 2 => 5, 5, 8, 9,
45 ; RNIT: 2, 3, 4,
+0
-40
test/Analysis/RegionInfo/loops_1.ll less more
None ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define internal fastcc zeroext i8 @loops_1() nounwind {
6 entry:
7 br i1 1, label %outer , label %a
8
9 a:
10 br label %body
11
12 outer:
13 br label %body
14
15 body:
16 br i1 1, label %land, label %if
17
18 land:
19 br i1 1, label %exit, label %end
20
21 exit:
22 br i1 1, label %if, label %end
23
24 if:
25 br label %outer
26
27 end:
28 ret i8 1
29 }
30 ; CHECK-NOT: =>
31 ; CHECK: [0] entry =>
32 ; CHECK-NEXT: [1] entry => end
33 ; STAT: 2 region - The # of regions
34
35 ; BBIT: entry, outer, body, land, exit, if, end, a,
36 ; BBIT: entry, outer, body, land, exit, if, a,
37
38 ; RNIT: entry => end, end,
39 ; RNIT: entry, outer, body, land, exit, if, a,
+0
-49
test/Analysis/RegionInfo/loops_2.ll less more
None ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define void @meread_() nounwind {
6 entry:
7 br label %bb23
8
9 bb23:
10 br label %bb.i
11
12 bb.i: ; preds = %bb.i, %bb54
13 br label %pflini_.exit
14
15 pflini_.exit: ; preds = %bb.i
16 br label %bb58thread-split
17
18 bb58thread-split: ; preds = %bb64, %bb61, %pflini_.exit
19 br label %bb58
20
21 bb58: ; preds = %bb60, %bb58thread-split
22 br i1 1, label %bb59, label %bb23
23
24 bb59: ; preds = %bb58
25 switch i32 1, label %bb60 [
26 i32 1, label %l98
27 ]
28
29 bb60: ; preds = %bb59
30 br i1 1, label %bb61, label %bb58
31
32 bb61: ; preds = %bb60
33 br label %bb58thread-split
34
35 l98: ; preds = %bb69, %bb59
36 ret void
37 }
38 ; CHECK-NOT: =>
39 ; CHECK: [0] entry =>
40 ; CHECK: [1] bb23 => l98
41 ; STAT: 2 region - The # of regions
42 ; STAT: 1 region - The # of simple regions
43
44 ; BBIT: entry, bb23, bb.i, pflini_.exit, bb58thread-split, bb58, bb59, bb60, bb61, l98,
45 ; BBIT: bb23, bb.i, pflini_.exit, bb58thread-split, bb58, bb59, bb60, bb61,
46
47 ; RNIT: entry, bb23 => l98, l98,
48 ; RNIT: bb23, bb.i, pflini_.exit, bb58thread-split, bb58, bb59, bb60, bb61,
+0
-69
test/Analysis/RegionInfo/mix_1.ll less more
None ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2
3 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
4 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
5
6 define void @a_linear_impl_fig_1() nounwind {
7 0:
8
9 br i1 1, label %"1", label %"15"
10 1:
11 switch i32 0, label %"2" [ i32 0, label %"3"
12 i32 1, label %"7"]
13 2:
14 br label %"4"
15 3:
16 br label %"5"
17 4:
18 br label %"6"
19 5:
20 br label %"6"
21 6:
22 br label %"7"
23 7:
24 br label %"15"
25 15:
26 br label %"8"
27 8:
28 br label %"16"
29 16:
30 br label %"9"
31 9:
32 br i1 1, label %"10", label %"11"
33 11:
34 br i1 1, label %"13", label %"12"
35 13:
36 br label %"14"
37 12:
38 br label %"14"
39 14:
40 br label %"8"
41 10:
42 br label %"17"
43 17:
44 br label %"18"
45 18:
46 ret void
47 }
48
49 ; CHECK-NOT: =>
50 ; CHECK: [0] 0 =>
51 ; CHECK-NEXT: [1] 0 => 15
52 ; CHECK-NEXT: [2] 1 => 7
53 ; CHECK-NEXT: [1] 8 => 10
54 ; CHECK-NEXT: [2] 11 => 14
55 ; STAT: 5 region - The # of regions
56 ; STAT: 1 region - The # of simple regions
57
58 ; BBIT: 0, 1, 2, 4, 6, 7, 15, 8, 16, 9, 10, 17, 18, 11, 13, 14, 12, 3, 5,
59 ; BBIT: 0, 1, 2, 4, 6, 7, 3, 5,
60 ; BBIT: 1, 2, 4, 6, 3, 5,
61 ; BBIT: 8, 16, 9, 11, 13, 14, 12,
62 ; BBIT: 11, 13, 12,
63
64 ; RNIT: 0 => 15, 15, 8 => 10, 10, 17, 18,
65 ; RNIT: 0, 1 => 7, 7,
66 ; RNIT: 1, 2, 4, 6, 3, 5,
67 ; RNIT: 8, 16, 9, 11 => 14, 14,
68 ; RNIT: 11, 13, 12,
+0
-33
test/Analysis/RegionInfo/nested_loops.ll less more
None ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2
3 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
4 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
5
6 define internal fastcc zeroext i8 @handle_compress() nounwind {
7 entry:
8 br label %outer
9
10 outer:
11 br label %body
12
13 body:
14 br i1 1, label %exit172, label %end
15
16 exit172:
17 br i1 1, label %end, label %outer
18
19 end:
20 ret i8 1
21 }
22 ; CHECK-NOT: =>
23 ; CHECK: [0] entry =>
24 ; CHECK-NEXT: [1] outer => end
25
26 ; STAT: 2 region - The # of regions
27
28 ; BBIT: entry, outer, body, exit172, end,
29 ; BBIT: outer, body, exit172,
30
31 ; RNIT: entry, outer => end, end,
32 ; RNIT: outer, body, exit172,
+0
-49
test/Analysis/RegionInfo/next.ll less more
None ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define void @MAIN__() nounwind {
6 entry:
7 br label %__label_002001.outer
8
9 __label_002001.outer: ; preds = %bb236, %bb92
10 br label %__label_002001
11
12 __label_002001: ; preds = %bb229, %__label_002001.outer
13 br i1 1, label %bb93, label %__label_000020
14
15 bb93: ; preds = %__label_002001
16 br i1 1, label %__label_000020, label %bb197
17
18 bb197: ; preds = %bb193
19 br i1 1, label %bb229, label %bb224
20
21 bb224: ; preds = %bb223, %bb227
22 br i1 1, label %bb229, label %bb224
23
24 bb229: ; preds = %bb227, %bb223
25 br i1 1, label %__label_002001, label %__label_002001.outer
26
27 __label_000020: ; preds = %__label_002001, %bb194
28 ret void
29 }
30
31 ; CHECK-NOT: =>
32 ; CHECK: [0] entry =>
33 ; CHECK-NEXT: [1] __label_002001.outer => __label_000020
34 ; CHECK-NEXT: [2] bb197 => bb229
35 ; CHECK-NEXT: [3] bb224 => bb229
36
37 ; STAT: 4 region - The # of regions
38 ; STAT: 1 region - The # of simple regions
39
40 ; BBIT: entry, __label_002001.outer, __label_002001, bb93, __label_000020, bb197, bb229, bb224,
41 ; BBIT: __label_002001.outer, __label_002001, bb93, bb197, bb229, bb224,
42 ; BBIT: bb197, bb224,
43 ; BBIT: bb224,
44
45 ; RNIT: entry, __label_002001.outer => __label_000020, __label_000020,
46 ; RNIT: __label_002001.outer, __label_002001, bb93, bb197 => bb229, bb229,
47 ; RNIT: bb197, bb224 => bb229,
48 ; RNIT: bb224,
+0
-55
test/Analysis/RegionInfo/paper.ll less more
None ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define void @a_linear_impl_fig_1() nounwind {
6 0:
7 br label %"1"
8 1:
9 br label %"2"
10 2:
11 br label %"3"
12 3:
13 br i1 1, label %"13", label %"4"
14 4:
15 br i1 1, label %"5", label %"1"
16 5:
17 br i1 1, label %"8", label %"6"
18 6:
19 br i1 1, label %"7", label %"4"
20 7:
21 ret void
22 8:
23 br i1 1, label %"9", label %"1"
24 9:
25 br label %"10"
26 10:
27 br i1 1, label %"12", label %"11"
28 11:
29 br i1 1, label %"9", label %"8"
30 13:
31 br i1 1, label %"2", label %"1"
32 12:
33 switch i32 0, label %"1" [ i32 0, label %"9"
34 i32 1, label %"8"]
35 }
36
37 ; CHECK-NOT: =>
38 ; CHECK: [0] 0 =>
39 ; CHECK-NEXT: [1] 1 => 7
40 ; CHECK-NEXT: [2] 1 => 4
41 ; CHECK-NEXT: [2] 8 => 1
42
43 ; STAT: 4 region - The # of regions
44 ; STAT: 1 region - The # of simple regions
45
46 ; BBIT: 0, 1, 2, 3, 13, 4, 5, 8, 9, 10, 12, 11, 6, 7,
47 ; BBIT: 1, 2, 3, 13, 4, 5, 8, 9, 10, 12, 11, 6,
48 ; BBIT: 1, 2, 3, 13,
49 ; BBIT: 8, 9, 10, 12, 11,
50
51 ; RNIT: 0, 1 => 7, 7,
52 ; RNIT: 1 => 4, 4, 5, 8 => 1, 6,
53 ; RNIT: 1, 2, 3, 13,
54 ; RNIT: 8, 9, 10, 12, 11,
+0
-46
test/Analysis/RegionInfo/two_loops_same_header.ll less more
None ; RUN: opt -regions -analyze < %s | FileCheck %s
1 ; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
2 ; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
3 ; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
4
5 define internal fastcc zeroext i8 @handle_compress() nounwind {
6 entry:
7 br label %outer
8
9 outer:
10 br label %body
11
12 body:
13 br i1 1, label %else, label %true77
14
15 true77:
16 br i1 1, label %then83, label %else
17
18 then83:
19 br label %outer
20
21 else:
22 br label %else106
23
24 else106:
25 br i1 1, label %end, label %outer
26
27 end:
28 ret i8 1
29 }
30
31 ; CHECK-NOT: =>
32 ; CHECK: [0] entry =>
33 ; CHECK-NEXT: [1] outer => end
34 ; CHECK-NEXT: [2] outer => else
35
36 ; STAT: 3 region - The # of regions
37 ; STAT: 1 region - The # of simple regions
38
39 ; BBIT: entry, outer, body, else, else106, end, true77, then83,
40 ; BBIT: outer, body, else, else106, true77, then83,
41 ; BBIT: outer, body, true77, then83,
42
43 ; RNIT: entry, outer => end, end,
44 ; RNIT: outer => else, else, else106,
45 ; RNIT: outer, body, true77, then83,
+0
-51
test/CodeGen/ARM/2007-03-13-InstrSched.ll less more
None ; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic \
1 ; RUN: -mattr=+v6 | grep r9
2 ; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic \
3 ; RUN: -mattr=+v6 -arm-reserve-r9 -ifcvt-limit=0 -stats 2>&1 | grep asm-printer
4 ; | grep 35
5
6 define void @test(i32 %tmp56222, i32 %tmp36224, i32 %tmp46223, i32 %i.0196.0.ph, i32 %tmp8, i32* %tmp1011, i32** %tmp1, i32* %d2.1.out, i32* %d3.1.out, i32* %d0.1.out, i32* %d1.1.out) {
7 newFuncRoot:
8 br label %bb74
9
10 bb78.exitStub: ; preds = %bb74
11 store i32 %d2.1, i32* %d2.1.out
12 store i32 %d3.1, i32* %d3.1.out
13 store i32 %d0.1, i32* %d0.1.out
14 store i32 %d1.1, i32* %d1.1.out
15 ret void
16
17 bb74: ; preds = %bb26, %newFuncRoot
18 %fp.1.rec = phi i32 [ 0, %newFuncRoot ], [ %tmp71.rec, %bb26 ] ; [#uses=3]
19 %fm.1.in = phi i32* [ %tmp71, %bb26 ], [ %tmp1011, %newFuncRoot ] ; [#uses=1]
20 %d0.1 = phi i32 [ %tmp44, %bb26 ], [ 8192, %newFuncRoot ] ; [#uses=2]
21 %d1.1 = phi i32 [ %tmp54, %bb26 ], [ 8192, %newFuncRoot ] ; [#uses=2]
22 %d2.1 = phi i32 [ %tmp64, %bb26 ], [ 8192, %newFuncRoot ] ; [#uses=2]
23 %d3.1 = phi i32 [ %tmp69, %bb26 ], [ 8192, %newFuncRoot ] ; [#uses=2]
24 %fm.1 = load i32* %fm.1.in ; [#uses=4]
25 icmp eq i32 %fp.1.rec, %tmp8 ; :0 [#uses=1]
26 br i1 %0, label %bb78.exitStub, label %bb26
27
28 bb26: ; preds = %bb74
29 %tmp28 = getelementptr i32** %tmp1, i32 %fp.1.rec ; [#uses=1]
30 %tmp30 = load i32** %tmp28 ; [#uses=4]
31 %tmp33 = getelementptr i32* %tmp30, i32 %i.0196.0.ph ; [#uses=1]
32 %tmp34 = load i32* %tmp33 ; [#uses=1]
33 %tmp38 = getelementptr i32* %tmp30, i32 %tmp36224 ; [#uses=1]
34 %tmp39 = load i32* %tmp38 ; [#uses=1]
35 %tmp42 = mul i32 %tmp34, %fm.1 ; [#uses=1]
36 %tmp44 = add i32 %tmp42, %d0.1 ; [#uses=1]
37 %tmp48 = getelementptr i32* %tmp30, i32 %tmp46223 ; [#uses=1]
38 %tmp49 = load i32* %tmp48 ; [#uses=1]
39 %tmp52 = mul i32 %tmp39, %fm.1 ; [#uses=1]
40 %tmp54 = add i32 %tmp52, %d1.1 ; [#uses=1]
41 %tmp58 = getelementptr i32* %tmp30, i32 %tmp56222 ; [#uses=1]
42 %tmp59 = load i32* %tmp58 ; [#uses=1]
43 %tmp62 = mul i32 %tmp49, %fm.1 ; [#uses=1]
44 %tmp64 = add i32 %tmp62, %d2.1 ; [#uses=1]
45 %tmp67 = mul i32 %tmp59, %fm.1 ; [#uses=1]
46 %tmp69 = add i32 %tmp67, %d3.1 ; [#uses=1]
47 %tmp71.rec = add i32 %fp.1.rec, 1 ; [#uses=2]
48 %tmp71 = getelementptr i32* %tmp1011, i32 %tmp71.rec ; [#uses=1]
49 br label %bb74
50 }
+0
-48
test/CodeGen/ARM/2011-12-14-machine-sink.ll less more
None ; RUN: llc < %s -o /dev/null -stats 2>&1 | FileCheck %s -check-prefix=STATS
1 ; Radar 10266272
2 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
3 target triple = "thumbv7-apple-ios4.0.0"
4 ; STATS-NOT: machine-sink
5
6 define i32 @foo(i32 %h) nounwind readonly ssp {
7 entry:
8 br label %for.cond
9
10 for.cond: ; preds = %for.body, %entry
11 %cmp = icmp slt i32 0, %h
12 br i1 %cmp, label %for.body, label %if.end299
13
14 for.body: ; preds = %for.cond
15 %v.5 = select i1 undef, i32 undef, i32 0
16 %0 = load i8* undef, align 1, !tbaa !0
17 %conv88 = zext i8 %0 to i32
18 %sub89 = sub nsw i32 0, %conv88
19 %v.8 = select i1 undef, i32 undef, i32 %sub89
20 %1 = load i8* null, align 1, !tbaa !0
21 %conv108 = zext i8 %1 to i32
22 %2 = load i8* undef, align 1, !tbaa !0
23 %conv110 = zext i8 %2 to i32
24 %sub111 = sub nsw i32 %conv108, %conv110
25 %cmp112 = icmp slt i32 %sub111, 0
26 %sub115 = sub nsw i32 0, %sub111
27 %v.10 = select i1 %cmp112, i32 %sub115, i32 %sub111
28 %add62 = add i32 0, %v.5
29 %add73 = add i32 %add62, 0
30 %add84 = add i32 %add73, 0
31 %add95 = add i32 %add84, %v.8
32 %add106 = add i32 %add95, 0
33 %add117 = add i32 %add106, %v.10
34 %add128 = add i32 %add117, 0
35 %add139 = add i32 %add128, 0
36 %add150 = add i32 %add139, 0
37 %add161 = add i32 %add150, 0
38 %add172 = add i32 %add161, 0
39 br i1 undef, label %for.cond, label %if.end299
40
41 if.end299: ; preds = %for.body, %for.cond
42 %s.10 = phi i32 [ %add172, %for.body ], [ 0, %for.cond ]
43 ret i32 %s.10
44 }
45
46 !0 = metadata !{metadata !"omnipotent char", metadata !1}
47 !1 = metadata !{metadata !"Simple C/C++ TBAA", null}
0 ; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic \
1 ; RUN: -mattr=+v6 | grep r9
2 ; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic \
3 ; RUN: -mattr=+v6 -arm-reserve-r9 -ifcvt-limit=0 -stats 2>&1 | grep asm-printer
4 ; | grep 35
5
6 define void @test(i32 %tmp56222, i32 %tmp36224, i32 %tmp46223, i32 %i.0196.0.ph, i32 %tmp8, i32* %tmp1011, i32** %tmp1, i32* %d2.1.out, i32* %d3.1.out, i32* %d0.1.out, i32* %d1.1.out) {
7 newFuncRoot:
8 br label %bb74
9
10 bb78.exitStub: ; preds = %bb74
11 store i32 %d2.1, i32* %d2.1.out
12 store i32 %d3.1, i32* %d3.1.out
13 store i32 %d0.1, i32* %d0.1.out
14 store i32 %d1.1, i32* %d1.1.out
15 ret void
16
17 bb74: ; preds = %bb26, %newFuncRoot
18 %fp.1.rec = phi i32 [ 0, %newFuncRoot ], [ %tmp71.rec, %bb26 ] ; [#uses=3]
19 %fm.1.in = phi i32* [ %tmp71, %bb26 ], [ %tmp1011, %newFuncRoot ] ; [#uses=1]
20 %d0.1 = phi i32 [ %tmp44, %bb26 ], [ 8192, %newFuncRoot ] ; [#uses=2]
21 %d1.1 = phi i32 [ %tmp54, %bb26 ], [ 8192, %newFuncRoot ] ; [#uses=2]
22 %d2.1 = phi i32 [ %tmp64, %bb26 ], [ 8192, %newFuncRoot ] ; [#uses=2]
23 %d3.1 = phi i32 [ %tmp69, %bb26 ], [ 8192, %newFuncRoot ] ; [#uses=2]
24 %fm.1 = load i32* %fm.1.in ; [#uses=4]
25 icmp eq i32 %fp.1.rec, %tmp8 ; :0 [#uses=1]
26 br i1 %0, label %bb78.exitStub, label %bb26
27
28 bb26: ; preds = %bb74
29 %tmp28 = getelementptr i32** %tmp1, i32 %fp.1.rec ; [#uses=1]
30 %tmp30 = load i32** %tmp28 ; [#uses=4]
31 %tmp33 = getelementptr i32* %tmp30, i32 %i.0196.0.ph ; [#uses=1]
32 %tmp34 = load i32* %tmp33 ; [#uses=1]
33 %tmp38 = getelementptr i32* %tmp30, i32 %tmp36224 ; [#uses=1]
34 %tmp39 = load i32* %tmp38 ; [#uses=1]
35 %tmp42 = mul i32 %tmp34, %fm.1 ; [#uses=1]
36 %tmp44 = add i32 %tmp42, %d0.1 ; [#uses=1]
37 %tmp48 = getelementptr i32* %tmp30, i32 %tmp46223 ; [#uses=1]
38 %tmp49 = load i32* %tmp48 ; [#uses=1]
39 %tmp52 = mul i32 %tmp39, %fm.1 ; [#uses=1]
40 %tmp54 = add i32 %tmp52, %d1.1 ; [#uses=1]
41 %tmp58 = getelementptr i32* %tmp30, i32 %tmp56222 ; [#uses=1]
42 %tmp59 = load i32* %tmp58 ; [#uses=1]
43 %tmp62 = mul i32 %tmp49, %fm.1 ; [#uses=1]
44 %tmp64 = add i32 %tmp62, %d2.1 ; [#uses=1]
45 %tmp67 = mul i32 %tmp59, %fm.1 ; [#uses=1]
46 %tmp69 = add i32 %tmp67, %d3.1 ; [#uses=1]
47 %tmp71.rec = add i32 %fp.1.rec, 1 ; [#uses=2]
48 %tmp71 = getelementptr i32* %tmp1011, i32 %tmp71.rec ; [#uses=1]
49 br label %bb74
50 }
0 ; RUN: llc < %s -o /dev/null -stats 2>&1 | FileCheck %s -check-prefix=STATS
1 ; Radar 10266272
2 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
3 target triple = "thumbv7-apple-ios4.0.0"
4 ; STATS-NOT: machine-sink
5
6 define i32 @foo(i32 %h) nounwind readonly ssp {
7 entry:
8 br label %for.cond
9
10 for.cond: ; preds = %for.body, %entry
11 %cmp = icmp slt i32 0, %h
12 br i1 %cmp, label %for.body, label %if.end299
13
14 for.body: ; preds = %for.cond
15 %v.5 = select i1 undef, i32 undef, i32 0
16 %0 = load i8* undef, align 1, !tbaa !0
17 %conv88 = zext i8 %0 to i32
18 %sub89 = sub nsw i32 0, %conv88
19 %v.8 = select i1 undef, i32 undef, i32 %sub89
20 %1 = load i8* null, align 1, !tbaa !0
21 %conv108 = zext i8 %1 to i32
22 %2 = load i8* undef, align 1, !tbaa !0
23 %conv110 = zext i8 %2 to i32
24 %sub111 = sub nsw i32 %conv108, %conv110
25 %cmp112 = icmp slt i32 %sub111, 0
26 %sub115 = sub nsw i32 0, %sub111
27 %v.10 = select i1 %cmp112, i32 %sub115, i32 %sub111
28 %add62 = add i32 0, %v.5
29 %add73 = add i32 %add62, 0
30 %add84 = add i32 %add73, 0
31 %add95 = add i32 %add84, %v.8
32 %add106 = add i32 %add95, 0
33 %add117 = add i32 %add106, %v.10
34 %add128 = add i32 %add117, 0
35 %add139 = add i32 %add128, 0
36 %add150 = add i32 %add139, 0
37 %add161 = add i32 %add150, 0
38 %add172 = add i32 %add161, 0
39 br i1 undef, label %for.cond, label %if.end299
40
41 if.end299: ; preds = %for.body, %for.cond
42 %s.10 = phi i32 [ %add172, %for.body ], [ 0, %for.cond ]
43 ret i32 %s.10
44 }
45
46 !0 = metadata !{metadata !"omnipotent char", metadata !1}
47 !1 = metadata !{metadata !"Simple C/C++ TBAA", null}
0 ; RUN: llc < %s -march=arm -stats 2>&1 | grep asm-printer | grep 4
1
2 define i32 @t1(i32 %a) {
3 %b = mul i32 %a, 9
4 %c = inttoptr i32 %b to i32*
5 %d = load i32* %c
6 ret i32 %d
7 }
8
9 define i32 @t2(i32 %a) {
10 %b = mul i32 %a, -7
11 %c = inttoptr i32 %b to i32*
12 %d = load i32* %c
13 ret i32 %d
14 }
0 config.suffixes = ['.ll', '.c', '.cpp']
1
2 targets = set(config.root.targets_to_build.split())
3 if not 'ARM' in targets:
4 config.unsupported = True
5
6 if not config.root.enable_assertions:
7 config.unsupported = True
+0
-15
test/CodeGen/ARM/addrmode.ll less more
None ; RUN: llc < %s -march=arm -stats 2>&1 | grep asm-printer | grep 4
1
2 define i32 @t1(i32 %a) {
3 %b = mul i32 %a, 9
4 %c = inttoptr i32 %b to i32*
5 %d = load i32* %c
6 ret i32 %d
7 }
8
9 define i32 @t2(i32 %a) {
10 %b = mul i32 %a, -7
11 %c = inttoptr i32 %b to i32*
12 %d = load i32* %c
13 ret i32 %d
14 }
0 ; RUN: llc < %s -march=ppc32 -stats 2>&1 | \
1 ; RUN: grep "4 .*Number of machine instrs printed"
2
3 ;; Integer absolute value, should produce something as good as:
4 ;; srawi r2, r3, 31
5 ;; add r3, r3, r2
6 ;; xor r3, r3, r2
7 ;; blr
8 define i32 @test(i32 %a) {
9 %tmp1neg = sub i32 0, %a
10 %b = icmp sgt i32 %a, -1
11 %abs = select i1 %b, i32 %a, i32 %tmp1neg
12 ret i32 %abs
13 }
14
0 config.suffixes = ['.ll', '.c', '.cpp']
1
2 targets = set(config.root.targets_to_build.split())
3 if not 'PowerPC' in targets:
4 config.unsupported = True
5
6 if not config.root.enable_assertions:
7 config.unsupported = True
0 ; RUN: llc < %s -march=ppc32 -stats 2>&1 | \
1 ; RUN: grep "Number of machine instrs printed" | grep 12
2
3 define i16 @Trans16Bit(i32 %srcA, i32 %srcB, i32 %alpha) {
4 %tmp1 = shl i32 %srcA, 15 ; [#uses=1]
5 %tmp2 = and i32 %tmp1, 32505856 ; [#uses=1]
6 %tmp4 = and i32 %srcA, 31775 ; [#uses=1]
7 %tmp5 = or i32 %tmp2, %tmp4 ; [#uses=1]
8 %tmp7 = shl i32 %srcB, 15 ; [#uses=1]
9 %tmp8 = and i32 %tmp7, 32505856 ; [#uses=1]
10 %tmp10 = and i32 %srcB, 31775 ; [#uses=1]
11 %tmp11 = or i32 %tmp8, %tmp10 ; [#uses=1]
12 %tmp14 = mul i32 %tmp5, %alpha ; [#uses=1]
13 %tmp16 = sub i32 32, %alpha ; [#uses=1]
14 %tmp18 = mul i32 %tmp11, %tmp16 ; [#uses=1]
15 %tmp19 = add i32 %tmp18, %tmp14 ; [#uses=2]
16 %tmp21 = lshr i32 %tmp19, 5 ; [#uses=1]
17 %tmp21.upgrd.1 = trunc i32 %tmp21 to i16 ; [#uses=1]
18 %tmp = and i16 %tmp21.upgrd.1, 31775 ; [#uses=1]
19 %tmp23 = lshr i32 %tmp19, 20 ; [#uses=1]
20 %tmp23.upgrd.2 = trunc i32 %tmp23 to i16 ; [#uses=1]
21 %tmp24 = and i16 %tmp23.upgrd.2, 992 ; [#uses=1]
22 %tmp25 = or i16 %tmp, %tmp24 ; [#uses=1]
23 ret i16 %tmp25
24 }
+0
-15
test/CodeGen/PowerPC/iabs.ll less more
None ; RUN: llc < %s -march=ppc32 -stats 2>&1 | \
1 ; RUN: grep "4 .*Number of machine instrs printed"
2
3 ;; Integer absolute value, should produce something as good as:
4 ;; srawi r2, r3, 31
5 ;; add r3, r3, r2
6 ;; xor r3, r3, r2
7 ;; blr
8 define i32 @test(i32 %a) {
9 %tmp1neg = sub i32 0, %a
10 %b = icmp sgt i32 %a, -1
11 %abs = select i1 %b, i32 %a, i32 %tmp1neg
12 ret i32 %abs
13 }
14
+0
-25
test/CodeGen/PowerPC/rlwimi3.ll less more
None ; RUN: llc < %s -march=ppc32 -stats 2>&1 | \
1 ; RUN: grep "Number of machine instrs printed" | grep 12
2
3 define i16 @Trans16Bit(i32 %srcA, i32 %srcB, i32 %alpha) {
4 %tmp1 = shl i32 %srcA, 15 ; [#uses=1]
5 %tmp2 = and i32 %tmp1, 32505856 ; [#uses=1]
6 %tmp4 = and i32 %srcA, 31775 ; [#uses=1]
7 %tmp5 = or i32 %tmp2, %tmp4 ; [#uses=1]
8 %tmp7 = shl i32 %srcB, 15 ; [#uses=1]
9 %tmp8 = and i32 %tmp7, 32505856 ; [#uses=1]
10 %tmp10 = and i32 %srcB, 31775 ; [#uses=1]
11 %tmp11 = or i32 %tmp8, %tmp10 ; [#uses=1]
12 %tmp14 = mul i32 %tmp5, %alpha ; [#uses=1]
13 %tmp16 = sub i32 32, %alpha ; [#uses=1]
14 %tmp18 = mul i32 %tmp11, %tmp16 ; [#uses=1]
15 %tmp19 = add i32 %tmp18, %tmp14 ; [#uses=2]
16 %tmp21 = lshr i32 %tmp19, 5 ; [#uses=1]
17 %tmp21.upgrd.1 = trunc i32 %tmp21 to i16 ; [#uses=1]
18 %tmp = and i16 %tmp21.upgrd.1, 31775 ; [#uses=1]
19 %tmp23 = lshr i32 %tmp19, 20 ; [#uses=1]
20 %tmp23.upgrd.2 = trunc i32 %tmp23 to i16 ; [#uses=1]
21 %tmp24 = and i16 %tmp23.upgrd.2, 992 ; [#uses=1]
22 %tmp25 = or i16 %tmp, %tmp24 ; [#uses=1]
23 ret i16 %tmp25
24 }
+0
-18
test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll less more
None ; The old instruction selector used to load all arguments to a call up in
1 ; registers, then start pushing them all onto the stack. This is bad news as
2 ; it makes a ton of annoying overlapping live ranges. This code should not
3 ; cause spills!
4 ;
5 ; RUN: llc < %s -march=x86 -stats 2>&1 | not grep spilled
6
7 target datalayout = "e-p:32:32"
8
9 define i32 @test(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) {
10 ret i32 0
11 }
12
13 define i32 @main() {
14 %X = call i32 @test( i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10 ) ; [#uses=1]
15 ret i32 %X
16 }
17
+0
-12
test/CodeGen/X86/2006-03-02-InstrSchedBug.ll less more
None ; RUN: llc < %s -march=x86 -stats 2>&1 | \
1 ; RUN: grep asm-printer | grep 7
2
3 define i32 @g(i32 %a, i32 %b) nounwind {
4 %tmp.1 = shl i32 %b, 1 ; [#uses=1]
5 %tmp.3 = add i32 %tmp.1, %a ; [#uses=1]
6 %tmp.5 = mul i32 %tmp.3, %a ; [#uses=1]
7 %tmp.8 = mul i32 %b, %b ; [#uses=1]
8 %tmp.9 = add i32 %tmp.5, %tmp.8 ; [#uses=1]
9 ret i32 %tmp.9
10 }
11
+0
-76
test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll less more
None ; RUN: llc < %s -march=x86 -mcpu=yonah -stats 2>&1 | \
1 ; RUN: not grep "Number of register spills"
2 ; END.
3
4
5 define i32 @foo(<4 x float>* %a, <4 x float>* %b, <4 x float>* %c, <4 x float>* %d) {
6 %tmp44 = load <4 x float>* %a ; <<4 x float>> [#uses=9]
7 %tmp46 = load <4 x float>* %b ; <<4 x float>> [#uses=1]
8 %tmp48 = load <4 x float>* %c ; <<4 x float>> [#uses=1]
9 %tmp50 = load <4 x float>* %d ; <<4 x float>> [#uses=1]
10 %tmp51 = bitcast <4 x float> %tmp44 to <4 x i32> ; <<4 x i32>> [#uses=1]
11 %tmp = shufflevector <4 x i32> %tmp51, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2]
12 %tmp52 = bitcast <4 x i32> %tmp to <4 x float> ; <<4 x float>> [#uses=1]
13 %tmp60 = xor <4 x i32> %tmp, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1]
14 %tmp61 = bitcast <4 x i32> %tmp60 to <4 x float> ; <<4 x float>> [#uses=1]
15 %tmp74 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp52, <4 x float> %tmp44, i8 1 ) ; <<4 x float>> [#uses=1]
16 %tmp75 = bitcast <4 x float> %tmp74 to <4 x i32> ; <<4 x i32>> [#uses=1]
17 %tmp88 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp61, i8 1 ) ; <<4 x float>> [#uses=1]
18 %tmp89 = bitcast <4 x float> %tmp88 to <4 x i32> ; <<4 x i32>> [#uses=1]
19 %tmp98 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128( <4 x i32> %tmp75, <4 x i32> %tmp89 ) ; <<4 x i32>> [#uses=1]
20 %tmp102 = bitcast <8 x i16> %tmp98 to <8 x i16> ; <<8 x i16>> [#uses=1]
21 %tmp.upgrd.1 = shufflevector <8 x i16> %tmp102, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1]
22 %tmp105 = shufflevector <8 x i16> %tmp.upgrd.1, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
23 %tmp105.upgrd.2 = bitcast <8 x i16> %tmp105 to <4 x float> ; <<4 x float>> [#uses=1]
24 store <4 x float> %tmp105.upgrd.2, <4 x float>* %a
25 %tmp108 = bitcast <4 x float> %tmp46 to <4 x i32> ; <<4 x i32>> [#uses=1]
26 %tmp109 = shufflevector <4 x i32> %tmp108, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2]
27 %tmp109.upgrd.3 = bitcast <4 x i32> %tmp109 to <4 x float> ; <<4 x float>> [#uses=1]
28 %tmp119 = xor <4 x i32> %tmp109, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1]
29 %tmp120 = bitcast <4 x i32> %tmp119 to <4 x float> ; <<4 x float>> [#uses=1]
30 %tmp133 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp109.upgrd.3, <4 x float> %tmp44, i8 1 ) ; <<4 x float>> [#uses=1]
31 %tmp134 = bitcast <4 x float> %tmp133 to <4 x i32> ; <<4 x i32>> [#uses=1]
32 %tmp147 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp120, i8 1 ) ; <<4 x float>> [#uses=1]
33 %tmp148 = bitcast <4 x float> %tmp147 to <4 x i32> ; <<4 x i32>> [#uses=1]
34 %tmp159 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128( <4 x i32> %tmp134, <4 x i32> %tmp148 ) ; <<4 x i32>> [#uses=1]
35 %tmp163 = bitcast <8 x i16> %tmp159 to <8 x i16> ; <<8 x i16>> [#uses=1]
36 %tmp164 = shufflevector <8 x i16> %tmp163, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1]
37 %tmp166 = shufflevector <8 x i16> %tmp164, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
38 %tmp166.upgrd.4 = bitcast <8 x i16> %tmp166 to <4 x float> ; <<4 x float>> [#uses=1]
39 store <4 x float> %tmp166.upgrd.4, <4 x float>* %b
40 %tmp169 = bitcast <4 x float> %tmp48 to <4 x i32> ; <<4 x i32>> [#uses=1]
41 %tmp170 = shufflevector <4 x i32> %tmp169, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2]
42 %tmp170.upgrd.5 = bitcast <4 x i32> %tmp170 to <4 x float> ; <<4 x float>> [#uses=1]
43 %tmp180 = xor <4 x i32> %tmp170, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1]
44 %tmp181 = bitcast <4 x i32> %tmp180 to <4 x float> ; <<4 x float>> [#uses=1]
45 %tmp194 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp170.upgrd.5, <4 x float> %tmp44, i8 1 ) ; <<4 x float>> [#uses=1]
46 %tmp195 = bitcast <4 x float> %tmp194 to <4 x i32> ; <<4 x i32>> [#uses=1]
47 %tmp208 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp181, i8 1 ) ; <<4 x float>> [#uses=1]
48 %tmp209 = bitcast <4 x float> %tmp208 to <4 x i32> ; <<4 x i32>> [#uses=1]
49 %tmp220 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128( <4 x i32> %tmp195, <4 x i32> %tmp209 ) ; <<4 x i32>> [#uses=1]
50 %tmp224 = bitcast <8 x i16> %tmp220 to <8 x i16> ; <<8 x i16>> [#uses=1]
51 %tmp225 = shufflevector <8 x i16> %tmp224, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1]
52 %tmp227 = shufflevector <8 x i16> %tmp225, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
53 %tmp227.upgrd.6 = bitcast <8 x i16> %tmp227 to <4 x float> ; <<4 x float>> [#uses=1]
54 store <4 x float> %tmp227.upgrd.6, <4 x float>* %c
55 %tmp230 = bitcast <4 x float> %tmp50 to <4 x i32> ; <<4 x i32>> [#uses=1]
56 %tmp231 = shufflevector <4 x i32> %tmp230, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2]
57 %tmp231.upgrd.7 = bitcast <4 x i32> %tmp231 to <4 x float> ; <<4 x float>> [#uses=1]
58 %tmp241 = xor <4 x i32> %tmp231, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1]
59 %tmp242 = bitcast <4 x i32> %tmp241 to <4 x float> ; <<4 x float>> [#uses=1]
60 %tmp255 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp231.upgrd.7, <4 x float> %tmp44, i8 1 ) ; <<4 x float>> [#uses=1]
61 %tmp256 = bitcast <4 x float> %tmp255 to <4 x i32> ; <<4 x i32>> [#uses=1]
62 %tmp269 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp242, i8 1 ) ; <<4 x float>> [#uses=1]
63 %tmp270 = bitcast <4 x float> %tmp269 to <4 x i32> ; <<4 x i32>> [#uses=1]
64 %tmp281 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128( <4 x i32> %tmp256, <4 x i32> %tmp270 ) ; <<4 x i32>> [#uses=1]
65 %tmp285 = bitcast <8 x i16> %tmp281 to <8 x i16> ; <<8 x i16>> [#uses=1]
66 %tmp286 = shufflevector <8 x i16> %tmp285, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1]
67 %tmp288 = shufflevector <8 x i16> %tmp286, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
68 %tmp288.upgrd.8 = bitcast <8 x i16> %tmp288 to <4 x float> ; <<4 x float>> [#uses=1]
69 store <4 x float> %tmp288.upgrd.8, <4 x float>* %d
70 ret i32 0
71 }
72
73 declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8)
74
75 declare <8 x i16> @llvm.x86.sse2.packssdw.128(<4 x i32>, <4 x i32>)
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test/CodeGen/X86/2006-05-02-InstrSched1.ll less more
None ; RUN: llc < %s -march=x86 -relocation-model=static -stats 2>&1 | \
1 ; RUN: grep asm-printer | grep 14
2 ;
3 @size20 = external global i32 ; [#uses=1]
4 @in5 = external global i8* ; [#uses=1]
5
6 define i32 @compare(i8* %a, i8* %b) nounwind {
7 %tmp = bitcast i8* %a to i32* ; [#uses=1]
8 %tmp1 = bitcast i8* %b to i32* ; [#uses=1]
9 %tmp.upgrd.1 = load i32* @size20 ; [#uses=1]
10 %tmp.upgrd.2 = load i8** @in5 ; [#uses=2]
11 %tmp3 = load i32* %tmp1 ; [#uses=1]
12 %gep.upgrd.3 = zext i32 %tmp3 to i64 ; [#uses=1]
13 %tmp4 = getelementptr i8* %tmp.upgrd.2, i64 %gep.upgrd.3 ; [#uses=2]
14 %tmp7 = load i32* %tmp ; [#uses=1]
15 %gep.upgrd.4 = zext i32 %tmp7 to i64 ; [#uses=1]
16 %tmp8 = getelementptr i8* %tmp.upgrd.2, i64 %gep.upgrd.4 ; [#uses=2]
17 %tmp.upgrd.5 = tail call i32 @memcmp( i8* %tmp8, i8* %tmp4, i32 %tmp.upgrd.1 ) ; [#uses=1]
18 ret i32 %tmp.upgrd.5
19 }
20
21 declare i32 @memcmp(i8*, i8*, i32)
22
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test/CodeGen/X86/2006-05-02-InstrSched2.ll less more
None ; RUN: llc < %s -march=x86 -stats 2>&1 | \
1 ; RUN: grep asm-printer | grep 13
2
3 define void @_ZN9__gnu_cxx9hashtableISt4pairIKPKciES3_NS_4hashIS3_EESt10_Select1stIS5_E5eqstrSaIiEE14find_or_insertERKS5__cond_true456.i(i8* %tmp435.i, i32* %tmp449.i.out) nounwind {
4 newFuncRoot:
5 br label %cond_true456.i
6 bb459.i.exitStub: ; preds = %cond_true456.i
7 store i32 %tmp449.i, i32* %tmp449.i.out
8 ret void
9 cond_true456.i: ; preds = %cond_true456.i, %newFuncRoot
10 %__s441.2.4.i = phi i8* [ %tmp451.i.upgrd.1, %cond_true456.i ], [ %tmp435.i, %newFuncRoot ] ; [#uses=2]
11 %__h.2.4.i = phi i32 [ %tmp449.i, %cond_true456.i ], [ 0, %newFuncRoot ] ; [#uses=1]
12 %tmp446.i = mul i32 %__h.2.4.i, 5 ; [#uses=1]
13 %tmp.i = load i8* %__s441.2.4.i ; [#uses=1]
14 %tmp448.i = sext i8 %tmp.i to i32 ; [#uses=1]
15 %tmp449.i = add i32 %tmp448.i, %tmp446.i ; [#uses=2]
16 %tmp450.i = ptrtoint i8* %__s441.2.4.i to i32 ; [#uses=1]
17 %tmp451.i = add i32 %tmp450.i, 1 ; [#uses=1]
18 %tmp451.i.upgrd.1 = inttoptr i32 %tmp451.i to i8* ; [#uses=2]
19 %tmp45435.i = load i8* %tmp451.i.upgrd.1 ; [#uses=1]
20 %tmp45536.i = icmp eq i8 %tmp45435.i, 0 ; [#uses=1]
21 br i1 %tmp45536.i, label %bb459.i.exitStub, label %cond_true456.i
22 }
23
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test/CodeGen/X86/2006-05-11-InstrSched.ll less more
None ; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mcpu=penryn -mattr=+sse2 -stats -realign-stack=0 2>&1 | \
1 ; RUN: grep "asm-printer" | grep 35
2
3 target datalayout = "e-p:32:32"
4 define void @foo(i32* %mc, i32* %bp, i32* %ms, i32* %xmb, i32* %mpp, i32* %tpmm, i32* %ip, i32* %tpim, i32* %dpp, i32* %tpdm, i32* %bpi, i32 %M) nounwind {
5 entry:
6 %tmp9 = icmp slt i32 %M, 5 ; [#uses=1]
7 br i1 %tmp9, label %return, label %cond_true
8
9 cond_true: ; preds = %cond_true, %entry
10 %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %cond_true ] ; [#uses=2]
11 %tmp. = shl i32 %indvar, 2 ; [#uses=1]
12 %tmp.10 = add nsw i32 %tmp., 1 ; [#uses=2]
13 %tmp31 = add nsw i32 %tmp.10, -1 ; [#uses=4]
14 %tmp32 = getelementptr i32* %mpp, i32 %tmp31 ; [#uses=1]
15 %tmp34 = bitcast i32* %tmp32 to <16 x i8>* ; [#uses=1]
16 %tmp = load <16 x i8>* %tmp34, align 1
17 %tmp42 = getelementptr i32* %tpmm, i32 %tmp31 ; [#uses=1]
18 %tmp42.upgrd.1 = bitcast i32* %tmp42 to <4 x i32>* ; <<4 x i32>*> [#uses=1]
19 %tmp46 = load <4 x i32>* %tmp42.upgrd.1 ; <<4 x i32>> [#uses=1]
20 %tmp54 = bitcast <16 x i8> %tmp to <4 x i32> ; <<4 x i32>> [#uses=1]
21 %tmp55 = add <4 x i32> %tmp54, %tmp46 ; <<4 x i32>> [#uses=2]
22 %tmp55.upgrd.2 = bitcast <4 x i32> %tmp55 to <2 x i64> ; <<2 x i64>> [#uses=1]
23 %tmp62 = getelementptr i32* %ip, i32 %tmp31 ; [#uses=1]
24 %tmp65 = bitcast i32* %tmp62 to <16 x i8>* ; [#uses=1]
25 %tmp66 = load <16 x i8>* %tmp65, align 1
26 %tmp73 = getelementptr i32* %tpim, i32 %tmp31 ; [#uses=1]
27 %tmp73.upgrd.3 = bitcast i32* %tmp73 to <4 x i32>* ; <<4 x i32>*> [#uses=1]
28 %tmp77 = load <4 x i32>* %tmp73.upgrd.3 ; <<4 x i32>> [#uses=1]
29 %tmp87 = bitcast <16 x i8> %tmp66 to <4 x i32> ; <<4 x i32>> [#uses=1]
30 %tmp88 = add <4 x i32> %tmp87, %tmp77 ; <<4 x i32>> [#uses=2]
31 %tmp88.upgrd.4 = bitcast <4 x i32> %tmp88 to <2 x i64> ; <<2 x i64>> [#uses=1]
32 %tmp99 = tail call <4 x i32> @llvm.x86.sse2.psra.d( <4 x i32> %tmp88, <4 x i32> %tmp55 ) ; <<4 x i32>> [#uses=1]
33 %tmp99.upgrd.5 = bitcast <4 x i32> %tmp99 to <2 x i64> ; <<2 x i64>> [#uses=2]
34 %tmp110 = xor <2 x i64> %tmp99.upgrd.5, < i64 -1, i64 -1 > ; <<2 x i64>> [#uses=1]
35 %tmp111 = and <2 x i64> %tmp110, %tmp55.upgrd.2 ; <<2 x i64>> [#uses=1]
36 %tmp121 = and <2 x i64> %tmp99.upgrd.5, %tmp88.upgrd.4 ; <<2 x i64>> [#uses=1]
37 %tmp131 = or <2 x i64> %tmp121, %tmp111 ; <<2 x i64>> [#uses=1]
38 %tmp137 = getelementptr i32* %mc, i32 %tmp.10 ; [#uses=1]
39 %tmp137.upgrd.7 = bitcast i32* %tmp137 to <2 x i64>* ; <<2 x i64>*> [#uses=1]
40 store <2 x i64> %tmp131, <2 x i64>* %tmp137.upgrd.7
41 %tmp147 = add nsw i32 %tmp.10, 8 ; [#uses=1]
42 %tmp.upgrd.8 = icmp ne i32 %tmp147, %M ; [#uses=1]
43 %indvar.next = add i32 %indvar, 1 ; [#uses=1]
44 br i1 %tmp.upgrd.8, label %cond_true, label %return
45
46 return: ; preds = %cond_true, %entry
47 ret void
48 }
49
50 declare <4 x i32> @llvm.x86.sse2.psra.d(<4 x i32>, <4 x i32>)
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-219
test/CodeGen/X86/2008-02-18-TailMergingBug.ll less more
None ; RUN: llc < %s -march=x86 -mcpu=yonah -stats 2>&1 | grep "Number of block tails merged" | grep 16
1 ; PR1909
2
3 @.str = internal constant [48 x i8] c"transformed bounds: (%.2f, %.2f), (%.2f, %.2f)\0A\00" ; <[48 x i8]*> [#uses=1]
4
5 define void @minmax(float* %result) nounwind optsize {
6 entry:
7 %tmp2 = load float* %result, align 4 ; [#uses=6]
8 %tmp4 = getelementptr float* %result, i32 2 ; [#uses=5]
9 %tmp5 = load float* %tmp4, align 4 ; [#uses=10]
10 %tmp7 = getelementptr float* %result, i32 4 ; [#uses=5]
11 %tmp8 = load float* %tmp7, align 4 ; [#uses=8]
12 %tmp10 = getelementptr float* %result, i32 6 ; [#uses=3]
13 %tmp11 = load float* %tmp10, align 4 ; [#uses=8]
14 %tmp12 = fcmp olt float %tmp8, %tmp11 ; [#uses=5]
15 br i1 %tmp12, label %bb, label %bb21
16
17 bb: ; preds = %entry
18 %tmp23469 = fcmp olt float %tmp5, %tmp8 ; [#uses=1]
19 br i1 %tmp23469, label %bb26, label %bb30
20
21 bb21: ; preds = %entry
22 %tmp23 = fcmp olt float %tmp5, %tmp11 ; [#uses=1]
23 br i1 %tmp23, label %bb26, label %bb30
24
25 bb26: ; preds = %bb21, %bb
26 %tmp52471 = fcmp olt float %tmp2, %tmp5 ; [#uses=1]
27 br i1 %tmp52471, label %bb111, label %bb59
28
29 bb30: ; preds = %bb21, %bb
30 br i1 %tmp12, label %bb40, label %bb50
31
32 bb40: ; preds = %bb30
33 %tmp52473 = fcmp olt float %tmp2, %tmp8 ; [#uses=1]
34 br i1 %tmp52473, label %bb111, label %bb59
35
36 bb50: ; preds = %bb30
37 %tmp52 = fcmp olt float %tmp2, %tmp11 ; [#uses=1]
38 br i1 %tmp52, label %bb111, label %bb59
39
40 bb59: ; preds = %bb50, %bb40, %bb26
41 br i1 %tmp12, label %bb72, label %bb80
42
43 bb72: ; preds = %bb59
44 %tmp82475 = fcmp olt float %tmp5, %tmp8 ; [#uses=2]
45 %brmerge786 = or i1 %tmp82475, %tmp12 ; [#uses=1]
46 %tmp4.mux787 = select i1 %tmp82475, float* %tmp4, float* %tmp7 ; [#uses=1]
47 br i1 %brmerge786, label %bb111, label %bb103
48
49 bb80: ; preds = %bb59
50 %tmp82 = fcmp olt float %tmp5, %tmp11 ; [#uses=2]
51 %brmerge = or i1 %tmp82, %tmp12 ; [#uses=1]
52 %tmp4.mux = select i1 %tmp82, float* %tmp4, float* %tmp7 ; [#uses=1]
53 br i1 %brmerge, label %bb111, label %bb103
54
55 bb103: ; preds = %bb80, %bb72
56 br label %bb111
57
58 bb111: ; preds = %bb103, %bb80, %bb72, %bb50, %bb40, %bb26
59 %iftmp.0.0.in = phi float* [ %tmp10, %bb103 ], [ %result, %bb26 ], [ %result, %bb40 ], [ %result, %bb50 ], [ %tmp4.mux, %bb80 ], [ %tmp4.mux787, %bb72 ] ; [#uses=1]
60 %iftmp.0.0 = load float* %iftmp.0.0.in ; [#uses=1]
61 %tmp125 = fcmp ogt float %tmp8, %tmp11 ; [#uses=5]
62 br i1 %tmp125, label %bb128, label %bb136
63
64 bb128: ; preds = %bb111
65 %tmp138477 = fcmp ogt float %tmp5, %tmp8 ; [#uses=1]
66 br i1 %tmp138477, label %bb141, label %bb145
67
68 bb136: ; preds = %bb111
69 %tmp138 = fcmp ogt float %tmp5, %tmp11 ; [#uses=1]
70 br i1 %tmp138, label %bb141, label %bb145
71
72 bb141: ; preds = %bb136, %bb128
73 %tmp167479 = fcmp ogt float %tmp2, %tmp5 ; [#uses=1]
74 br i1 %tmp167479, label %bb226, label %bb174
75
76 bb145: ; preds = %bb136, %bb128
77 br i1 %tmp125, label %bb155, label %bb165
78
79 bb155: ; preds = %bb145
80 %tmp167481 = fcmp ogt float %tmp2, %tmp8 ; [#uses=1]
81 br i1 %tmp167481, label %bb226, label %bb174
82
83 bb165: ; preds = %bb145
84 %tmp167 = fcmp ogt float %tmp2, %tmp11 ; [#uses=1]
85 br i1 %tmp167, label %bb226, label %bb174
86
87 bb174: ; preds = %bb165, %bb155, %bb141
88 br i1 %tmp125, label %bb187, label %bb195
89
90 bb187: ; preds = %bb174
91 %tmp197483 = fcmp ogt float %tmp5, %tmp8 ; [#uses=2]
92 %brmerge790 = or i1 %tmp197483, %tmp125 ; [#uses=1]
93 %tmp4.mux791 = select i1 %tmp197483, float* %tmp4, float* %tmp7 ; [#uses=1]
94 br i1 %brmerge790, label %bb226, label %bb218
95
96 bb195: ; preds = %bb174
97 %tmp197 = fcmp ogt float %tmp5, %tmp11 ; [#uses=2]
98 %brmerge788 = or i1 %tmp197, %tmp125 ; [#uses=1]
99 %tmp4.mux789 = select i1 %tmp197, float* %tmp4, float* %tmp7 ; [#uses=1]
100 br i1 %brmerge788, label %bb226, label %bb218
101
102 bb218: ; preds = %bb195, %bb187
103 br label %bb226
104
105 bb226: ; preds = %bb218, %bb195, %bb187, %bb165, %bb155, %bb141
106 %iftmp.7.0.in = phi float* [ %tmp10, %bb218 ], [ %result, %bb141 ], [ %result, %bb155 ], [ %result, %bb165 ], [ %tmp4.mux789, %bb195 ], [ %tmp4.mux791, %bb187 ] ; [#uses=1]
107 %iftmp.7.0 = load float* %iftmp.7.0.in ; [#uses=1]
108 %tmp229 = getelementptr float* %result, i32 1 ; [#uses=7]
109 %tmp230 = load float* %tmp229, align 4 ; [#uses=6]
110 %tmp232 = getelementptr float* %result, i32 3 ; [#uses=5]
111 %tmp233 = load float* %tmp232, align 4 ; [#uses=10]
112 %tmp235 = getelementptr float* %result, i32 5 ; [#uses=5]
113 %tmp236 = load float* %tmp235, align 4 ; [#uses=8]
114 %tmp238 = getelementptr float* %result, i32 7 ; [#uses=3]
115 %tmp239 = load float* %tmp238, align 4 ; [#uses=8]
116 %tmp240 = fcmp olt float %tmp236, %tmp239 ; [#uses=5]
117 br i1 %tmp240, label %bb243, label %bb251
118
119 bb243: ; preds = %bb226
120 %tmp253485 = fcmp olt float %tmp233, %tmp236 ; [#uses=1]
121 br i1 %tmp253485, label %bb256, label %bb260
122
123 bb251: ; preds = %bb226
124 %tmp253 = fcmp olt float %tmp233, %tmp239 ; [#uses=1]
125 br i1 %tmp253, label %bb256, label %bb260
126
127 bb256: ; preds = %bb251, %bb243
128 %tmp282487 = fcmp olt float %tmp230, %tmp233 ; [#uses=1]
129 br i1 %tmp282487, label %bb341, label %bb289
130
131 bb260: ; preds = %bb251, %bb243
132 br i1 %tmp240, label %bb270, label %bb280
133
134 bb270: ; preds = %bb260
135 %tmp282489 = fcmp olt float %tmp230, %tmp236 ; [#uses=1]
136 br i1 %tmp282489, label %bb341, label %bb289
137
138 bb280: ; preds = %bb260
139 %tmp282 = fcmp olt float %tmp230, %tmp239 ; [#uses=1]
140 br i1 %tmp282, label %bb341, label %bb289
141
142 bb289: ; preds = %bb280, %bb270, %bb256
143 br i1 %tmp240, label %bb302, label %bb310
144
145 bb302: ; preds = %bb289
146 %tmp312491 = fcmp olt float %tmp233, %tmp236 ; [#uses=2]
147 %brmerge793 = or i1 %tmp312491, %tmp240 ; [#uses=1]
148 %tmp232.mux794 = select i1 %tmp312491, float* %tmp232, float* %tmp235 ; [#uses=1]
149 br i1 %brmerge793, label %bb341, label %bb333
150
151 bb310: ; preds = %bb289
152 %tmp312 = fcmp olt float %tmp233, %tmp239 ; [#uses=2]
153 %brmerge792 = or i1 %tmp312, %tmp240 ; [#uses=1]
154 %tmp232.mux = select i1 %tmp312, float* %tmp232, float* %tmp235 ; [#uses=1]
155 br i1 %brmerge792, label %bb341, label %bb333
156
157 bb333: ; preds = %bb310, %bb302
158 br label %bb341
159
160 bb341: ; preds = %bb333, %bb310, %bb302, %bb280, %bb270, %bb256
161 %iftmp.14.0.in = phi float* [ %tmp238, %bb333 ], [ %tmp229, %bb280 ], [ %tmp229, %bb270 ], [ %tmp229, %bb256 ], [ %tmp232.mux, %bb310 ], [ %tmp232.mux794, %bb302 ] ; [#uses=1]
162 %iftmp.14.0 = load float* %iftmp.14.0.in ; [#uses=1]
163 %tmp355 = fcmp ogt float %tmp236, %tmp239 ; [#uses=5]
164 br i1 %tmp355, label %bb358, label %bb366
165
166 bb358: ; preds = %bb341
167 %tmp368493 = fcmp ogt float %tmp233, %tmp236 ; [#uses=1]
168 br i1 %tmp368493, label %bb371, label %bb375
169
170 bb366: ; preds = %bb341
171 %tmp368 = fcmp ogt float %tmp233, %tmp239 ; [#uses=1]
172 br i1 %tmp368, label %bb371, label %bb375
173
174 bb371: ; preds = %bb366, %bb358
175 %tmp397495 = fcmp ogt float %tmp230, %tmp233 ; [#uses=1]
176 br i1 %tmp397495, label %bb456, label %bb404
177
178 bb375: ; preds = %bb366, %bb358
179 br i1 %tmp355, label %bb385, label %bb395
180
181 bb385: ; preds = %bb375
182 %tmp397497 = fcmp ogt float %tmp230, %tmp236 ; [#uses=1]
183 br i1 %tmp397497, label %bb456, label %bb404
184
185 bb395: ; preds = %bb375
186 %tmp397 = fcmp ogt float %tmp230, %tmp239 ; [#uses=1]
187 br i1 %tmp397, label %bb456, label %bb404
188
189 bb404: ; preds = %bb395, %bb385, %bb371
190 br i1 %tmp355, label %bb417, label %bb425
191
192 bb417: ; preds = %bb404
193 %tmp427499 = fcmp ogt float %tmp233, %tmp236 ; [#uses=2]
194 %brmerge797 = or i1 %tmp427499, %tmp355 ; [#uses=1]
195 %tmp232.mux798 = select i1 %tmp427499, float* %tmp232, float* %tmp235 ; [#uses=1]
196 br i1 %brmerge797, label %bb456, label %bb448
197
198 bb425: ; preds = %bb404
199 %tmp427 = fcmp ogt float %tmp233, %tmp239 ; [#uses=2]
200 %brmerge795 = or i1 %tmp427, %tmp355 ; [#uses=1]
201 %tmp232.mux796 = select i1 %tmp427, float* %tmp232, float* %tmp235 ; [#uses=1]
202 br i1 %brmerge795, label %bb456, label %bb448
203
204 bb448: ; preds = %bb425, %bb417
205 br label %bb456
206
207 bb456: ; preds = %bb448, %bb425, %bb417, %bb395, %bb385, %bb371
208 %iftmp.21.0.in = phi float* [ %tmp238, %bb448 ], [ %tmp229, %bb395 ], [ %tmp229, %bb385 ], [ %tmp229, %bb371 ], [ %tmp232.mux796, %bb425 ], [ %tmp232.mux798, %bb417 ] ; [#uses=1]
209 %iftmp.21.0 = load float* %iftmp.21.0.in ; [#uses=1]
210 %tmp458459 = fpext float %iftmp.21.0 to double ; [#uses=1]
211 %tmp460461 = fpext float %iftmp.7.0 to double ; [#uses=1]
212 %tmp462463 = fpext float %iftmp.14.0 to double ; [#uses=1]
213 %tmp464465 = fpext float %iftmp.0.0 to double ; [#uses=1]
214 %tmp467 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([48 x i8]* @.str, i32 0, i32 0), double %tmp464465, double %tmp462463, double %tmp460461, double %tmp458459 ) nounwind ; [#uses=0]
215 ret void
216 }
217
218 declare i32 @printf(i8*, ...) nounwind
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-51
test/CodeGen/X86/2008-10-27-CoalescerBug.ll less more
None ; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -stats 2>&1 | FileCheck %s
1 ; Now this test spills one register. But a reload in the loop is cheaper than
2 ; the divsd so it's a win.
3
4 define fastcc void @fourn(double* %data, i32 %isign) nounwind {
5 ; CHECK: fourn
6 entry:
7 br label %bb
8
9 bb: ; preds = %bb, %entry
10 %indvar93 = phi i32 [ 0, %entry ], [ %idim.030, %bb ] ; [#uses=2]
11 %idim.030 = add i32 %indvar93, 1 ; [#uses=1]
12 %0 = add i32 %indvar93, 2 ; [#uses=1]
13 %1 = icmp sgt i32 %0, 2 ; [#uses=1]
14 br i1 %1, label %bb30.loopexit, label %bb
15
16 ; CHECK: %bb30.loopexit
17 ; CHECK: divsd %xmm0
18 ; CHECK: movsd %xmm0, 16(%esp)
19 ; CHECK: %bb3
20 bb3: ; preds = %bb30.loopexit, %bb25, %bb3
21 %2 = load i32* null, align 4 ; [#uses=1]
22 %3 = mul i32 %2, 0 ; [#uses=1]
23 %4 = icmp slt i32 0, %3 ; [#uses=1]
24 br i1 %4, label %bb18, label %bb3
25
26 bb18: ; preds = %bb3
27 %5 = fdiv double %11, 0.000000e+00 ; [#uses=1]
28 %6 = tail call double @sin(double %5) nounwind readonly ; [#uses=1]
29 br label %bb24.preheader
30
31 bb22.preheader: ; preds = %bb24.preheader, %bb22.preheader
32 br label %bb22.preheader
33
34 bb25: ; preds = %bb24.preheader
35 %7 = fmul double 0.000000e+00, %6 ; [#uses=0]
36 %8 = add i32 %i3.122100, 0 ; [#uses=1]
37 %9 = icmp sgt i32 %8, 0 ; [#uses=1]
38 br i1 %9, label %bb3, label %bb24.preheader
39
40 bb24.preheader: ; preds = %bb25, %bb18
41 %i3.122100 = or i32 0, 1 ; [#uses=2]
42 %10 = icmp slt i32 0, %i3.122100 ; [#uses=1]
43 br i1 %10, label %bb25, label %bb22.preheader
44
45 bb30.loopexit: ; preds = %bb
46 %11 = fmul double 0.000000e+00, 0x401921FB54442D1C ; [#uses=1]
47 br label %bb3
48 }
49
50 declare double @sin(double) nounwind readonly
+0
-14
test/CodeGen/X86/2009-02-25-CommuteBug.ll less more
None ; RUN: llc < %s -march=x86 -mattr=+sse2 -stats 2>&1 | not grep commuted
1 ; rdar://6608609
2
3 define <2 x double> @t(<2 x double> %A, <2 x double> %B, <2 x double> %C) nounwind readnone {
4 entry:
5 %tmp.i2 = bitcast <2 x double> %B to <2 x i64> ; <<2 x i64>> [#uses=1]
6 %tmp2.i = or <2 x i64> %tmp.i2, ; <<2 x i64>> [#uses=1]
7 %tmp3.i = bitcast <2 x i64> %tmp2.i to <2 x double> ; <<2 x double>> [#uses=1]
8 %0 = tail call <2 x double> @llvm.x86.sse2.add.sd(<2 x double> %A, <2 x double> %tmp3.i) nounwind readnone ; <<2 x double>> [#uses=1]
9 %tmp.i = fadd <2 x double> %0, %C ; <<2 x double>> [#uses=1]
10 ret <2 x double> %tmp.i
11 }
12
13 declare <2 x double> @llvm.x86.sse2.add.sd(<2 x double>, <2 x double>) nounwind readnone
+0
-56
test/CodeGen/X86/2009-02-26-MachineLICMBug.ll less more
None ; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 -mcpu=penryn -stats 2>&1 | grep "5 machine-licm"
1 ; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 -mcpu=penryn | FileCheck %s
2 ; rdar://6627786
3 ; rdar://7792037
4
5 target triple = "x86_64-apple-darwin10.0"
6 %struct.Key = type { i64 }
7 %struct.__Rec = type opaque
8 %struct.__vv = type { }
9
10 define %struct.__vv* @t(%struct.Key* %desc, i64 %p) nounwind ssp {
11 entry:
12 br label %bb4
13
14 bb4: ; preds = %bb.i, %bb26, %bb4, %entry
15 ; CHECK: %bb4
16 ; CHECK: xorb
17 ; CHECK: callq
18 ; CHECK: movq
19 ; CHECK: xorl
20 ; CHECK: xorb
21
22 %0 = call i32 (...)* @xxGetOffsetForCode(i32 undef) nounwind ; [#uses=0]
23 %ins = or i64 %p, 2097152 ; [#uses=1]
24 %1 = call i32 (...)* @xxCalculateMidType(%struct.Key* %desc, i32 0) nounwind ; [#uses=1]
25 %cond = icmp eq i32 %1, 1 ; [#uses=1]
26 br i1 %cond, label %bb26, label %bb4
27
28 bb26: ; preds = %bb4
29 %2 = and i64 %ins, 15728640 ; [#uses=1]
30 %cond.i = icmp eq i64 %2, 1048576 ; [#uses=1]
31 br i1 %cond.i, label %bb.i, label %bb4
32
33 bb.i: ; preds = %bb26
34 %3 = load i32* null, align 4 ; [#uses=1]
35 %4 = uitofp i32 %3 to float ; [#uses=1]
36 %.sum13.i = add i64 0, 4 ; [#uses=1]
37 %5 = getelementptr i8* null, i64 %.sum13.i ; [#uses=1]
38 %6 = bitcast i8* %5 to i32* ; [#uses=1]
39 %7 = load i32* %6, align 4 ; [#uses=1]
40 %8 = uitofp i32 %7 to float ; [#uses=1]
41 %.sum.i = add i64 0, 8 ; [#uses=1]
42 %9 = getelementptr i8* null, i64 %.sum.i ; [#uses=1]
43 %10 = bitcast i8* %9 to i32* ; [#uses=1]
44 %11 = load i32* %10, align 4 ; [#uses=1]
45 %12 = uitofp i32 %11 to float ; [#uses=1]
46 %13 = insertelement <4 x float> undef, float %4, i32 0 ; <<4 x float>> [#uses=1]
47 %14 = insertelement <4 x float> %13, float %8, i32 1 ; <<4 x float>> [#uses=1]
48 %15 = insertelement <4 x float> %14, float %12, i32 2 ; <<4 x float>> [#uses=1]
49 store <4 x float> %15, <4 x float>* null, align 16
50 br label %bb4
51 }
52
53 declare i32 @xxGetOffsetForCode(...)
54
55 declare i32 @xxCalculateMidType(...)
+0
-242
test/CodeGen/X86/2009-03-23-MultiUseSched.ll less more
None ; RUN: llc < %s -mtriple=x86_64-linux -relocation-model=static -o /dev/null -stats -info-output-file - > %t
1 ; RUN: not grep spill %t
2 ; RUN: not grep "%rsp" %t
3 ; RUN: not grep "%rbp" %t
4
5 ; The register-pressure scheduler should be able to schedule this in a
6 ; way that does not require spills.
7
8 @X = external global i64 ; [#uses=25]
9
10 define fastcc i64 @foo() nounwind {
11 %tmp = load volatile i64* @X ; [#uses=7]
12 %tmp1 = load volatile i64* @X ; [#uses=5]
13 %tmp2 = load volatile i64* @X ; [#uses=3]
14 %tmp3 = load volatile i64* @X ; [#uses=1]
15 %tmp4 = load volatile i64* @X ; [#uses=5]
16 %tmp5 = load volatile i64* @X ; [#uses=3]
17 %tmp6 = load volatile i64* @X ; [#uses=2]
18 %tmp7 = load volatile i64* @X ; [#uses=1]
19 %tmp8 = load volatile i64* @X ; [#uses=1]
20 %tmp9 = load volatile i64* @X ; [#uses=1]
21 %tmp10 = load volatile i64* @X ; [#uses=1]
22 %tmp11 = load volatile i64* @X ; [#uses=1]
23 %tmp12 = load volatile i64* @X ; [#uses=1]
24 %tmp13 = load volatile i64* @X ; [#uses=1]
25 %tmp14 = load volatile i64* @X ; [#uses=1]
26 %tmp15 = load volatile i64* @X ; [#uses=1]
27 %tmp16 = load volatile i64* @X ; [#uses=1]
28 %tmp17 = load volatile i64* @X ; [#uses=1]
29 %tmp18 = load volatile i64* @X ; [#uses=1]
30 %tmp19 = load volatile i64* @X ; [#uses=1]
31 %tmp20 = load volatile i64* @X ; [#uses=1]
32 %tmp21 = load volatile i64* @X ; [#uses=1]
33 %tmp22 = load volatile i64* @X ; [#uses=1]
34 %tmp23 = load volatile i64* @X ; [#uses=1]
35 %tmp24 = call i64 @llvm.bswap.i64(i64 %tmp8) ; [#uses=1]
36 %tmp25 = add i64 %tmp6, %tmp5 ; [#uses=1]
37 %tmp26 = add i64 %tmp25, %tmp4 ; [#uses=1]
38 %tmp27 = add i64 %tmp7, %tmp4 ; [#uses=1]
39 %tmp28 = add i64 %tmp27, %tmp26 ; [#uses=1]
40 %tmp29 = add i64 %tmp28, %tmp24 ; [#uses=2]
41 %tmp30 = add i64 %tmp2, %tmp1 ; [#uses=1]
42 %tmp31 = add i64 %tmp30, %tmp ; [#uses=1]
43 %tmp32 = add i64 %tmp2, %tmp1 ; [#uses=1]
44 %tmp33 = add i64 %tmp31, %tmp32 ; [#uses=1]
45 %tmp34 = add i64 %tmp29, %tmp3 ; [#uses=5]
46 %tmp35 = add i64 %tmp33, %tmp ; [#uses=1]
47 %tmp36 = add i64 %tmp35, %tmp29 ; [#uses=7]
48 %tmp37 = call i64 @llvm.bswap.i64(i64 %tmp9) ; [#uses=1]
49 %tmp38 = add i64 %tmp4, %tmp5 ; [#uses=1]
50 %tmp39 = add i64 %tmp38, %tmp34 ; [#uses=1]
51 %tmp40 = add i64 %tmp6, %tmp37 ; [#uses=1]
52 %tmp41 = add i64 %tmp40, %tmp39 ; [#uses=1]
53 %tmp42 = add i64 %tmp41, %tmp34 ; [#uses=2]
54 %tmp43 = add i64 %tmp1, %tmp ; [#uses=1]
55 %tmp44 = add i64 %tmp36, %tmp43 ; [#uses=1]
56 %tmp45 = add i64 %tmp1, %tmp ; [#uses=1]
57 %tmp46 = add i64 %tmp44, %tmp45 ; [#uses=1]
58 %tmp47 = add i64 %tmp42, %tmp2 ; [#uses=5]
59 %tmp48 = add i64 %tmp36, %tmp46 ; [#uses=1]
60 %tmp49 = add i64 %tmp48, %tmp42 ; [#uses=7]
61 %tmp50 = call i64 @llvm.bswap.i64(i64 %tmp10) ; [#uses=1]
62 %tmp51 = add i64 %tmp34, %tmp4 ; [#uses=1]
63 %tmp52 = add i64 %tmp51, %tmp47 ; [#uses=1]
64 %tmp53 = add i64 %tmp5, %tmp50 ; [#uses=1]
65 %tmp54 = add i64 %tmp53, %tmp52 ; [#uses=1]
66 %tmp55 = add i64 %tmp54, %tmp47 ; [#uses=2]
67 %tmp56 = add i64 %tmp36, %tmp ; [#uses=1]
68 %tmp57 = add i64 %tmp49, %tmp56 ; [#uses=1]
69 %tmp58 = add i64 %tmp36, %tmp ; [#uses=1]
70 %tmp59 = add i64 %tmp57, %tmp58 ; [#uses=1]
71 %tmp60 = add i64 %tmp55, %tmp1 ; [#uses=5]
72 %tmp61 = add i64 %tmp49, %tmp59 ; [#uses=1]
73 %tmp62 = add i64 %tmp61, %tmp55 ; [#uses=7]
74 %tmp63 = call i64 @llvm.bswap.i64(i64 %tmp11) ; [#uses=1]
75 %tmp64 = add i64 %tmp47, %tmp34 ; [#uses=1]
76 %tmp65 = add i64 %tmp64, %tmp60 ; [#uses=1]
77 %tmp66 = add i64 %tmp4, %tmp63 ; [#uses=1]
78 %tmp67 = add i64 %tmp66, %tmp65 ; [#uses=1]
79 %tmp68 = add i64 %tmp67, %tmp60 ; [#uses=2]
80 %tmp69 = add i64 %tmp49, %tmp36 ; [#uses=1]
81 %tmp70 = add i64 %tmp62, %tmp69 ; [#uses=1]
82 %tmp71 = add i64 %tmp49, %tmp36 ; [#uses=1]
83 %tmp72 = add i64 %tmp70, %tmp71 ; [#uses=1]
84 %tmp73 = add i64 %tmp68, %tmp ; [#uses=5]
85 %tmp74 = add i64 %tmp62, %tmp72 ; [#uses=1]
86 %tmp75 = add i64 %tmp74, %tmp68 ; [#uses=7]
87 %tmp76 = call i64 @llvm.bswap.i64(i64 %tmp12) ; [#uses=1]
88 %tmp77 = add i64 %tmp60, %tmp47 ; [#uses=1]
89 %tmp78 = add i64 %tmp77, %tmp73 ; [#uses=1]
90 %tmp79 = add i64 %tmp34, %tmp76 ; [#uses=1]
91 %tmp80 = add i64 %tmp79, %tmp78 ; [#uses=1]
92 %tmp81 = add i64 %tmp80, %tmp73 ; [#uses=2]
93 %tmp82 = add i64 %tmp62, %tmp49 ; [#uses=1]
94 %tmp83 = add i64 %tmp75, %tmp82 ; [#uses=1]
95 %tmp84 = add i64 %tmp62, %tmp49 ; [#uses=1]
96 %tmp85 = add i64 %tmp83, %tmp84 ; [#uses=1]
97 %tmp86 = add i64 %tmp81, %tmp36 ; [#uses=5]
98 %tmp87 = add i64 %tmp75, %tmp85 ; [#uses=1]
99 %tmp88 = add i64 %tmp87, %tmp81 ; [#uses=7]
100 %tmp89 = call i64 @llvm.bswap.i64(i64 %tmp13) ; [#uses=1]
101 %tmp90 = add i64 %tmp73, %tmp60 ; [#uses=1]
102 %tmp91 = add i64 %tmp90, %tmp86 ; [#uses=1]
103 %tmp92 = add i64 %tmp47, %tmp89 ; [#uses=1]
104 %tmp93 = add i64 %tmp92, %tmp91 ; [#uses=1]
105 %tmp94 = add i64 %tmp93, %tmp86 ; [#uses=2]
106 %tmp95 = add i64 %tmp75, %tmp62 ; [#uses=1]
107 %tmp96 = add i64 %tmp88, %tmp95 ; [#uses=1]
108 %tmp97 = add i64 %tmp75, %tmp62 ; [#uses=1]
109 %tmp98 = add i64 %tmp96, %tmp97 ; [#uses=1]
110 %tmp99 = add i64 %tmp94, %tmp49 ; [#uses=5]
111 %tmp100 = add i64 %tmp88, %tmp98 ; [#uses=1]
112 %tmp101 = add i64 %tmp100, %tmp94 ; [#uses=7]
113 %tmp102 = call i64 @llvm.bswap.i64(i64 %tmp14) ; [#uses=1]
114 %tmp103 = add i64 %tmp86, %tmp73 ; [#uses=1]
115 %tmp104 = add i64 %tmp103, %tmp99 ; [#uses=1]
116 %tmp105 = add i64 %tmp102, %tmp60 ; [#uses=1]
117 %tmp106 = add i64 %tmp105, %tmp104 ; [#uses=1]
118 %tmp107 = add i64 %tmp106, %tmp99 ; [#uses=2]
119 %tmp108 = add i64 %tmp88, %tmp75 ; [#uses=1]
120 %tmp109 = add i64 %tmp101, %tmp108 ; [#uses=1]
121 %tmp110 = add i64 %tmp88, %tmp75 ; [#uses=1]
122 %tmp111 = add i64 %tmp109, %tmp110 ; [#uses=1]
123 %tmp112 = add i64 %tmp107, %tmp62 ; [#uses=5]
124 %tmp113 = add i64 %tmp101, %tmp111 ; [#uses=1]
125 %tmp114 = add i64 %tmp113, %tmp107 ; [#uses=7]
126 %tmp115 = call i64 @llvm.bswap.i64(i64 %tmp15) ; [#uses=1]
127 %tmp116 = add i64 %tmp99, %tmp86 ; [#uses=1]
128 %tmp117 = add i64 %tmp116, %tmp112 ; [#uses=1]
129 %tmp118 = add i64 %tmp115, %tmp73 ; [#uses=1]
130 %tmp119 = add i64 %tmp118, %tmp117 ; [#uses=1]
131 %tmp120 = add i64 %tmp119, %tmp112 ; [#uses=2]
132 %tmp121 = add i64 %tmp101, %tmp88 ; [#uses=1]
133 %tmp122 = add i64 %tmp114, %tmp121 ; [#uses=1]
134 %tmp123 = add i64 %tmp101, %tmp88 ; [#uses=1]
135 %tmp124 = add i64 %tmp122, %tmp123 ; [#uses=1]
136 %tmp125 = add i64 %tmp120, %tmp75 ; [#uses=5]
137 %tmp126 = add i64 %tmp114, %tmp124 ; [#uses=1]
138 %tmp127 = add i64 %tmp126, %tmp120 ; [#uses=7]
139 %tmp128 = call i64 @llvm.bswap.i64(i64 %tmp16) ; [#uses=1]
140 %tmp129 = add i64 %tmp112, %tmp99 ; [#uses=1]
141 %tmp130 = add i64 %tmp129, %tmp125 ; [#uses=1]
142 %tmp131 = add i64 %tmp128, %tmp86 ; [#uses=1]
143 %tmp132 = add i64 %tmp131, %tmp130 ; [#uses=1]
144 %tmp133 = add i64 %tmp132, %tmp125 ; [#uses=2]
145 %tmp134 = add i64 %tmp114, %tmp101 ; [#uses=1]
146 %tmp135 = add i64 %tmp127, %tmp134 ; [#uses=1]
147 %tmp136 = add i64 %tmp114, %tmp101 ; [#uses=1]
148 %tmp137 = add i64 %tmp135, %tmp136 ; [#uses=1]
149 %tmp138 = add i64 %tmp133, %tmp88 ; [#uses=5]
150 %tmp139 = add i64 %tmp127, %tmp137 ; [#uses=1]
151 %tmp140 = add i64 %tmp139, %tmp133 ; [#uses=7]
152 %tmp141 = call i64 @llvm.bswap.i64(i64 %tmp17) ; [#uses=1]
153 %tmp142 = add i64 %tmp125, %tmp112 ; [#uses=1]
154 %tmp143 = add i64 %tmp142, %tmp138 ; [#uses=1]
155 %tmp144 = add i64 %tmp141, %tmp99 ; [#uses=1]
156 %tmp145 = add i64 %tmp144, %tmp143 ; [#uses=1]
157 %tmp146 = add i64 %tmp145, %tmp138 ; [#uses=2]
158 %tmp147 = add i64 %tmp127, %tmp114 ; [#uses=1]
159 %tmp148 = add i64 %tmp140, %tmp147 ; [#uses=1]
160 %tmp149 = add i64 %tmp127, %tmp114 ; [#uses=1]
161 %tmp150 = add i64 %tmp148, %tmp149 ; [#uses=1]
162 %tmp151 = add i64 %tmp146, %tmp101 ; [#uses=5]
163 %tmp152 = add i64 %tmp140, %tmp150 ; [#uses=1]
164 %tmp153 = add i64 %tmp152, %tmp146 ; [#uses=7]
165 %tmp154 = call i64 @llvm.bswap.i64(i64 %tmp18) ; [#uses=1]
166 %tmp155 = add i64 %tmp138, %tmp125 ; [#uses=1]
167 %tmp156 = add i64 %tmp155, %tmp151 ; [#uses=1]
168 %tmp157 = add i64 %tmp154, %tmp112 ; [#uses=1]
169 %tmp158 = add i64 %tmp157, %tmp156 ; [#uses=1]
170 %tmp159 = add i64 %tmp158, %tmp151 ; [#uses=2]
171 %tmp160 = add i64 %tmp140, %tmp127 ; [#uses=1]
172 %tmp161 = add i64 %tmp153, %tmp160 ; [#uses=1]
173 %tmp162 = add i64 %tmp140, %tmp127 ; [#uses=1]
174 %tmp163 = add i64 %tmp161, %tmp162 ; [#uses=1]
175 %tmp164 = add i64 %tmp159, %tmp114 ; [#uses=5]
176 %tmp165 = add i64 %tmp153, %tmp163 ; [#uses=1]
177 %tmp166 = add i64 %tmp165, %tmp159 ; [#uses=7]
178 %tmp167 = call i64 @llvm.bswap.i64(i64 %tmp19) ; [#uses=1]
179 %tmp168 = add i64 %tmp151, %tmp138 ; [#uses=1]
180 %tmp169 = add i64 %tmp168, %tmp164 ; [#uses=1]
181 %tmp170 = add i64 %tmp167, %tmp125 ; [#uses=1]
182 %tmp171 = add i64 %tmp170, %tmp169 ; [#uses=1]
183 %tmp172 = add i64 %tmp171, %tmp164 ; [#uses=2]
184 %tmp173 = add i64 %tmp153, %tmp140 ; [#uses=1]
185 %tmp174 = add i64 %tmp166, %tmp173 ; [#uses=1]
186 %tmp175 = add i64 %tmp153, %tmp140 ; [#uses=1]
187 %tmp176 = add i64 %tmp174, %tmp175 ; [#uses=1]
188 %tmp177 = add i64 %tmp172, %tmp127 ; [#uses=5]
189 %tmp178 = add i64 %tmp166, %tmp176 ; [#uses=1]
190 %tmp179 = add i64 %tmp178, %tmp172 ; [#uses=6]
191 %tmp180 = call i64 @llvm.bswap.i64(i64 %tmp20) ; [#uses=1]
192 %tmp181 = add i64 %tmp164, %tmp151 ; [#uses=1]
193 %tmp182 = add i64 %tmp181, %tmp177 ; [#uses=1]
194 %tmp183 = add i64 %tmp180, %tmp138 ; [#uses=1]
195 %tmp184 = add i64 %tmp183, %tmp182 ; [#uses=1]
196 %tmp185 = add i64 %tmp184, %tmp177 ; [#uses=2]
197 %tmp186 = add i64 %tmp166, %tmp153 ; [#uses=1]
198 %tmp187 = add i64 %tmp179, %tmp186 ; [#uses=1]
199 %tmp188 = add i64 %tmp166, %tmp153 ; [#uses=1]
200 %tmp189 = add i64 %tmp187, %tmp188 ; [#uses=1]
201 %tmp190 = add i64 %tmp185, %tmp140 ; [#uses=4]
202 %tmp191 = add i64 %tmp179, %tmp189 ; [#uses=1]
203 %tmp192 = add i64 %tmp191, %tmp185 ; [#uses=4]
204 %tmp193 = call i64 @llvm.bswap.i64(i64 %tmp21) ; [#uses=1]
205 %tmp194 = add i64 %tmp177, %tmp164 ; [#uses=1]
206 %tmp195 = add i64 %tmp194, %tmp190 ; [#uses=1]
207 %tmp196 = add i64 %tmp193, %tmp151 ; [#uses=1]
208 %tmp197 = add i64 %tmp196, %tmp195 ; [#uses=1]
209 %tmp198 = add i64 %tmp197, %tmp190 ; [#uses=2]
210 %tmp199 = add i64 %tmp179, %tmp166 ; [#uses=1]
211 %tmp200 = add i64 %tmp192, %tmp199 ; [#uses=1]
212 %tmp201 = add i64 %tmp179, %tmp166 ; [#uses=1]
213 %tmp202 = add i64 %tmp200, %tmp201 ; [#uses=1]
214 %tmp203 = add i64 %tmp198, %tmp153 ; [#uses=3]
215 %tmp204 = add i64 %tmp192, %tmp202 ; [#uses=1]
216 %tmp205 = add i64 %tmp204, %tmp198 ; [#uses=2]
217 %tmp206 = call i64 @llvm.bswap.i64(i64 %tmp22) ; [#uses=1]
218 %tmp207 = add i64 %tmp190, %tmp177 ; [#uses=1]
219 %tmp208 = add i64 %tmp207, %tmp203 ; [#uses=1]
220 %tmp209 = add i64 %tmp206, %tmp164 ; [#uses=1]
221 %tmp210 = add i64 %tmp209, %tmp208 ; [#uses=1]
222 %tmp211 = add i64 %tmp210, %tmp203 ; [#uses=2]
223 %tmp212 = add i64 %tmp192, %tmp179 ; [#uses=1]
224 %tmp213 = add i64 %tmp205, %tmp212 ; [#uses=1]
225 %tmp214 = add i64 %tmp192, %tmp179 ; [#uses=1]
226 %tmp215 = add i64 %tmp213, %tmp214 ; [#uses=1]
227 %tmp216 = add i64 %tmp211, %tmp166 ; [#uses=2]
228 %tmp217 = add i64 %tmp205, %tmp215 ; [#uses=1]
229 %tmp218 = add i64 %tmp217, %tmp211 ; [#uses=1]
230 %tmp219 = call i64 @llvm.bswap.i64(i64 %tmp23) ; [#uses=2]
231 store volatile i64 %tmp219, i64* @X, align 8
232 %tmp220 = add i64 %tmp203, %tmp190 ; [#uses=1]
233 %tmp221 = add i64 %tmp220, %tmp216 ; [#uses=1]
234 %tmp222 = add i64 %tmp219, %tmp177 ; [#uses=1]
235 %tmp223 = add i64 %tmp222, %tmp221 ; [#uses=1]
236 %tmp224 = add i64 %tmp223, %tmp216 ; [#uses=1]
237 %tmp225 = add i64 %tmp224, %tmp218 ; [#uses=1]
238 ret i64 %tmp225
239 }
240
241 declare i64 @llvm.bswap.i64(i64) nounwind readnone
+0
-141
test/CodeGen/X86/2009-04-16-SpillerUnfold.ll less more
None ; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats 2>&1 | grep "Number of modref unfolded"
1 ; XFAIL: *
2 ; 69408 removed the opportunity for this optimization to work
3
4 %struct.SHA512_CTX = type { [8 x i64], i64, i64, %struct.anon, i32, i32 }
5 %struct.anon = type { [16 x i64] }
6 @K512 = external constant [80 x i64], align 32 ; <[80 x i64]*> [#uses=2]
7
8 define fastcc void @sha512_block_data_order(%struct.SHA512_CTX* nocapture %ctx, i8* nocapture %in, i64 %num) nounwind ssp {
9 entry:
10 br label %bb349
11
12 bb349: ; preds = %bb349, %entry
13 %e.0489 = phi i64 [ 0, %entry ], [ %e.0, %bb349 ] ; [#uses=3]
14 %b.0472 = phi i64 [ 0, %entry ], [ %87, %bb349 ] ; [#uses=2]
15 %asmtmp356 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 41, i64 %e.0489) nounwind ; [#uses=1]
16 %0 = xor i64 0, %asmtmp356 ; [#uses=1]
17 %1 = add i64 0, %0 ; [#uses=1]
18 %2 = add i64 %1, 0 ; [#uses=1]
19 %3 = add i64 %2, 0 ; [#uses=1]
20 %4 = add i64 %3, 0 ; [#uses=5]
21 %asmtmp372 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 34, i64 %4) nounwind ; [#uses=1]
22 %asmtmp373 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 39, i64 %4) nounwind ; [#uses=0]
23 %5 = xor i64 %asmtmp372, 0 ; [#uses=0]
24 %6 = xor i64 0, %b.0472 ; [#uses=1]
25 %7 = and i64 %4, %6 ; [#uses=1]
26 %8 = xor i64 %7, 0 ; [#uses=1]
27 %9 = add i64 0, %8 ; [#uses=1]
28 %10 = add i64 %9, 0 ; [#uses=2]
29 %asmtmp377 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 61, i64 0) nounwind ; [#uses=1]
30 %11 = xor i64 0, %asmtmp377 ; [#uses=1]
31 %12 = add i64 0, %11 ; [#uses=1]
32 %13 = add i64 %12, 0 ; [#uses=1]
33 %not381 = xor i64 0, -1 ; [#uses=1]
34 %14 = and i64 %e.0489, %not381 ; [#uses=1]
35 %15 = xor i64 0, %14 ; [#uses=1]
36 %16 = add i64 %15, 0 ; [#uses=1]
37 %17 = add i64 %16, %13 ; [#uses=1]
38 %18 = add i64 %17, 0 ; [#uses=1]
39 %19 = add i64 %18, 0 ; [#uses=2]
40 %20 = add i64 %19, %b.0472 ; [#uses=3]
41 %21 = add i64 %19, 0 ; [#uses=1]
42 %22 = add i64 %21, 0 ; [#uses=1]
43 %23 = add i32 0, 12 ; [#uses=1]
44 %24 = and i32 %23, 12 ; [#uses=1]
45 %25 = zext i32 %24 to i64 ; [#uses=1]
46 %26 = getelementptr [16 x i64]* null, i64 0, i64 %25 ; [#uses=0]
47 %27 = add i64 0, %e.0489 ; [#uses=1]
48 %28 = add i64 %27, 0 ; [#uses=1]
49 %29 = add i64 %28, 0 ; [#uses=1]
50 %30 = add i64 %29, 0 ; [#uses=2]
51 %31 = and i64 %10, %4 ; [#uses=1]
52 %32 = xor i64 0, %31 ; [#uses=1]
53 %33 = add i64 %30, 0 ; [#uses=3]
54 %34 = add i64 %30, %32 ; [#uses=1]
55 %35 = add i64 %34, 0 ; [#uses=1]
56 %36 = and i64 %33, %20 ; [#uses=1]
57 %37 = xor i64 %36, 0 ; [#uses=1]
58 %38 = add i64 %37, 0 ; [#uses=1]
59 %39 = add i64 %38, 0 ; [#uses=1]
60 %40 = add i64 %39, 0 ; [#uses=1]
61 %41 = add i64 %40, 0 ; [#uses=1]
62 %42 = add i64 %41, %4 ; [#uses=3]
63 %43 = or i32 0, 6 ; [#uses=1]
64 %44 = and i32 %43, 14 ; [#uses=1]
65 %45 = zext i32 %44 to i64 ; [#uses=1]
66 %46 = getelementptr [16 x i64]* null, i64 0, i64 %45 ; [#uses=1]
67 %not417 = xor i64 %42, -1 ; [#uses=1]
68 %47 = and i64 %20, %not417 ; [#uses=1]
69 %48 = xor i64 0, %47 ; [#uses=1]
70 %49 = getelementptr [80 x i64]* @K512, i64 0, i64 0 ; [#uses=1]
71 %50 = load i64* %49, align 8 ; [#uses=1]
72 %51 = add i64 %48, 0 ; [#uses=1]
73 %52 = add i64 %51, 0 ; [#uses=1]
74 %53 = add i64 %52, 0 ; [#uses=1]
75 %54 = add i64 %53, %50 ; [#uses=2]
76 %asmtmp420 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 34, i64 0) nounwind ; [#uses=1]
77 %asmtmp421 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 39, i64 0) nounwind ; [#uses=1]
78 %55 = xor i64 %asmtmp420, 0 ; [#uses=1]
79 %56 = xor i64 %55, %asmtmp421 ; [#uses=1]
80 %57 = add i64 %54, %10 ; [#uses=5]
81 %58 = add i64 %54, 0 ; [#uses=1]
82 %59 = add i64 %58, %56 ; [#uses=2]
83 %60 = or i32 0, 7 ; [#uses=1]
84 %61 = and i32 %60, 15 ; [#uses=1]
85 %62 = zext i32 %61 to i64 ; [#uses=1]
86 %63 = getelementptr [16 x i64]* null, i64 0, i64 %62 ; [#uses=2]
87 %64 = load i64* null, align 8 ; [#uses=1]
88 %65 = lshr i64 %64, 6 ; [#uses=1]
89 %66 = xor i64 0, %65 ; [#uses=1]
90 %67 = xor i64 %66, 0 ; [#uses=1]
91 %68 = load i64* %46, align 8 ; [#uses=1]
92 %69 = load i64* null, align 8 ; [#uses=1]
93 %70 = add i64 %68, 0 ; [#uses=1]
94 %71 = add i64 %70, %67 ; [#uses=1]
95 %72 = add i64 %71, %69 ; [#uses=1]
96 %asmtmp427 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 18, i64 %57) nounwind ; [#uses=1]
97 %asmtmp428 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 41, i64 %57) nounwind ; [#uses=1]
98 %73 = xor i64 %asmtmp427, 0 ; [#uses=1]
99 %74 = xor i64 %73, %asmtmp428 ; [#uses=1]
100 %75 = and i64 %57, %42 ; [#uses=1]
101 %not429 = xor i64 %57, -1 ; [#uses=1]
102 %76 = and i64 %33, %not429 ; [#uses=1]
103 %77 = xor i64 %75, %76 ; [#uses=1]
104 %78 = getelementptr [80 x i64]* @K512, i64 0, i64 0 ; [#uses=1]
105 %79 = load i64* %78, align 16 ; [#uses=1]
106 %80 = add i64 %77, %20 ; [#uses=1]
107 %81 = add i64 %80, %72 ; [#uses=1]
108 %82 = add i64 %81, %74 ; [#uses=1]
109 %83 = add i64 %82, %79 ; [#uses=1]
110 %asmtmp432 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 34, i64 %59) nounwind ; [#uses=1]
111 %asmtmp433 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 39, i64 %59) nounwind ; [#uses=1]
112 %84 = xor i64 %asmtmp432, 0 ; [#uses=1]
113 %85 = xor i64 %84, %asmtmp433 ; [#uses=1]
114 %86 = add i64 %83, %22 ; [#uses=2]
115 %87 = add i64 0, %85 ; [#uses=1]
116 %asmtmp435 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 8, i64 0) nounwind ; [#uses=1]
117 %88 = xor i64 0, %asmtmp435 ; [#uses=1]
118 %89 = load i64* null, align 8 ; [#uses=3]
119 %asmtmp436 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 19, i64 %89) nounwind ; [#uses=1]
120 %asmtmp437 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 61, i64 %89) nounwind ; [#uses=1]
121 %90 = lshr i64 %89, 6 ; [#uses=1]
122 %91 = xor i64 %asmtmp436, %90 ; [#uses=1]
123 %92 = xor i64 %91, %asmtmp437 ; [#uses=1]
124 %93 = load i64* %63, align 8 ; [#uses=1]
125 %94 = load i64* null, align 8 ; [#uses=1]
126 %95 = add i64 %93, %88 ; [#uses=1]
127 %96 = add i64 %95, %92 ; [#uses=1]
128 %97 = add i64 %96, %94 ; [#uses=2]
129 store i64 %97, i64* %63, align 8
130 %98 = and i64 %86, %57 ; [#uses=1]
131 %not441 = xor i64 %86, -1 ; [#uses=1]
132 %99 = and i64 %42, %not441 ; [#uses=1]
133 %100 = xor i64 %98, %99 ; [#uses=1]
134 %101 = add i64 %100, %33 ; [#uses=1]
135 %102 = add i64 %101, %97 ; [#uses=1]
136 %103 = add i64 %102, 0 ; [#uses=1]
137 %104 = add i64 %103, 0 ; [#uses=1]
138 %e.0 = add i64 %104, %35 ; [#uses=1]
139 br label %bb349
140 }
+0
-57
test/CodeGen/X86/2010-01-19-OptExtBug.ll less more
None ; RUN: llc < %s -mtriple=x86_64-apple-darwin11 -relocation-model=pic -disable-fp-elim -stats 2>&1 | not grep ext-opt
1
2 define fastcc i8* @S_scan_str(i8* %start, i32 %keep_quoted, i32 %keep_delims) nounwind ssp {
3 entry:
4 switch i8 undef, label %bb6 [
5 i8 9, label %bb5
6 i8 32, label %bb5
7 i8 10, label %bb5
8 i8 13, label %bb5
9 i8 12, label %bb5
10 ]
11
12 bb5: ; preds = %entry, %entry, %entry, %entry, %entry
13 br label %bb6
14
15 bb6: ; preds = %bb5, %entry
16 br i1 undef, label %bb7, label %bb9
17
18 bb7: ; preds = %bb6
19 unreachable
20
21 bb9: ; preds = %bb6
22 %0 = load i8* undef, align 1 ; [#uses=3]
23 br i1 undef, label %bb12, label %bb10
24
25 bb10: ; preds = %bb9
26 br i1 undef, label %bb12, label %bb11
27
28 bb11: ; preds = %bb10
29 unreachable
30
31 bb12: ; preds = %bb10, %bb9
32 br i1 undef, label %bb13, label %bb14
33
34 bb13: ; preds = %bb12
35 store i8 %0, i8* undef, align 1
36 %1 = zext i8 %0 to i32 ; [#uses=1]
37 br label %bb18
38
39 bb14: ; preds = %bb12
40 br label %bb18
41
42 bb18: ; preds = %bb14, %bb13
43 %termcode.0 = phi i32 [ %1, %bb13 ], [ undef, %bb14 ] ; [#uses=2]
44 %2 = icmp eq i8 %0, 0 ; [#uses=1]
45 br i1 %2, label %bb21, label %bb19
46
47 bb19: ; preds = %bb18
48 br i1 undef, label %bb21, label %bb20
49
50 bb20: ; preds = %bb19
51 br label %bb21
52
53 bb21: ; preds = %bb20, %bb19, %bb18
54 %termcode.1 = phi i32 [ %termcode.0, %bb18 ], [ %termcode.0, %bb19 ], [ undef, %bb20 ] ; [#uses=0]
55 unreachable
56 }
+0
-52
test/CodeGen/X86/2011-06-12-FastAllocSpill.ll less more
None ; RUN: llc < %s -O0 -disable-fp-elim -relocation-model=pic -stats 2>&1 | FileCheck %s
1 ;
2 ; This test should not cause any spilling with RAFast.
3 ;
4 ; CHECK: Number of copies coalesced
5 ; CHECK-NOT: Number of stores added
6 ;
7 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
8 target triple = "x86_64-apple-darwin10.0.0"
9
10 %0 = type { i64, i64, i8*, i8* }
11 %1 = type opaque
12 %2 = type opaque
13 %3 = type <{ i8*, i32, i32, void (%4*)*, i8*, i64 }>
14 %4 = type { i8**, i32, i32, i8**, %5*, i64 }
15 %5 = type { i64, i64 }
16 %6 = type { i8*, i32, i32, i8*, %5* }
17
18 @0 = external hidden constant %0
19
20 define hidden void @f() ssp {
21 bb:
22 %tmp5 = alloca i64, align 8
23 %tmp6 = alloca void ()*, align 8
24 %tmp7 = alloca %3, align 8
25 store i64 0, i64* %tmp5, align 8
26 br label %bb8
27
28 bb8: ; preds = %bb23, %bb
29 %tmp15 = getelementptr inbounds %3* %tmp7, i32 0, i32 4
30 store i8* bitcast (%0* @0 to i8*), i8** %tmp15
31 %tmp16 = bitcast %3* %tmp7 to void ()*
32 store void ()* %tmp16, void ()** %tmp6, align 8
33 %tmp17 = load void ()** %tmp6, align 8
34 %tmp18 = bitcast void ()* %tmp17 to %6*
35 %tmp19 = getelementptr inbounds %6* %tmp18, i32 0, i32 3
36 %tmp20 = bitcast %6* %tmp18 to i8*
37 %tmp21 = load i8** %tmp19
38 %tmp22 = bitcast i8* %tmp21 to void (i8*)*
39 call void %tmp22(i8* %tmp20)
40 br label %bb23
41
42 bb23: ; preds = %bb8
43 %tmp24 = load i64* %tmp5, align 8
44 %tmp25 = add i64 %tmp24, 1
45 store i64 %tmp25, i64* %tmp5, align 8
46 %tmp26 = icmp ult i64 %tmp25, 10
47 br i1 %tmp26, label %bb8, label %bb27
48
49 bb27: ; preds = %bb23
50 ret void
51 }
+0
-59
test/CodeGen/X86/2012-03-26-PostRALICMBug.ll less more
None ; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -stats 2>&1 | \
1 ; RUN: not grep "Number of machine instructions hoisted out of loops post regalloc"
2
3 ; rdar://11095580
4
5 %struct.ref_s = type { %union.color_sample, i16, i16 }
6 %union.color_sample = type { i64 }
7
8 @table = external global [3891 x i64]
9
10 declare i32 @foo()
11
12 define i32 @zarray(%struct.ref_s* nocapture %op) nounwind ssp {
13 entry:
14 %call = tail call i32 @foo()
15 %tmp = ashr i32 %call, 31
16 %0 = and i32 %tmp, 1396
17 %index9 = add i32 %0, 2397
18 indirectbr i8* undef, [label %return, label %if.end]
19
20 if.end: ; preds = %entry
21 %size5 = getelementptr inbounds %struct.ref_s* %op, i64 0, i32 2
22 %tmp6 = load i16* %size5, align 2
23 %tobool1 = icmp eq i16 %tmp6, 0
24 %1 = select i1 %tobool1, i32 1396, i32 -1910
25 %index10 = add i32 %index9, %1
26 indirectbr i8* undef, [label %return, label %while.body.lr.ph]
27
28 while.body.lr.ph: ; preds = %if.end
29 %refs = bitcast %struct.ref_s* %op to %struct.ref_s**
30 %tmp9 = load %struct.ref_s** %refs, align 8
31 %tmp4 = zext i16 %tmp6 to i64
32 %index13 = add i32 %index10, 1658
33 %2 = sext i32 %index13 to i64
34 %3 = getelementptr [3891 x i64]* @table, i64 0, i64 %2
35 %blockaddress14 = load i64* %3, align 8
36 %4 = inttoptr i64 %blockaddress14 to i8*
37 indirectbr i8* %4, [label %while.body]
38
39 while.body: ; preds = %while.body, %while.body.lr.ph
40 %index7 = phi i32 [ %index15, %while.body ], [ %index13, %while.body.lr.ph ]
41 %indvar = phi i64 [ %indvar.next, %while.body ], [ 0, %while.body.lr.ph ]
42 %type_attrs = getelementptr %struct.ref_s* %tmp9, i64 %indvar, i32 1
43 store i16 32, i16* %type_attrs, align 2
44 %indvar.next = add i64 %indvar, 1
45 %exitcond5 = icmp eq i64 %indvar.next, %tmp4
46 %tmp7 = select i1 %exitcond5, i32 1648, i32 0
47 %index15 = add i32 %index7, %tmp7
48 %tmp8 = select i1 %exitcond5, i64 13, i64 0
49 %5 = sext i32 %index15 to i64
50 %6 = getelementptr [3891 x i64]* @table, i64 0, i64 %5
51 %blockaddress16 = load i64* %6, align 8
52 %7 = inttoptr i64 %blockaddress16 to i8*
53 indirectbr i8* %7, [label %return, label %while.body]
54
55 return: ; preds = %while.body, %if.end, %entry
56 %retval.0 = phi i32 [ %call, %entry ], [ 0, %if.end ], [ 0, %while.body ]
57 ret i32 %retval.0
58 }
+0
-39
test/CodeGen/X86/MachineSink-PHIUse.ll less more
None ; RUN: llc < %s -mtriple=x86_64-appel-darwin -disable-cgp-branch-opts -stats 2>&1 | grep "machine-sink"
1
2 define fastcc void @t() nounwind ssp {
3 entry:
4 br i1 undef, label %bb, label %bb4
5
6 bb: ; preds = %entry
7 br i1 undef, label %return, label %bb3
8
9 bb3: ; preds = %bb
10 unreachable
11
12 bb4: ; preds = %entry
13 br i1 undef, label %bb.nph, label %return
14
15 bb.nph: ; preds = %bb4
16 br label %bb5
17
18 bb5: ; preds = %bb9, %bb.nph
19 %indvar = phi i64 [ 0, %bb.nph ], [ %tmp12, %bb9 ] ; [#uses=1]
20 %tmp12 = add i64 %indvar, 1 ; [#uses=2]
21 %tmp13 = trunc i64 %tmp12 to i32 ; [#uses=0]
22 br i1 undef, label %bb9, label %bb6
23
24 bb6: ; preds = %bb5
25 br i1 undef, label %bb9, label %bb7
26
27 bb7: ; preds = %bb6
28 br i1 undef, label %bb9, label %bb8
29
30 bb8: ; preds = %bb7
31 unreachable
32
33 bb9: ; preds = %bb7, %bb6, %bb5
34 br i1 undef, label %bb5, label %return
35
36 return: ; preds = %bb9, %bb4, %bb
37 ret void
38 }
0 ; The old instruction selector used to load all arguments to a call up in
1 ; registers, then start pushing them all onto the stack. This is bad news as
2 ; it makes a ton of annoying overlapping live ranges. This code should not
3 ; cause spills!
4 ;
5 ; RUN: llc < %s -march=x86 -stats 2>&1 | not grep spilled
6
7 target datalayout = "e-p:32:32"
8
9 define i32 @test(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) {
10 ret i32 0
11 }
12
13 define i32 @main() {
14 %X = call i32 @test( i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10 ) ; [#uses=1]
15 ret i32 %X
16 }
17
0 ; RUN: llc < %s -march=x86 -stats 2>&1 | \
1 ; RUN: grep asm-printer | grep 7
2
3 define i32 @g(i32 %a, i32 %b) nounwind {
4 %tmp.1 = shl i32 %b, 1 ; [#uses=1]
5 %tmp.3 = add i32 %tmp.1, %a ; [#uses=1]
6 %tmp.5 = mul i32 %tmp.3, %a ; [#uses=1]
7 %tmp.8 = mul i32 %b, %b ; [#uses=1]
8 %tmp.9 = add i32 %tmp.5, %tmp.8 ; [#uses=1]
9 ret i32 %tmp.9
10 }
11
0 ; RUN: llc < %s -march=x86 -mcpu=yonah -stats 2>&1 | \
1 ; RUN: not grep "Number of register spills"
2 ; END.
3
4
5 define i32 @foo(<4 x float>* %a, <4 x float>* %b, <4 x float>* %c, <4 x float>* %d) {
6 %tmp44 = load <4 x float>* %a ; <<4 x float>> [#uses=9]
7 %tmp46 = load <4 x float>* %b ; <<4 x float>> [#uses=1]
8 %tmp48 = load <4 x float>* %c ; <<4 x float>> [#uses=1]
9 %tmp50 = load <4 x float>* %d ; <<4 x float>> [#uses=1]
10 %tmp51 = bitcast <4 x float> %tmp44 to <4 x i32> ; <<4 x i32>> [#uses=1]
11 %tmp = shufflevector <4 x i32> %tmp51, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2]
12 %tmp52 = bitcast <4 x i32> %tmp to <4 x float> ; <<4 x float>> [#uses=1]
13 %tmp60 = xor <4 x i32> %tmp, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1]
14 %tmp61 = bitcast <4 x i32> %tmp60 to <4 x float> ; <<4 x float>> [#uses=1]
15 %tmp74 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp52, <4 x float> %tmp44, i8 1 ) ; <<4 x float>> [#uses=1]
16 %tmp75 = bitcast <4 x float> %tmp74 to <4 x i32> ; <<4 x i32>> [#uses=1]
17 %tmp88 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp61, i8 1 ) ; <<4 x float>> [#uses=1]
18 %tmp89 = bitcast <4 x float> %tmp88 to <4 x i32> ; <<4 x i32>> [#uses=1]
19 %tmp98 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128( <4 x i32> %tmp75, <4 x i32> %tmp89 ) ; <<4 x i32>> [#uses=1]
20 %tmp102 = bitcast <8 x i16> %tmp98 to <8 x i16> ; <<8 x i16>> [#uses=1]
21 %tmp.upgrd.1 = shufflevector <8 x i16> %tmp102, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1]
22 %tmp105 = shufflevector <8 x i16> %tmp.upgrd.1, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
23 %tmp105.upgrd.2 = bitcast <8 x i16> %tmp105 to <4 x float> ; <<4 x float>> [#uses=1]
24 store <4 x float> %tmp105.upgrd.2, <4 x float>* %a
25 %tmp108 = bitcast <4 x float> %tmp46 to <4 x i32> ; <<4 x i32>> [#uses=1]
26 %tmp109 = shufflevector <4 x i32> %tmp108, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2]
27 %tmp109.upgrd.3 = bitcast <4 x i32> %tmp109 to <4 x float> ; <<4 x float>> [#uses=1]
28 %tmp119 = xor <4 x i32> %tmp109, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1]
29 %tmp120 = bitcast <4 x i32> %tmp119 to <4 x float> ; <<4 x float>> [#uses=1]
30 %tmp133 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp109.upgrd.3, <4 x float> %tmp44, i8 1 ) ; <<4 x float>> [#uses=1]
31 %tmp134 = bitcast <4 x float> %tmp133 to <4 x i32> ; <<4 x i32>> [#uses=1]
32 %tmp147 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp120, i8 1 ) ; <<4 x float>> [#uses=1]
33 %tmp148 = bitcast <4 x float> %tmp147 to <4 x i32> ; <<4 x i32>> [#uses=1]
34 %tmp159 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128( <4 x i32> %tmp134, <4 x i32> %tmp148 ) ; <<4 x i32>> [#uses=1]
35 %tmp163 = bitcast <8 x i16> %tmp159 to <8 x i16> ; <<8 x i16>> [#uses=1]
36 %tmp164 = shufflevector <8 x i16> %tmp163, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1]
37