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Merging r277371: ------------------------------------------------------------------------ r277371 | mkuper | 2016-08-01 12:39:49 -0700 (Mon, 01 Aug 2016) | 9 lines [DAGCombine] Make sext(setcc) combine respect getBooleanContents We used to combine "sext(setcc x, y, cc) -> (select (setcc x, y, cc), -1, 0)" Instead, we should combine to (select (setcc x, y, cc), T, 0) where the value of T is 1 or -1, depending on the type of the setcc, and getBooleanContents() for the type if it is not i1. This fixes PR28504. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_39@277509 91177308-0d34-0410-b5e6-96231b3b80d8 Hans Wennborg 4 years ago
4 changed file(s) with 74 addition(s) and 9 deletion(s). Raw diff Collapse all Expand all
23482348 /// from getBooleanContents().
23492349 bool isConstFalseVal(const SDNode *N) const;
23502350
2351 /// Return a constant of type VT that contains a true value that respects
2352 /// getBooleanContents()
2353 SDValue getConstTrueVal(SelectionDAG &DAG, EVT VT, const SDLoc &DL) const;
2354
23512355 /// Return if \p N is a True value when extended to \p VT.
23522356 bool isExtendedTrueVal(const ConstantSDNode *N, EVT VT, bool Signed) const;
23532357
61976197 }
61986198 }
61996199
6200 // sext(setcc x, y, cc) -> (select (setcc x, y, cc), -1, 0)
6201 unsigned ElementWidth = VT.getScalarType().getSizeInBits();
6200 // sext(setcc x, y, cc) -> (select (setcc x, y, cc), T, 0)
6201 // Here, T can be 1 or -1, depending on the type of the setcc and
6202 // getBooleanContents().
6203 unsigned SetCCWidth = N0.getValueType().getScalarSizeInBits();
6204
62026205 SDLoc DL(N);
6203 SDValue NegOne =
6204 DAG.getConstant(APInt::getAllOnesValue(ElementWidth), DL, VT);
6206 // To determine the "true" side of the select, we need to know the high bit
6207 // of the value returned by the setcc if it evaluates to true.
6208 // If the type of the setcc is i1, then the true case of the select is just
6209 // sext(i1 1), that is, -1.
6210 // If the type of the setcc is larger (say, i8) then the value of the high
6211 // bit depends on getBooleanContents(). So, ask TLI for a real "true" value
6212 // of the appropriate width.
6213 SDValue ExtTrueVal =
6214 (SetCCWidth == 1)
6215 ? DAG.getConstant(APInt::getAllOnesValue(VT.getScalarSizeInBits()),
6216 DL, VT)
6217 : TLI.getConstTrueVal(DAG, VT, DL);
6218
62056219 if (SDValue SCC = SimplifySelectCC(
6206 DL, N0.getOperand(0), N0.getOperand(1), NegOne,
6220 DL, N0.getOperand(0), N0.getOperand(1), ExtTrueVal,
62076221 DAG.getConstant(0, DL, VT),
62086222 cast(N0.getOperand(2))->get(), true))
62096223 return SCC;
62146228 TLI.isOperationLegal(ISD::SETCC, N0.getOperand(0).getValueType())) {
62156229 SDLoc DL(N);
62166230 ISD::CondCode CC = cast(N0.getOperand(2))->get();
6217 SDValue SetCC = DAG.getSetCC(DL, SetCCVT,
6218 N0.getOperand(0), N0.getOperand(1), CC);
6219 return DAG.getSelect(DL, VT, SetCC,
6220 NegOne, DAG.getConstant(0, DL, VT));
6231 SDValue SetCC =
6232 DAG.getSetCC(DL, SetCCVT, N0.getOperand(0), N0.getOperand(1), CC);
6233 return DAG.getSelect(DL, VT, SetCC, ExtTrueVal,
6234 DAG.getConstant(0, DL, VT));
62216235 }
62226236 }
62236237 }
12331233 llvm_unreachable("Invalid boolean contents");
12341234 }
12351235
1236 SDValue TargetLowering::getConstTrueVal(SelectionDAG &DAG, EVT VT,
1237 const SDLoc &DL) const {
1238 unsigned ElementWidth = VT.getScalarSizeInBits();
1239 APInt TrueInt =
1240 getBooleanContents(VT) == TargetLowering::ZeroOrOneBooleanContent
1241 ? APInt(ElementWidth, 1)
1242 : APInt::getAllOnesValue(ElementWidth);
1243 return DAG.getConstant(TrueInt, DL, VT);
1244 }
1245
12361246 bool TargetLowering::isConstFalseVal(const SDNode *N) const {
12371247 if (!N)
12381248 return false;
0 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
1
2 ; The test case is rather involved, because we need to get to a state where
3 ; We have a sext(setcc x, y, cc) -> (select (setcc x, y, cc), T, 0) combine,
4 ; BUT this combine is only triggered post-legalization, so the setcc's return
5 ; type is i8. So we can't have the combine opportunity be exposed too early.
6 ; Basically, what we want to see is that the compare result zero-extended, and
7 ; then stored. Only one zext, and no sexts.
8
9 ; CHECK-LABEL: main:
10 ; CHECK: movzbl (%rdi), %[[EAX:.*]]
11 ; CHECK-NEXT: xorl %e[[C:.]]x, %e[[C]]x
12 ; CHECK-NEXT: cmpl $1, %[[EAX]]
13 ; CHECK-NEXT: sete %[[C]]l
14 ; CHECK-NEXT: movl %e[[C]]x, (%rsi)
15 define void @main(i8* %p, i32* %q) {
16 bb:
17 %tmp4 = load i8, i8* %p, align 1
18 %tmp5 = sext i8 %tmp4 to i32
19 %tmp6 = load i8, i8* %p, align 1
20 %tmp7 = zext i8 %tmp6 to i32
21 %tmp8 = sub nsw i32 %tmp5, %tmp7
22 %tmp11 = icmp eq i32 %tmp7, 1
23 %tmp12 = zext i1 %tmp11 to i32
24 %tmp13 = add nsw i32 %tmp8, %tmp12
25 %tmp14 = trunc i32 %tmp13 to i8
26 %tmp15 = sext i8 %tmp14 to i16
27 %tmp16 = sext i16 %tmp15 to i32
28 store i32 %tmp16, i32* %q, align 4
29 br i1 %tmp11, label %bb21, label %bb22
30
31 bb21: ; preds = %bb
32 unreachable
33
34 bb22: ; preds = %bb
35 ret void
36 }