llvm.org GIT mirror llvm / f86bf2a
Merging r296105, r296016 and 296111: ------------------------------------------------------------------------ r296105 | sdardis | 2017-02-24 10:50:27 +0000 (Fri, 24 Feb 2017) | 13 lines [mips][mc] Fix a crash when disassembling odd sized sections Make the MIPS disassembler consistent with the other targets in returning a Size of zero when the input buffer cannot contain an instruction due to it's size. Previously it reported the minimum instruction size when it failed due to the buffer not being big enough for an instruction causing llvm-objdump to crash when disassembling all sections. Reviewers: slthakur Differential Revision: https://reviews.llvm.org/D29984 ------------------------------------------------------------------------ ------------------------------------------------------------------------ r296106 | sdardis | 2017-02-24 10:51:27 +0000 (Fri, 24 Feb 2017) | 5 lines [mips][mc] Fix a crash when disassembling odd sized sections Corresponding test. ------------------------------------------------------------------------ ------------------------------------------------------------------------ r296111 | rovka | 2017-02-24 12:47:11 +0000 (Fri, 24 Feb 2017) | 1 line Fixup r296105 - only run tests on Mips ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_40@301169 91177308-0d34-0410-b5e6-96231b3b80d8 Simon Dardis 2 years ago
3 changed file(s) with 42 addition(s) and 32 deletion(s). Raw diff Collapse all Expand all
11051105 raw_ostream &CStream) const {
11061106 uint32_t Insn;
11071107 DecodeStatus Result;
1108 Size = 0;
11081109
11091110 if (IsMicroMips) {
11101111 Result = readInstruction16(Bytes, Address, Size, Insn, IsBigEndian);
11671168 }
11681169 }
11691170
1170 // This is an invalid instruction. Let the disassembler move forward by the
1171 // minimum instruction size.
1171 // This is an invalid instruction. Claim that the Size is 2 bytes. Since
1172 // microMIPS instructions have a minimum alignment of 2, the next 2 bytes
1173 // could form a valid instruction. The two bytes we rejected as an
1174 // instruction could have actually beeen an inline constant pool that is
1175 // unconditionally branched over.
11721176 Size = 2;
11731177 return MCDisassembler::Fail;
11741178 }
11751179
1180 // Attempt to read the instruction so that we can attempt to decode it. If
1181 // the buffer is not 4 bytes long, let the higher level logic figure out
1182 // what to do with a size of zero and MCDisassembler::Fail.
11761183 Result = readInstruction32(Bytes, Address, Size, Insn, IsBigEndian, false);
1177 if (Result == MCDisassembler::Fail) {
1178 Size = 4;
1179 return MCDisassembler::Fail;
1180 }
1184 if (Result == MCDisassembler::Fail)
1185 return MCDisassembler::Fail;
1186
1187 // The only instruction size for standard encoded MIPS.
1188 Size = 4;
11811189
11821190 if (hasCOP3()) {
11831191 DEBUG(dbgs() << "Trying COP3_ table (32-bit opcodes):\n");
11841192 Result =
11851193 decodeInstruction(DecoderTableCOP3_32, Instr, Insn, Address, this, STI);
1186 if (Result != MCDisassembler::Fail) {
1187 Size = 4;
1194 if (Result != MCDisassembler::Fail)
11881195 return Result;
1189 }
11901196 }
11911197
11921198 if (hasMips32r6() && isGP64()) {
11931199 DEBUG(dbgs() << "Trying Mips32r6_64r6 (GPR64) table (32-bit opcodes):\n");
11941200 Result = decodeInstruction(DecoderTableMips32r6_64r6_GP6432, Instr, Insn,
11951201 Address, this, STI);
1196 if (Result != MCDisassembler::Fail) {
1197 Size = 4;
1202 if (Result != MCDisassembler::Fail)
11981203 return Result;
1199 }
12001204 }
12011205
12021206 if (hasMips32r6() && isPTR64()) {
12031207 DEBUG(dbgs() << "Trying Mips32r6_64r6 (PTR64) table (32-bit opcodes):\n");
12041208 Result = decodeInstruction(DecoderTableMips32r6_64r6_PTR6432, Instr, Insn,
12051209 Address, this, STI);
1206 if (Result != MCDisassembler::Fail) {
1207 Size = 4;
1210 if (Result != MCDisassembler::Fail)
12081211 return Result;
1209 }
12101212 }
12111213
12121214 if (hasMips32r6()) {
12131215 DEBUG(dbgs() << "Trying Mips32r6_64r6 table (32-bit opcodes):\n");
12141216 Result = decodeInstruction(DecoderTableMips32r6_64r632, Instr, Insn,
12151217 Address, this, STI);
1216 if (Result != MCDisassembler::Fail) {
1217 Size = 4;
1218 if (Result != MCDisassembler::Fail)
12181219 return Result;
1219 }
12201220 }
12211221
12221222 if (hasMips2() && isPTR64()) {
12231223 DEBUG(dbgs() << "Trying Mips32r6_64r6 (PTR64) table (32-bit opcodes):\n");
12241224 Result = decodeInstruction(DecoderTableMips32_64_PTR6432, Instr, Insn,
12251225 Address, this, STI);
1226 if (Result != MCDisassembler::Fail) {
1227 Size = 4;
1226 if (Result != MCDisassembler::Fail)
12281227 return Result;
1229 }
12301228 }
12311229
12321230 if (hasCnMips()) {
12331231 DEBUG(dbgs() << "Trying CnMips table (32-bit opcodes):\n");
12341232 Result = decodeInstruction(DecoderTableCnMips32, Instr, Insn,
12351233 Address, this, STI);
1236 if (Result != MCDisassembler::Fail) {
1237 Size = 4;
1234 if (Result != MCDisassembler::Fail)
12381235 return Result;
1239 }
12401236 }
12411237
12421238 if (isGP64()) {
12431239 DEBUG(dbgs() << "Trying Mips64 (GPR64) table (32-bit opcodes):\n");
12441240 Result = decodeInstruction(DecoderTableMips6432, Instr, Insn,
12451241 Address, this, STI);
1246 if (Result != MCDisassembler::Fail) {
1247 Size = 4;
1242 if (Result != MCDisassembler::Fail)
12481243 return Result;
1249 }
12501244 }
12511245
12521246 DEBUG(dbgs() << "Trying Mips table (32-bit opcodes):\n");
12531247 // Calling the auto-generated decoder function.
12541248 Result =
12551249 decodeInstruction(DecoderTableMips32, Instr, Insn, Address, this, STI);
1256 if (Result != MCDisassembler::Fail) {
1257 Size = 4;
1250 if (Result != MCDisassembler::Fail)
12581251 return Result;
1259 }
1260
1261 Size = 4;
1252
12621253 return MCDisassembler::Fail;
12631254 }
12641255
0 # RUN: yaml2obj %s | llvm-objdump -D -
1
2 # Test that -D does not crash llvm-objdump encounters a section who size is a
3 # not a multiple of the size of an instruction.
4
5 --- !ELF
6 FileHeader:
7 Class: ELFCLASS64
8 Data: ELFDATA2LSB
9 Type: ET_EXEC
10 Machine: EM_MIPS
11 Sections:
12 - Name: .note.llvm.crash
13 Type: SHT_NOTE
14 Address: 0x0
15 Content: 002E746578
0 if not 'Mips' in config.root.targets:
1 config.unsupported = True
2