llvm.org GIT mirror llvm / f7da4e9
Fix for PR929. The PHI nodes were being gone through for each instruction in a successor block for every block...resulting in some O(N^k) algorithm which wasn't very good for performance. Calculating this information up front and keeping it in a map made it much faster. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30697 91177308-0d34-0410-b5e6-96231b3b80d8 Bill Wendling 14 years ago
2 changed file(s) with 38 addition(s) and 23 deletion(s). Raw diff Collapse all Expand all
3838 class LiveVariables : public MachineFunctionPass {
3939 public:
4040 /// VarInfo - This represents the regions where a virtual register is live in
41 /// the program. We represent this with three difference pieces of
41 /// the program. We represent this with three different pieces of
4242 /// information: the instruction that uniquely defines the value, the set of
4343 /// blocks the instruction is live into and live out of, and the set of
4444 /// non-phi instructions that are the last users of the value.
135135 MachineInstr **PhysRegInfo;
136136 bool *PhysRegUsed;
137137
138 typedef std::map
139 std::vector > PHIVarInfoMap;
140
141 PHIVarInfoMap PHIVarInfo;
142
138143 void HandlePhysRegUse(unsigned Reg, MachineInstr *MI);
139144 void HandlePhysRegDef(unsigned Reg, MachineInstr *MI);
140145
146 /// analyzePHINodes - Gather information about the PHI nodes in here. In
147 /// particular, we want to map the variable information of a virtual
148 /// register which is used in a PHI node. We map that to the BB the vreg
149 /// is coming from.
150 void analyzePHINodes(const MachineFunction& Fn);
141151 public:
142152
143153 virtual bool runOnMachineFunction(MachineFunction &MF);
9191 return std::binary_search(I->second.begin(), I->second.end(), Reg);
9292 }
9393
94
9594 void LiveVariables::MarkVirtRegAliveInBlock(VarInfo &VRInfo,
9695 MachineBasicBlock *MBB) {
9796 unsigned BBNum = MBB->getNumber();
210209 "Cannot have a live-in virtual register!");
211210 HandlePhysRegDef(I->first, 0);
212211 }
212
213 analyzePHINodes(MF);
213214
214215 // Calculate live variable information in depth first order on the CFG of the
215216 // function. This guarantees that we will see the definition of a virtual
287288 // bottom of this basic block. We check all of our successor blocks to see
288289 // if they have PHI nodes, and if so, we simulate an assignment at the end
289290 // of the current block.
290 for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(),
291 E = MBB->succ_end(); SI != E; ++SI) {
292 MachineBasicBlock *Succ = *SI;
293
294 // PHI nodes are guaranteed to be at the top of the block...
295 for (MachineBasicBlock::iterator MI = Succ->begin(), ME = Succ->end();
296 MI != ME && MI->getOpcode() == TargetInstrInfo::PHI; ++MI) {
297 for (unsigned i = 1; ; i += 2) {
298 assert(MI->getNumOperands() > i+1 &&
299 "Didn't find an entry for our predecessor??");
300 if (MI->getOperand(i+1).getMachineBasicBlock() == MBB) {
301 MachineOperand &MO = MI->getOperand(i);
302 VarInfo &VRInfo = getVarInfo(MO.getReg());
303 assert(VRInfo.DefInst && "Register use before def (or no def)!");
304
305 // Only mark it alive only in the block we are representing.
306 MarkVirtRegAliveInBlock(VRInfo, MBB);
307 break; // Found the PHI entry for this block.
308 }
309 }
291 if (!PHIVarInfo[MBB].empty()) {
292 std::vector& VarInfoVec = PHIVarInfo[MBB];
293
294 for (std::vector::iterator I = VarInfoVec.begin(),
295 E = VarInfoVec.end(); I != E; ++I) {
296 VarInfo& VRInfo = getVarInfo(*I);
297 assert(VRInfo.DefInst && "Register use before def (or no def)!");
298
299 // Only mark it alive only in the block we are representing.
300 MarkVirtRegAliveInBlock(VRInfo, MBB);
310301 }
311302 }
312303
361352 assert(Visited.count(&*i) != 0 && "unreachable basic block found");
362353 #endif
363354
355 PHIVarInfo.clear();
364356 return false;
365357 }
366358
449441 RegistersDead.erase(I);
450442 }
451443
452
444 /// analyzePHINodes - Gather information about the PHI nodes in here. In
445 /// particular, we want to map the variable information of a virtual
446 /// register which is used in a PHI node. We map that to the BB the vreg is
447 /// coming from.
448 ///
449 void LiveVariables::analyzePHINodes(const MachineFunction& Fn) {
450 for (MachineFunction::const_iterator I = Fn.begin(), E = Fn.end();
451 I != E; ++I)
452 for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end();
453 BBI != BBE && BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI)
454 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2)
455 PHIVarInfo[BBI->getOperand(i + 1).getMachineBasicBlock()].
456 push_back(BBI->getOperand(i).getReg());
457 }