llvm.org GIT mirror llvm / f6eeaf6
[GlobalISel] Make GlobalISel a non-optional library. With this change, the GlobalISel library gets always built. In particular, this is not possible to opt GlobalISel out of the build using the LLVM_BUILD_GLOBAL_ISEL variable any more. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309990 91177308-0d34-0410-b5e6-96231b3b80d8 Quentin Colombet 2 years ago
35 changed file(s) with 40 addition(s) and 258 deletion(s). Raw diff Collapse all Expand all
173173 if(LLVM_CCACHE_BUILD)
174174 message(FATAL_ERROR "Cannot enable dependency debugging while using ccache.")
175175 endif()
176 endif()
177
178 option(LLVM_BUILD_GLOBAL_ISEL "Experimental: Build GlobalISel" ON)
179 if(LLVM_BUILD_GLOBAL_ISEL)
180 add_definitions(-DLLVM_BUILD_GLOBAL_ISEL)
181176 endif()
182177
183178 option(LLVM_ENABLE_DAGISEL_COV "Debug: Prints tablegen patterns that were used for selecting" OFF)
None # List of all GlobalISel files.
1 set(GLOBAL_ISEL_FILES
2 CallLowering.cpp
3 IRTranslator.cpp
4 InstructionSelect.cpp
5 InstructionSelector.cpp
6 MachineIRBuilder.cpp
7 LegalizerHelper.cpp
8 Legalizer.cpp
9 LegalizerInfo.cpp
10 Localizer.cpp
11 RegBankSelect.cpp
12 RegisterBank.cpp
13 RegisterBankInfo.cpp
14 Utils.cpp
15 )
16
17 # Add GlobalISel files to the dependencies if the user wants to build it.
18 if(LLVM_BUILD_GLOBAL_ISEL)
19 set(GLOBAL_ISEL_BUILD_FILES ${GLOBAL_ISEL_FILES})
20 else()
21 set(GLOBAL_ISEL_BUILD_FILES"")
22 set(LLVM_OPTIONAL_SOURCES LLVMGlobalISel ${GLOBAL_ISEL_FILES})
23 endif()
24
25 # In LLVMBuild.txt files, it is not possible to mark a dependency to a
261 # library as optional. So instead, generate an empty library if we did
272 # not ask for it.
283 add_llvm_library(LLVMGlobalISel
29 ${GLOBAL_ISEL_BUILD_FILES}
4 CallLowering.cpp
305 GlobalISel.cpp
6 IRTranslator.cpp
7 InstructionSelect.cpp
8 InstructionSelector.cpp
9 LegalizerHelper.cpp
10 Legalizer.cpp
11 LegalizerInfo.cpp
12 Localizer.cpp
13 MachineIRBuilder.cpp
14 RegBankSelect.cpp
15 RegisterBank.cpp
16 RegisterBankInfo.cpp
17 Utils.cpp
3118
3219 DEPENDS
3320 intrinsics_gen
1515
1616 using namespace llvm;
1717
18 #ifndef LLVM_BUILD_GLOBAL_ISEL
19
20 void llvm::initializeGlobalISel(PassRegistry &Registry) {
21 }
22
23 #else
24
2518 void llvm::initializeGlobalISel(PassRegistry &Registry) {
2619 initializeIRTranslatorPass(Registry);
2720 initializeLegalizerPass(Registry);
2922 initializeRegBankSelectPass(Registry);
3023 initializeInstructionSelectPass(Registry);
3124 }
32 #endif // LLVM_BUILD_GLOBAL_ISEL
4646
4747 using namespace llvm;
4848
49 #ifndef LLVM_BUILD_GLOBAL_ISEL
50 #error "This shouldn't be built without GISel"
51 #endif
52
5349 AArch64CallLowering::AArch64CallLowering(const AArch64TargetLowering &TLI)
5450 : CallLowering(&TLI) {}
5551
99 /// This file defines all the static objects used by AArch64RegisterBankInfo.
1010 /// \todo This should be generated by TableGen.
1111 //===----------------------------------------------------------------------===//
12
13 #ifndef LLVM_BUILD_GLOBAL_ISEL
14 #error "You shouldn't build this"
15 #endif
1612
1713 namespace llvm {
1814 RegisterBankInfo::PartialMapping AArch64GenRegisterBankInfo::PartMappings[]{
3535 #include "llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h"
3636
3737 using namespace llvm;
38
39 #ifndef LLVM_BUILD_GLOBAL_ISEL
40 #error "You shouldn't build this"
41 #endif
4238
4339 namespace {
4440
2222
2323 using namespace llvm;
2424
25 #ifndef LLVM_BUILD_GLOBAL_ISEL
26 #error "You shouldn't build this"
27 #endif
28
2925 AArch64LegalizerInfo::AArch64LegalizerInfo() {
3026 using namespace TargetOpcode;
3127 const LLT p0 = LLT::pointer(0, 64);
3535 #include "AArch64GenRegisterBankInfo.def"
3636
3737 using namespace llvm;
38
39 #ifndef LLVM_BUILD_GLOBAL_ISEL
40 #error "You shouldn't build this"
41 #endif
4238
4339 AArch64RegisterBankInfo::AArch64RegisterBankInfo(const TargetRegisterInfo &TRI)
4440 : AArch64GenRegisterBankInfo() {
1717 #include "AArch64PBQPRegAlloc.h"
1818 #include "AArch64TargetMachine.h"
1919
20 #ifdef LLVM_BUILD_GLOBAL_ISEL
2120 #include "AArch64CallLowering.h"
2221 #include "AArch64LegalizerInfo.h"
2322 #include "AArch64RegisterBankInfo.h"
2625 #include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
2726 #include "llvm/CodeGen/GlobalISel/Legalizer.h"
2827 #include "llvm/CodeGen/GlobalISel/RegBankSelect.h"
29 #endif
3028 #include "llvm/CodeGen/MachineScheduler.h"
3129 #include "llvm/IR/GlobalValue.h"
3230 #include "llvm/Support/TargetRegistry.h"
142140 }
143141 }
144142
145 #ifdef LLVM_BUILD_GLOBAL_ISEL
146143 namespace {
147144
148145 struct AArch64GISelActualAccessor : public GISelAccessor {
169166 };
170167
171168 } // end anonymous namespace
172 #endif
173169
174170 AArch64Subtarget::AArch64Subtarget(const Triple &TT, const std::string &CPU,
175171 const std::string &FS,
179175 IsLittle(LittleEndian), TargetTriple(TT), FrameLowering(),
180176 InstrInfo(initializeSubtargetDependencies(FS, CPU)), TSInfo(),
181177 TLInfo(TM, *this), GISel() {
182 #ifndef LLVM_BUILD_GLOBAL_ISEL
183 GISelAccessor *AArch64GISel = new GISelAccessor();
184 #else
185178 AArch64GISelActualAccessor *AArch64GISel = new AArch64GISelActualAccessor();
186179 AArch64GISel->CallLoweringInfo.reset(
187180 new AArch64CallLowering(*getTargetLowering()));
196189 *static_cast(&TM), *this, *RBI));
197190
198191 AArch64GISel->RegBankInfo.reset(RBI);
199 #endif
200192 setGISelAccessor(*AArch64GISel);
201193 }
202194
329329 void addIRPasses() override;
330330 bool addPreISel() override;
331331 bool addInstSelector() override;
332 #ifdef LLVM_BUILD_GLOBAL_ISEL
333332 bool addIRTranslator() override;
334333 bool addLegalizeMachineIR() override;
335334 bool addRegBankSelect() override;
336335 void addPreGlobalInstructionSelect() override;
337336 bool addGlobalInstructionSelect() override;
338 #endif
339337 bool addILPOpts() override;
340338 void addPreRegAlloc() override;
341339 void addPostRegAlloc() override;
431429 return false;
432430 }
433431
434 #ifdef LLVM_BUILD_GLOBAL_ISEL
435432 bool AArch64PassConfig::addIRTranslator() {
436433 addPass(new IRTranslator());
437434 return false;
457454 addPass(new InstructionSelect());
458455 return false;
459456 }
460 #endif
461457
462458 bool AArch64PassConfig::isGlobalISelEnabled() const {
463459 return TM->getOptLevel() <= EnableGlobalISelAtO;
1212 tablegen(LLVM AArch64GenSubtargetInfo.inc -gen-subtarget)
1313 tablegen(LLVM AArch64GenDisassemblerTables.inc -gen-disassembler)
1414 tablegen(LLVM AArch64GenSystemOperands.inc -gen-searchable-tables)
15 if(LLVM_BUILD_GLOBAL_ISEL)
16 tablegen(LLVM AArch64GenRegisterBank.inc -gen-register-bank)
17 tablegen(LLVM AArch64GenGlobalISel.inc -gen-global-isel)
18 endif()
15 tablegen(LLVM AArch64GenRegisterBank.inc -gen-register-bank)
16 tablegen(LLVM AArch64GenGlobalISel.inc -gen-global-isel)
1917
2018 add_public_tablegen_target(AArch64CommonTableGen)
21
22 # List of all GlobalISel files.
23 set(GLOBAL_ISEL_FILES
24 AArch64CallLowering.cpp
25 AArch64InstructionSelector.cpp
26 AArch64LegalizerInfo.cpp
27 AArch64RegisterBankInfo.cpp
28 )
29
30 # Add GlobalISel files to the dependencies if the user wants to build it.
31 if(LLVM_BUILD_GLOBAL_ISEL)
32 set(GLOBAL_ISEL_BUILD_FILES ${GLOBAL_ISEL_FILES})
33 else()
34 set(GLOBAL_ISEL_BUILD_FILES"")
35 set(LLVM_OPTIONAL_SOURCES LLVMGlobalISel ${GLOBAL_ISEL_FILES})
36 endif()
37
3819
3920 add_llvm_target(AArch64CodeGen
4021 AArch64A57FPLoadBalancing.cpp
4122 AArch64AdvSIMDScalarPass.cpp
4223 AArch64AsmPrinter.cpp
24 AArch64CallLowering.cpp
4325 AArch64CleanupLocalDynamicTLSPass.cpp
4426 AArch64CollectLOH.cpp
4527 AArch64CondBrTuning.cpp
5537 AArch64ISelDAGToDAG.cpp
5638 AArch64ISelLowering.cpp
5739 AArch64InstrInfo.cpp
40 AArch64InstructionSelector.cpp
41 AArch64LegalizerInfo.cpp
5842 AArch64LoadStoreOptimizer.cpp
5943 AArch64MacroFusion.cpp
6044 AArch64MCInstLower.cpp
6145 AArch64PromoteConstant.cpp
6246 AArch64PBQPRegAlloc.cpp
47 AArch64RegisterBankInfo.cpp
6348 AArch64RegisterInfo.cpp
6449 AArch64SelectionDAGInfo.cpp
6550 AArch64StorePairSuppress.cpp
6853 AArch64TargetObjectFile.cpp
6954 AArch64TargetTransformInfo.cpp
7055 AArch64VectorByElementOpt.cpp
71 ${GLOBAL_ISEL_BUILD_FILES}
7256
7357 DEPENDS
7458 intrinsics_gen
2424 #include "llvm/CodeGen/MachineInstrBuilder.h"
2525
2626 using namespace llvm;
27
28 #ifndef LLVM_BUILD_GLOBAL_ISEL
29 #error "This shouldn't be built without GISel"
30 #endif
3127
3228 AMDGPUCallLowering::AMDGPUCallLowering(const AMDGPUTargetLowering &TLI)
3329 : CallLowering(&TLI), AMDGPUASI(TLI.getAMDGPUAS()) {
99 /// This file defines all the static objects used by AMDGPURegisterBankInfo.
1010 /// \todo This should be generated by TableGen.
1111 //===----------------------------------------------------------------------===//
12
13 #ifndef LLVM_BUILD_GLOBAL_ISEL
14 #error "You shouldn't build this"
15 #endif
1612
1713 namespace llvm {
1814 namespace AMDGPU {
1919 #include "llvm/Target/TargetOpcodes.h"
2020
2121 using namespace llvm;
22
23 #ifndef LLVM_BUILD_GLOBAL_ISEL
24 #error "You shouldn't build this"
25 #endif
2622
2723 AMDGPULegalizerInfo::AMDGPULegalizerInfo() {
2824 using namespace TargetOpcode;
2828
2929 using namespace llvm;
3030
31 #ifndef LLVM_BUILD_GLOBAL_ISEL
32 #error "You shouldn't build this"
33 #endif
34
3531 AMDGPURegisterBankInfo::AMDGPURegisterBankInfo(const TargetRegisterInfo &TRI)
3632 : AMDGPUGenRegisterBankInfo(),
3733 TRI(static_cast(&TRI)) {
1414 #include "AMDGPUSubtarget.h"
1515 #include "AMDGPU.h"
1616 #include "AMDGPUTargetMachine.h"
17 #ifdef LLVM_BUILD_GLOBAL_ISEL
1817 #include "AMDGPUCallLowering.h"
1918 #include "AMDGPUInstructionSelector.h"
2019 #include "AMDGPULegalizerInfo.h"
2120 #include "AMDGPURegisterBankInfo.h"
22 #endif
2321 #include "SIMachineFunctionInfo.h"
2422 #include "llvm/ADT/SmallString.h"
2523 #include "llvm/CodeGen/MachineScheduler.h"
7977 return *this;
8078 }
8179
82 #ifdef LLVM_BUILD_GLOBAL_ISEL
8380 namespace {
8481
8582 struct SIGISelActualAccessor : public GISelAccessor {
10299 };
103100
104101 } // end anonymous namespace
105 #endif
106102
107103 AMDGPUSubtarget::AMDGPUSubtarget(const Triple &TT, StringRef GPU, StringRef FS,
108104 const TargetMachine &TM)
357353 : AMDGPUSubtarget(TT, GPU, FS, TM), InstrInfo(*this),
358354 FrameLowering(TargetFrameLowering::StackGrowsUp, getStackAlignment(), 0),
359355 TLInfo(TM, *this) {
360 #ifndef LLVM_BUILD_GLOBAL_ISEL
361 GISelAccessor *GISel = new GISelAccessor();
362 #else
363356 SIGISelActualAccessor *GISel = new SIGISelActualAccessor();
364357 GISel->CallLoweringInfo.reset(new AMDGPUCallLowering(*getTargetLowering()));
365358 GISel->Legalizer.reset(new AMDGPULegalizerInfo());
367360 GISel->RegBankInfo.reset(new AMDGPURegisterBankInfo(*getRegisterInfo()));
368361 GISel->InstSelector.reset(new AMDGPUInstructionSelector(
369362 *this, *static_cast(GISel->RegBankInfo.get())));
370 #endif
371363 setGISelAccessor(*GISel);
372364 }
373365
515515 void addMachineSSAOptimization() override;
516516 bool addILPOpts() override;
517517 bool addInstSelector() override;
518 #ifdef LLVM_BUILD_GLOBAL_ISEL
519518 bool addIRTranslator() override;
520519 bool addLegalizeMachineIR() override;
521520 bool addRegBankSelect() override;
522521 bool addGlobalInstructionSelect() override;
523 #endif
524522 void addFastRegAlloc(FunctionPass *RegAllocPass) override;
525523 void addOptimizedRegAlloc(FunctionPass *RegAllocPass) override;
526524 void addPreRegAlloc() override;
755753 return false;
756754 }
757755
758 #ifdef LLVM_BUILD_GLOBAL_ISEL
759756 bool GCNPassConfig::addIRTranslator() {
760757 addPass(new IRTranslator());
761758 return false;
775772 addPass(new InstructionSelect());
776773 return false;
777774 }
778
779 #endif
780775
781776 void GCNPassConfig::addPreRegAlloc() {
782777 if (LateCFGStructurize) {
1111 tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher)
1212 tablegen(LLVM AMDGPUGenDisassemblerTables.inc -gen-disassembler)
1313 tablegen(LLVM AMDGPUGenMCPseudoLowering.inc -gen-pseudo-lowering)
14 if(LLVM_BUILD_GLOBAL_ISEL)
15 tablegen(LLVM AMDGPUGenRegisterBank.inc -gen-register-bank)
16 endif()
14 tablegen(LLVM AMDGPUGenRegisterBank.inc -gen-register-bank)
1715 add_public_tablegen_target(AMDGPUCommonTableGen)
18
19 # List of all GlobalISel files.
20 set(GLOBAL_ISEL_FILES
21 AMDGPUCallLowering.cpp
22 AMDGPUInstructionSelector.cpp
23 AMDGPULegalizerInfo.cpp
24 AMDGPURegisterBankInfo.cpp
25 )
26
27 # Add GlobalISel files to the dependencies if the user wants to build it.
28 if(LLVM_BUILD_GLOBAL_ISEL)
29 set(GLOBAL_ISEL_BUILD_FILES ${GLOBAL_ISEL_FILES})
30 else()
31 set(GLOBAL_ISEL_BUILD_FILES"")
32 set(LLVM_OPTIONAL_SOURCES LLVMGlobalISel ${GLOBAL_ISEL_FILES})
33 endif()
34
3516
3617 add_llvm_target(AMDGPUCodeGen
3718 AMDILCFGStructurizer.cpp
4021 AMDGPUAnnotateKernelFeatures.cpp
4122 AMDGPUAnnotateUniformValues.cpp
4223 AMDGPUAsmPrinter.cpp
24 AMDGPUCallLowering.cpp
4325 AMDGPUCodeGenPrepare.cpp
4426 AMDGPUFrameLowering.cpp
27 AMDGPULegalizerInfo.cpp
4528 AMDGPUTargetObjectFile.cpp
29 AMDGPUInstructionSelector.cpp
4630 AMDGPUIntrinsicInfo.cpp
4731 AMDGPUISelDAGToDAG.cpp
4832 AMDGPULowerIntrinsics.cpp
6044 AMDGPUInstrInfo.cpp
6145 AMDGPUPromoteAlloca.cpp
6246 AMDGPURegAsmNames.inc.cpp
47 AMDGPURegisterBankInfo.cpp
6348 AMDGPURegisterInfo.cpp
6449 AMDGPURewriteOutArguments.cpp
6550 AMDGPUUnifyDivergentExitNodes.cpp
10489 GCNIterativeScheduler.cpp
10590 GCNMinRegStrategy.cpp
10691 GCNRegPressure.cpp
107 ${GLOBAL_ISEL_BUILD_FILES}
10892 )
10993
11094 add_subdirectory(AsmParser)
2525
2626 using namespace llvm;
2727
28 #ifndef LLVM_BUILD_GLOBAL_ISEL
29 #error "This shouldn't be built without GISel"
30 #endif
31
3228 ARMCallLowering::ARMCallLowering(const ARMTargetLowering &TLI)
3329 : CallLowering(&TLI) {}
3430
2323 #include "llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h"
2424
2525 using namespace llvm;
26
27 #ifndef LLVM_BUILD_GLOBAL_ISEL
28 #error "You shouldn't build this"
29 #endif
3026
3127 namespace {
3228
2222 #include "llvm/Target/TargetOpcodes.h"
2323
2424 using namespace llvm;
25
26 #ifndef LLVM_BUILD_GLOBAL_ISEL
27 #error "You shouldn't build this"
28 #endif
2925
3026 static bool AEABI(const ARMSubtarget &ST) {
3127 return ST.isTargetAEABI() || ST.isTargetGNUAEABI() || ST.isTargetMuslAEABI();
2222 #include "ARMGenRegisterBank.inc"
2323
2424 using namespace llvm;
25
26 #ifndef LLVM_BUILD_GLOBAL_ISEL
27 #error "You shouldn't build this"
28 #endif
2925
3026 // FIXME: TableGen this.
3127 // If it grows too much and TableGen still isn't ready to do the job, extract it
1212
1313 #include "ARM.h"
1414
15 #ifdef LLVM_BUILD_GLOBAL_ISEL
1615 #include "ARMCallLowering.h"
1716 #include "ARMLegalizerInfo.h"
1817 #include "ARMRegisterBankInfo.h"
19 #endif
2018 #include "ARMSubtarget.h"
2119 #include "ARMFrameLowering.h"
2220 #include "ARMInstrInfo.h"
2927 #include "llvm/ADT/StringRef.h"
3028 #include "llvm/ADT/Triple.h"
3129 #include "llvm/ADT/Twine.h"
32 #ifdef LLVM_BUILD_GLOBAL_ISEL
3330 #include "llvm/CodeGen/GlobalISel/GISelAccessor.h"
3431 #include "llvm/CodeGen/GlobalISel/IRTranslator.h"
3532 #include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
3633 #include "llvm/CodeGen/GlobalISel/Legalizer.h"
3734 #include "llvm/CodeGen/GlobalISel/RegBankSelect.h"
38 #endif
3935 #include "llvm/CodeGen/MachineFunction.h"
4036 #include "llvm/IR/Function.h"
4137 #include "llvm/IR/GlobalValue.h"
10096 return new ARMFrameLowering(STI);
10197 }
10298
103 #ifdef LLVM_BUILD_GLOBAL_ISEL
10499 namespace {
105100
106101 struct ARMGISelActualAccessor : public GISelAccessor {
127122 };
128123
129124 } // end anonymous namespace
130 #endif
131125
132126 ARMSubtarget::ARMSubtarget(const Triple &TT, const std::string &CPU,
133127 const std::string &FS,
146140 assert((isThumb() || hasARMOps()) &&
147141 "Target must either be thumb or support ARM operations!");
148142
149 #ifndef LLVM_BUILD_GLOBAL_ISEL
150 GISelAccessor *GISel = new GISelAccessor();
151 #else
152143 ARMGISelActualAccessor *GISel = new ARMGISelActualAccessor();
153144 GISel->CallLoweringInfo.reset(new ARMCallLowering(*getTargetLowering()));
154145 GISel->Legalizer.reset(new ARMLegalizerInfo(*this));
162153 *static_cast(&TM), *this, *RBI));
163154
164155 GISel->RegBankInfo.reset(RBI);
165 #endif
166156 setGISelAccessor(*GISel);
167157 }
168158
332332 void addIRPasses() override;
333333 bool addPreISel() override;
334334 bool addInstSelector() override;
335 #ifdef LLVM_BUILD_GLOBAL_ISEL
336335 bool addIRTranslator() override;
337336 bool addLegalizeMachineIR() override;
338337 bool addRegBankSelect() override;
339338 bool addGlobalInstructionSelect() override;
340 #endif
341339 void addPreRegAlloc() override;
342340 void addPreSched2() override;
343341 void addPreEmitPass() override;
412410 return false;
413411 }
414412
415 #ifdef LLVM_BUILD_GLOBAL_ISEL
416413 bool ARMPassConfig::addIRTranslator() {
417414 addPass(new IRTranslator());
418415 return false;
432429 addPass(new InstructionSelect());
433430 return false;
434431 }
435 #endif
436432
437433 void ARMPassConfig::addPreRegAlloc() {
438434 if (getOptLevel() != CodeGenOpt::None) {
0 set(LLVM_TARGET_DEFINITIONS ARM.td)
11
2 if(LLVM_BUILD_GLOBAL_ISEL)
3 tablegen(LLVM ARMGenRegisterBank.inc -gen-register-bank)
4 tablegen(LLVM ARMGenGlobalISel.inc -gen-global-isel)
5 endif()
2 tablegen(LLVM ARMGenRegisterBank.inc -gen-register-bank)
3 tablegen(LLVM ARMGenGlobalISel.inc -gen-global-isel)
64 tablegen(LLVM ARMGenRegisterInfo.inc -gen-register-info)
75 tablegen(LLVM ARMGenInstrInfo.inc -gen-instr-info)
86 tablegen(LLVM ARMGenMCCodeEmitter.inc -gen-emitter)
1715 tablegen(LLVM ARMGenSystemRegister.inc -gen-searchable-tables)
1816 add_public_tablegen_target(ARMCommonTableGen)
1917
20 # Add GlobalISel files if the user wants to build it.
21 set(GLOBAL_ISEL_FILES
22 ARMCallLowering.cpp
23 ARMInstructionSelector.cpp
24 ARMLegalizerInfo.cpp
25 ARMRegisterBankInfo.cpp
26 )
27
28 if(LLVM_BUILD_GLOBAL_ISEL)
29 set(GLOBAL_ISEL_BUILD_FILES ${GLOBAL_ISEL_FILES})
30 else()
31 set(GLOBAL_ISEL_BUILD_FILES "")
32 set(LLVM_OPTIONAL_SOURCES LLVMGlobalISel ${GLOBAL_ISEL_FILES})
33 endif()
34
3518 add_llvm_target(ARMCodeGen
3619 A15SDOptimizer.cpp
3720 ARMAsmPrinter.cpp
3821 ARMBaseInstrInfo.cpp
3922 ARMBaseRegisterInfo.cpp
23 ARMCallLowering.cpp
4024 ARMConstantIslandPass.cpp
4125 ARMConstantPoolValue.cpp
4226 ARMExpandPseudoInsts.cpp
4327 ARMFastISel.cpp
4428 ARMFrameLowering.cpp
4529 ARMHazardRecognizer.cpp
30 ARMInstructionSelector.cpp
4631 ARMISelDAGToDAG.cpp
4732 ARMISelLowering.cpp
4833 ARMInstrInfo.cpp
34 ARMLegalizerInfo.cpp
4935 ARMLoadStoreOptimizer.cpp
5036 ARMMCInstLower.cpp
5137 ARMMachineFunctionInfo.cpp
5238 ARMMacroFusion.cpp
5339 ARMRegisterInfo.cpp
5440 ARMOptimizeBarriersPass.cpp
41 ARMRegisterBankInfo.cpp
5542 ARMSelectionDAGInfo.cpp
5643 ARMSubtarget.cpp
5744 ARMTargetMachine.cpp
6552 Thumb2InstrInfo.cpp
6653 Thumb2SizeReduction.cpp
6754 ARMComputeBlockSize.cpp
68 ${GLOBAL_ISEL_BUILD_FILES}
6955 )
7056
7157 add_subdirectory(TargetInfo)
1010 tablegen(LLVM X86GenCallingConv.inc -gen-callingconv)
1111 tablegen(LLVM X86GenSubtargetInfo.inc -gen-subtarget)
1212 tablegen(LLVM X86GenEVEX2VEXTables.inc -gen-x86-EVEX2VEX-tables)
13 if(LLVM_BUILD_GLOBAL_ISEL)
14 tablegen(LLVM X86GenRegisterBank.inc -gen-register-bank)
15 tablegen(LLVM X86GenGlobalISel.inc -gen-global-isel)
16 endif()
13 tablegen(LLVM X86GenRegisterBank.inc -gen-register-bank)
14 tablegen(LLVM X86GenGlobalISel.inc -gen-global-isel)
1715
1816 add_public_tablegen_target(X86CommonTableGen)
19
20 # Add GlobalISel files if the build option was enabled.
21 set(GLOBAL_ISEL_FILES
22 X86CallLowering.cpp
23 X86LegalizerInfo.cpp
24 X86RegisterBankInfo.cpp
25 X86InstructionSelector.cpp
26 )
27
28 if(LLVM_BUILD_GLOBAL_ISEL)
29 set(GLOBAL_ISEL_BUILD_FILES ${GLOBAL_ISEL_FILES})
30 else()
31 set(GLOBAL_ISEL_BUILD_FILES "")
32 set(LLVM_OPTIONAL_SOURCES LLVMGlobalISel ${GLOBAL_ISEL_FILES})
33 endif()
34
3517
3618 set(sources
3719 X86AsmPrinter.cpp
3820 X86CallFrameOptimization.cpp
21 X86CallLowering.cpp
3922 X86CmovConversion.cpp
4023 X86ExpandPseudo.cpp
4124 X86FastISel.cpp
4427 X86FixupSetCC.cpp
4528 X86FloatingPoint.cpp
4629 X86FrameLowering.cpp
30 X86InstructionSelector.cpp
4731 X86ISelDAGToDAG.cpp
4832 X86ISelLowering.cpp
4933 X86InterleavedAccess.cpp
5034 X86InstrFMA3Info.cpp
5135 X86InstrInfo.cpp
5236 X86EvexToVex.cpp
37 X86LegalizerInfo.cpp
5338 X86MCInstLower.cpp
5439 X86MachineFunctionInfo.cpp
5540 X86MacroFusion.cpp
5641 X86OptimizeLEAs.cpp
5742 X86PadShortFunction.cpp
43 X86RegisterBankInfo.cpp
5844 X86RegisterInfo.cpp
5945 X86SelectionDAGInfo.cpp
6046 X86ShuffleDecodeConstantPool.cpp
6652 X86WinAllocaExpander.cpp
6753 X86WinEHState.cpp
6854 X86CallingConv.cpp
69 ${GLOBAL_ISEL_BUILD_FILES}
7055 )
7156
7257 add_llvm_target(X86CodeGen ${sources})
2828
2929 #include "X86GenCallingConv.inc"
3030
31 #ifndef LLVM_BUILD_GLOBAL_ISEL
32 #error "This shouldn't be built without GISel"
33 #endif
34
3531 X86CallLowering::X86CallLowering(const X86TargetLowering &TLI)
3632 : CallLowering(&TLI) {}
3733
99 /// This file defines all the static objects used by X86RegisterBankInfo.
1010 /// \todo This should be generated by TableGen.
1111 //===----------------------------------------------------------------------===//
12
13 #ifndef LLVM_BUILD_GLOBAL_ISEL
14 #error "You shouldn't build this"
15 #endif
1612
1713 #ifdef GET_TARGET_REGBANK_INFO_IMPL
1814 RegisterBankInfo::PartialMapping X86GenRegisterBankInfo::PartMappings[]{
3434 #include "llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h"
3535
3636 using namespace llvm;
37
38 #ifndef LLVM_BUILD_GLOBAL_ISEL
39 #error "You shouldn't build this"
40 #endif
4137
4238 namespace {
4339
2121 using namespace llvm;
2222 using namespace TargetOpcode;
2323
24 #ifndef LLVM_BUILD_GLOBAL_ISEL
25 #error "You shouldn't build this"
26 #endif
27
2824 X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
2925 const X86TargetMachine &TM)
3026 : Subtarget(STI), TM(TM) {
2424 // This file will be TableGen'ed at some point.
2525 #define GET_TARGET_REGBANK_INFO_IMPL
2626 #include "X86GenRegisterBankInfo.def"
27
28 #ifndef LLVM_BUILD_GLOBAL_ISEL
29 #error "You shouldn't build this"
30 #endif
3127
3228 X86RegisterBankInfo::X86RegisterBankInfo(const TargetRegisterInfo &TRI)
3329 : X86GenRegisterBankInfo() {
1212
1313 #include "X86.h"
1414
15 #ifdef LLVM_BUILD_GLOBAL_ISEL
1615 #include "X86CallLowering.h"
1716 #include "X86LegalizerInfo.h"
1817 #include "X86RegisterBankInfo.h"
19 #endif
2018 #include "X86Subtarget.h"
2119 #include "MCTargetDesc/X86BaseInfo.h"
2220 #include "X86TargetMachine.h"
2321 #include "llvm/ADT/Triple.h"
24 #ifdef LLVM_BUILD_GLOBAL_ISEL
2522 #include "llvm/CodeGen/GlobalISel/CallLowering.h"
2623 #include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
2724 #include "llvm/CodeGen/GlobalISel/Legalizer.h"
2825 #include "llvm/CodeGen/GlobalISel/RegBankSelect.h"
29 #endif
3026 #include "llvm/IR/Attributes.h"
3127 #include "llvm/IR/ConstantRange.h"
3228 #include "llvm/IR/Function.h"
351347 return *this;
352348 }
353349
354 #ifdef LLVM_BUILD_GLOBAL_ISEL
355350 namespace {
356351
357352 struct X86GISelActualAccessor : public GISelAccessor {
378373 };
379374
380375 } // end anonymous namespace
381 #endif
382376
383377 X86Subtarget::X86Subtarget(const Triple &TT, StringRef CPU, StringRef FS,
384378 const X86TargetMachine &TM,
404398 setPICStyle(PICStyles::StubPIC);
405399 else if (isTargetELF())
406400 setPICStyle(PICStyles::GOT);
407 #ifndef LLVM_BUILD_GLOBAL_ISEL
408 GISelAccessor *GISel = new GISelAccessor();
409 #else
410401 X86GISelActualAccessor *GISel = new X86GISelActualAccessor();
411402
412403 GISel->CallLoweringInfo.reset(new X86CallLowering(*getTargetLowering()));
415406 auto *RBI = new X86RegisterBankInfo(*getRegisterInfo());
416407 GISel->RegBankInfo.reset(RBI);
417408 GISel->InstSelector.reset(createX86InstructionSelector(TM, *this, *RBI));
418 #endif
419409 setGISelAccessor(*GISel);
420410 }
421411
305305
306306 void addIRPasses() override;
307307 bool addInstSelector() override;
308 #ifdef LLVM_BUILD_GLOBAL_ISEL
309308 bool addIRTranslator() override;
310309 bool addLegalizeMachineIR() override;
311310 bool addRegBankSelect() override;
312311 bool addGlobalInstructionSelect() override;
313 #endif
314312 bool addILPOpts() override;
315313 bool addPreISel() override;
316314 void addPreRegAlloc() override;
360358 return false;
361359 }
362360
363 #ifdef LLVM_BUILD_GLOBAL_ISEL
364361 bool X86PassConfig::addIRTranslator() {
365362 addPass(new IRTranslator());
366363 return false;
380377 addPass(new InstructionSelect());
381378 return false;
382379 }
383 #endif
384380
385381 bool X86PassConfig::addILPOpts() {
386382 addPass(&EarlyIfConverterID);
3636 set(LLVM_BUILD_SYSTEM cmake)
3737 set(LLVM_HAS_RTTI ${LLVM_CONFIG_HAS_RTTI})
3838 set(LLVM_DYLIB_VERSION "${LLVM_VERSION_MAJOR}.${LLVM_VERSION_MINOR}${LLVM_VERSION_SUFFIX}")
39 if(LLVM_BUILD_GLOBAL_ISEL)
40 set(LLVM_HAS_GLOBAL_ISEL "ON")
41 else()
42 set(LLVM_HAS_GLOBAL_ISEL "OFF")
43 endif()
39 set(LLVM_HAS_GLOBAL_ISEL "ON")
4440
4541 # Use the C++ link flags, since they should be a superset of C link flags.
4642 set(LLVM_LDFLAGS "${CMAKE_CXX_LINK_FLAGS}")
22 CodeGen
33 )
44
5 if(LLVM_BUILD_GLOBAL_ISEL)
6 add_llvm_unittest(GlobalISelTests
7 LegalizerInfoTest.cpp
8 )
9 endif()
5 add_llvm_unittest(GlobalISelTests
6 LegalizerInfoTest.cpp
7 )