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[X86] Cleanup saturated add/sub tests Use X86/X64 check prefixes Use nounwind to reduce cfi noise git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350301 91177308-0d34-0410-b5e6-96231b3b80d8 Simon Pilgrim 8 months ago
4 changed file(s) with 681 addition(s) and 753 deletion(s). Raw diff Collapse all Expand all
0 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
1 ; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s
2 ; RUN: llc < %s -mcpu=generic -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=CHECK32
1 ; RUN: llc < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefixes=CHECK,X86
2 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefixes=CHECK,X64
33
44 declare i4 @llvm.sadd.sat.i4 (i4, i4)
55 declare i32 @llvm.sadd.sat.i32 (i32, i32)
66 declare i64 @llvm.sadd.sat.i64 (i64, i64)
77 declare <4 x i32> @llvm.sadd.sat.v4i32(<4 x i32>, <4 x i32>)
88
9 define i32 @func(i32 %x, i32 %y) {
10 ; CHECK-LABEL: func:
11 ; CHECK: # %bb.0:
12 ; CHECK-NEXT: xorl %eax, %eax
13 ; CHECK-NEXT: movl %edi, %ecx
14 ; CHECK-NEXT: addl %esi, %ecx
15 ; CHECK-NEXT: setns %al
16 ; CHECK-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
17 ; CHECK-NEXT: addl %esi, %edi
18 ; CHECK-NEXT: cmovnol %edi, %eax
19 ; CHECK-NEXT: retq
20 ;
21 ; CHECK32-LABEL: func:
22 ; CHECK32: # %bb.0:
23 ; CHECK32-NEXT: pushl %esi
24 ; CHECK32-NEXT: .cfi_def_cfa_offset 8
25 ; CHECK32-NEXT: .cfi_offset %esi, -8
26 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
27 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
28 ; CHECK32-NEXT: xorl %ecx, %ecx
29 ; CHECK32-NEXT: movl %eax, %esi
30 ; CHECK32-NEXT: addl %edx, %esi
31 ; CHECK32-NEXT: setns %cl
32 ; CHECK32-NEXT: addl $2147483647, %ecx # imm = 0x7FFFFFFF
33 ; CHECK32-NEXT: addl %edx, %eax
34 ; CHECK32-NEXT: cmovol %ecx, %eax
35 ; CHECK32-NEXT: popl %esi
36 ; CHECK32-NEXT: .cfi_def_cfa_offset 4
37 ; CHECK32-NEXT: retl
9 define i32 @func(i32 %x, i32 %y) nounwind {
10 ; X86-LABEL: func:
11 ; X86: # %bb.0:
12 ; X86-NEXT: pushl %esi
13 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
14 ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
15 ; X86-NEXT: xorl %ecx, %ecx
16 ; X86-NEXT: movl %eax, %esi
17 ; X86-NEXT: addl %edx, %esi
18 ; X86-NEXT: setns %cl
19 ; X86-NEXT: addl $2147483647, %ecx # imm = 0x7FFFFFFF
20 ; X86-NEXT: addl %edx, %eax
21 ; X86-NEXT: cmovol %ecx, %eax
22 ; X86-NEXT: popl %esi
23 ; X86-NEXT: retl
24 ;
25 ; X64-LABEL: func:
26 ; X64: # %bb.0:
27 ; X64-NEXT: xorl %eax, %eax
28 ; X64-NEXT: movl %edi, %ecx
29 ; X64-NEXT: addl %esi, %ecx
30 ; X64-NEXT: setns %al
31 ; X64-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
32 ; X64-NEXT: addl %esi, %edi
33 ; X64-NEXT: cmovnol %edi, %eax
34 ; X64-NEXT: retq
3835 %tmp = call i32 @llvm.sadd.sat.i32(i32 %x, i32 %y);
3936 ret i32 %tmp;
4037 }
4138
42 define i64 @func2(i64 %x, i64 %y) {
43 ; CHECK-LABEL: func2:
44 ; CHECK: # %bb.0:
45 ; CHECK-NEXT: xorl %ecx, %ecx
46 ; CHECK-NEXT: movq %rdi, %rax
47 ; CHECK-NEXT: addq %rsi, %rax
48 ; CHECK-NEXT: setns %cl
49 ; CHECK-NEXT: movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF
50 ; CHECK-NEXT: addq %rcx, %rax
51 ; CHECK-NEXT: addq %rsi, %rdi
52 ; CHECK-NEXT: cmovnoq %rdi, %rax
53 ; CHECK-NEXT: retq
54 ;
55 ; CHECK32-LABEL: func2:
56 ; CHECK32: # %bb.0:
57 ; CHECK32-NEXT: pushl %ebp
58 ; CHECK32-NEXT: .cfi_def_cfa_offset 8
59 ; CHECK32-NEXT: pushl %ebx
60 ; CHECK32-NEXT: .cfi_def_cfa_offset 12
61 ; CHECK32-NEXT: pushl %edi
62 ; CHECK32-NEXT: .cfi_def_cfa_offset 16
63 ; CHECK32-NEXT: pushl %esi
64 ; CHECK32-NEXT: .cfi_def_cfa_offset 20
65 ; CHECK32-NEXT: .cfi_offset %esi, -20
66 ; CHECK32-NEXT: .cfi_offset %edi, -16
67 ; CHECK32-NEXT: .cfi_offset %ebx, -12
68 ; CHECK32-NEXT: .cfi_offset %ebp, -8
69 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
70 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edi
71 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ebx
72 ; CHECK32-NEXT: addl {{[0-9]+}}(%esp), %edi
73 ; CHECK32-NEXT: movl %ebx, %ebp
74 ; CHECK32-NEXT: adcl %esi, %ebp
75 ; CHECK32-NEXT: movl %ebp, %eax
76 ; CHECK32-NEXT: sarl $31, %eax
77 ; CHECK32-NEXT: xorl %ecx, %ecx
78 ; CHECK32-NEXT: testl %ebp, %ebp
79 ; CHECK32-NEXT: setns %cl
80 ; CHECK32-NEXT: movl %ecx, %edx
81 ; CHECK32-NEXT: addl $2147483647, %edx # imm = 0x7FFFFFFF
82 ; CHECK32-NEXT: testl %ebx, %ebx
83 ; CHECK32-NEXT: setns %bl
84 ; CHECK32-NEXT: cmpb %cl, %bl
85 ; CHECK32-NEXT: setne %cl
86 ; CHECK32-NEXT: testl %esi, %esi
87 ; CHECK32-NEXT: setns %ch
88 ; CHECK32-NEXT: cmpb %ch, %bl
89 ; CHECK32-NEXT: sete %ch
90 ; CHECK32-NEXT: testb %cl, %ch
91 ; CHECK32-NEXT: cmovel %ebp, %edx
92 ; CHECK32-NEXT: cmovel %edi, %eax
93 ; CHECK32-NEXT: popl %esi
94 ; CHECK32-NEXT: .cfi_def_cfa_offset 16
95 ; CHECK32-NEXT: popl %edi
96 ; CHECK32-NEXT: .cfi_def_cfa_offset 12
97 ; CHECK32-NEXT: popl %ebx
98 ; CHECK32-NEXT: .cfi_def_cfa_offset 8
99 ; CHECK32-NEXT: popl %ebp
100 ; CHECK32-NEXT: .cfi_def_cfa_offset 4
101 ; CHECK32-NEXT: retl
39 define i64 @func2(i64 %x, i64 %y) nounwind {
40 ; X86-LABEL: func2:
41 ; X86: # %bb.0:
42 ; X86-NEXT: pushl %ebp
43 ; X86-NEXT: pushl %ebx
44 ; X86-NEXT: pushl %edi
45 ; X86-NEXT: pushl %esi
46 ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
47 ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
48 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
49 ; X86-NEXT: addl {{[0-9]+}}(%esp), %edi
50 ; X86-NEXT: movl %ebx, %ebp
51 ; X86-NEXT: adcl %esi, %ebp
52 ; X86-NEXT: movl %ebp, %eax
53 ; X86-NEXT: sarl $31, %eax
54 ; X86-NEXT: xorl %ecx, %ecx
55 ; X86-NEXT: testl %ebp, %ebp
56 ; X86-NEXT: setns %cl
57 ; X86-NEXT: movl %ecx, %edx
58 ; X86-NEXT: addl $2147483647, %edx # imm = 0x7FFFFFFF
59 ; X86-NEXT: testl %ebx, %ebx
60 ; X86-NEXT: setns %bl
61 ; X86-NEXT: cmpb %cl, %bl
62 ; X86-NEXT: setne %cl
63 ; X86-NEXT: testl %esi, %esi
64 ; X86-NEXT: setns %ch
65 ; X86-NEXT: cmpb %ch, %bl
66 ; X86-NEXT: sete %ch
67 ; X86-NEXT: testb %cl, %ch
68 ; X86-NEXT: cmovel %ebp, %edx
69 ; X86-NEXT: cmovel %edi, %eax
70 ; X86-NEXT: popl %esi
71 ; X86-NEXT: popl %edi
72 ; X86-NEXT: popl %ebx
73 ; X86-NEXT: popl %ebp
74 ; X86-NEXT: retl
75 ;
76 ; X64-LABEL: func2:
77 ; X64: # %bb.0:
78 ; X64-NEXT: xorl %ecx, %ecx
79 ; X64-NEXT: movq %rdi, %rax
80 ; X64-NEXT: addq %rsi, %rax
81 ; X64-NEXT: setns %cl
82 ; X64-NEXT: movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF
83 ; X64-NEXT: addq %rcx, %rax
84 ; X64-NEXT: addq %rsi, %rdi
85 ; X64-NEXT: cmovnoq %rdi, %rax
86 ; X64-NEXT: retq
10287 %tmp = call i64 @llvm.sadd.sat.i64(i64 %x, i64 %y);
10388 ret i64 %tmp;
10489 }
10590
106 define i4 @func3(i4 %x, i4 %y) {
107 ; CHECK-LABEL: func3:
108 ; CHECK: # %bb.0:
109 ; CHECK-NEXT: movl %edi, %eax
110 ; CHECK-NEXT: shlb $4, %sil
111 ; CHECK-NEXT: shlb $4, %al
112 ; CHECK-NEXT: movl %eax, %ecx
113 ; CHECK-NEXT: addb %sil, %cl
114 ; CHECK-NEXT: setns %cl
115 ; CHECK-NEXT: addb %sil, %al
116 ; CHECK-NEXT: jno .LBB2_2
117 ; CHECK-NEXT: # %bb.1:
118 ; CHECK-NEXT: addb $127, %cl
119 ; CHECK-NEXT: movl %ecx, %eax
120 ; CHECK-NEXT: .LBB2_2:
121 ; CHECK-NEXT: sarb $4, %al
122 ; CHECK-NEXT: # kill: def $al killed $al killed $eax
123 ; CHECK-NEXT: retq
124 ;
125 ; CHECK32-LABEL: func3:
126 ; CHECK32: # %bb.0:
127 ; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %al
128 ; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %dl
129 ; CHECK32-NEXT: shlb $4, %dl
130 ; CHECK32-NEXT: shlb $4, %al
131 ; CHECK32-NEXT: movl %eax, %ecx
132 ; CHECK32-NEXT: addb %dl, %cl
133 ; CHECK32-NEXT: setns %cl
134 ; CHECK32-NEXT: addb %dl, %al
135 ; CHECK32-NEXT: jno .LBB2_2
136 ; CHECK32-NEXT: # %bb.1:
137 ; CHECK32-NEXT: addb $127, %cl
138 ; CHECK32-NEXT: movl %ecx, %eax
139 ; CHECK32-NEXT: .LBB2_2:
140 ; CHECK32-NEXT: sarb $4, %al
141 ; CHECK32-NEXT: retl
91 define i4 @func3(i4 %x, i4 %y) nounwind {
92 ; X86-LABEL: func3:
93 ; X86: # %bb.0:
94 ; X86-NEXT: movb {{[0-9]+}}(%esp), %al
95 ; X86-NEXT: movb {{[0-9]+}}(%esp), %dl
96 ; X86-NEXT: shlb $4, %dl
97 ; X86-NEXT: shlb $4, %al
98 ; X86-NEXT: movl %eax, %ecx
99 ; X86-NEXT: addb %dl, %cl
100 ; X86-NEXT: setns %cl
101 ; X86-NEXT: addb %dl, %al
102 ; X86-NEXT: jno .LBB2_2
103 ; X86-NEXT: # %bb.1:
104 ; X86-NEXT: addb $127, %cl
105 ; X86-NEXT: movl %ecx, %eax
106 ; X86-NEXT: .LBB2_2:
107 ; X86-NEXT: sarb $4, %al
108 ; X86-NEXT: retl
109 ;
110 ; X64-LABEL: func3:
111 ; X64: # %bb.0:
112 ; X64-NEXT: movl %edi, %eax
113 ; X64-NEXT: shlb $4, %sil
114 ; X64-NEXT: shlb $4, %al
115 ; X64-NEXT: movl %eax, %ecx
116 ; X64-NEXT: addb %sil, %cl
117 ; X64-NEXT: setns %cl
118 ; X64-NEXT: addb %sil, %al
119 ; X64-NEXT: jno .LBB2_2
120 ; X64-NEXT: # %bb.1:
121 ; X64-NEXT: addb $127, %cl
122 ; X64-NEXT: movl %ecx, %eax
123 ; X64-NEXT: .LBB2_2:
124 ; X64-NEXT: sarb $4, %al
125 ; X64-NEXT: # kill: def $al killed $al killed $eax
126 ; X64-NEXT: retq
142127 %tmp = call i4 @llvm.sadd.sat.i4(i4 %x, i4 %y);
143128 ret i4 %tmp;
144129 }
145130
146 define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) {
147 ; CHECK-LABEL: vec:
148 ; CHECK: # %bb.0:
149 ; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,2,3]
150 ; CHECK-NEXT: movd %xmm2, %ecx
151 ; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,2,3]
152 ; CHECK-NEXT: movd %xmm2, %r8d
153 ; CHECK-NEXT: xorl %edx, %edx
154 ; CHECK-NEXT: movl %r8d, %esi
155 ; CHECK-NEXT: addl %ecx, %esi
156 ; CHECK-NEXT: setns %dl
157 ; CHECK-NEXT: addl $2147483647, %edx # imm = 0x7FFFFFFF
158 ; CHECK-NEXT: addl %ecx, %r8d
159 ; CHECK-NEXT: cmovol %edx, %r8d
160 ; CHECK-NEXT: movd %xmm1, %edx
161 ; CHECK-NEXT: movd %xmm0, %ecx
162 ; CHECK-NEXT: xorl %esi, %esi
163 ; CHECK-NEXT: movl %ecx, %edi
164 ; CHECK-NEXT: addl %edx, %edi
165 ; CHECK-NEXT: setns %sil
166 ; CHECK-NEXT: addl $2147483647, %esi # imm = 0x7FFFFFFF
167 ; CHECK-NEXT: addl %edx, %ecx
168 ; CHECK-NEXT: cmovol %esi, %ecx
169 ; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,3,0,1]
170 ; CHECK-NEXT: movd %xmm2, %edx
171 ; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1]
172 ; CHECK-NEXT: movd %xmm2, %eax
173 ; CHECK-NEXT: xorl %edi, %edi
174 ; CHECK-NEXT: movl %eax, %esi
175 ; CHECK-NEXT: addl %edx, %esi
176 ; CHECK-NEXT: setns %dil
177 ; CHECK-NEXT: addl $2147483647, %edi # imm = 0x7FFFFFFF
178 ; CHECK-NEXT: addl %edx, %eax
179 ; CHECK-NEXT: cmovol %edi, %eax
180 ; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[3,1,2,3]
181 ; CHECK-NEXT: movd %xmm1, %r9d
182 ; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3]
183 ; CHECK-NEXT: movd %xmm0, %edx
184 ; CHECK-NEXT: xorl %edi, %edi
185 ; CHECK-NEXT: movl %edx, %esi
186 ; CHECK-NEXT: addl %r9d, %esi
187 ; CHECK-NEXT: setns %dil
188 ; CHECK-NEXT: addl $2147483647, %edi # imm = 0x7FFFFFFF
189 ; CHECK-NEXT: addl %r9d, %edx
190 ; CHECK-NEXT: cmovol %edi, %edx
191 ; CHECK-NEXT: movd %edx, %xmm0
192 ; CHECK-NEXT: movd %eax, %xmm1
193 ; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
194 ; CHECK-NEXT: movd %ecx, %xmm0
195 ; CHECK-NEXT: movd %r8d, %xmm2
196 ; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
197 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
198 ; CHECK-NEXT: retq
199 ;
200 ; CHECK32-LABEL: vec:
201 ; CHECK32: # %bb.0:
202 ; CHECK32-NEXT: pushl %ebp
203 ; CHECK32-NEXT: .cfi_def_cfa_offset 8
204 ; CHECK32-NEXT: pushl %ebx
205 ; CHECK32-NEXT: .cfi_def_cfa_offset 12
206 ; CHECK32-NEXT: pushl %edi
207 ; CHECK32-NEXT: .cfi_def_cfa_offset 16
208 ; CHECK32-NEXT: pushl %esi
209 ; CHECK32-NEXT: .cfi_def_cfa_offset 20
210 ; CHECK32-NEXT: .cfi_offset %esi, -20
211 ; CHECK32-NEXT: .cfi_offset %edi, -16
212 ; CHECK32-NEXT: .cfi_offset %ebx, -12
213 ; CHECK32-NEXT: .cfi_offset %ebp, -8
214 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
215 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
216 ; CHECK32-NEXT: xorl %eax, %eax
217 ; CHECK32-NEXT: movl %ecx, %esi
218 ; CHECK32-NEXT: addl %edx, %esi
219 ; CHECK32-NEXT: setns %al
220 ; CHECK32-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
221 ; CHECK32-NEXT: addl %edx, %ecx
222 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
223 ; CHECK32-NEXT: cmovol %eax, %ecx
224 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
225 ; CHECK32-NEXT: xorl %eax, %eax
226 ; CHECK32-NEXT: movl %edx, %edi
227 ; CHECK32-NEXT: addl %esi, %edi
228 ; CHECK32-NEXT: setns %al
229 ; CHECK32-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
230 ; CHECK32-NEXT: addl %esi, %edx
231 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
232 ; CHECK32-NEXT: cmovol %eax, %edx
233 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edi
234 ; CHECK32-NEXT: xorl %eax, %eax
235 ; CHECK32-NEXT: movl %esi, %ebx
236 ; CHECK32-NEXT: addl %edi, %ebx
237 ; CHECK32-NEXT: setns %al
238 ; CHECK32-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
239 ; CHECK32-NEXT: addl %edi, %esi
240 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edi
241 ; CHECK32-NEXT: cmovol %eax, %esi
242 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
243 ; CHECK32-NEXT: xorl %ebx, %ebx
244 ; CHECK32-NEXT: movl %edi, %ebp
245 ; CHECK32-NEXT: addl %eax, %ebp
246 ; CHECK32-NEXT: setns %bl
247 ; CHECK32-NEXT: addl $2147483647, %ebx # imm = 0x7FFFFFFF
248 ; CHECK32-NEXT: addl %eax, %edi
249 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
250 ; CHECK32-NEXT: cmovol %ebx, %edi
251 ; CHECK32-NEXT: movl %ecx, 12(%eax)
252 ; CHECK32-NEXT: movl %edx, 8(%eax)
253 ; CHECK32-NEXT: movl %esi, 4(%eax)
254 ; CHECK32-NEXT: movl %edi, (%eax)
255 ; CHECK32-NEXT: popl %esi
256 ; CHECK32-NEXT: .cfi_def_cfa_offset 16
257 ; CHECK32-NEXT: popl %edi
258 ; CHECK32-NEXT: .cfi_def_cfa_offset 12
259 ; CHECK32-NEXT: popl %ebx
260 ; CHECK32-NEXT: .cfi_def_cfa_offset 8
261 ; CHECK32-NEXT: popl %ebp
262 ; CHECK32-NEXT: .cfi_def_cfa_offset 4
263 ; CHECK32-NEXT: retl $4
131 define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
132 ; X86-LABEL: vec:
133 ; X86: # %bb.0:
134 ; X86-NEXT: pushl %ebp
135 ; X86-NEXT: pushl %ebx
136 ; X86-NEXT: pushl %edi
137 ; X86-NEXT: pushl %esi
138 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
139 ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
140 ; X86-NEXT: xorl %eax, %eax
141 ; X86-NEXT: movl %ecx, %esi
142 ; X86-NEXT: addl %edx, %esi
143 ; X86-NEXT: setns %al
144 ; X86-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
145 ; X86-NEXT: addl %edx, %ecx
146 ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
147 ; X86-NEXT: cmovol %eax, %ecx
148 ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
149 ; X86-NEXT: xorl %eax, %eax
150 ; X86-NEXT: movl %edx, %edi
151 ; X86-NEXT: addl %esi, %edi
152 ; X86-NEXT: setns %al
153 ; X86-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
154 ; X86-NEXT: addl %esi, %edx
155 ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
156 ; X86-NEXT: cmovol %eax, %edx
157 ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
158 ; X86-NEXT: xorl %eax, %eax
159 ; X86-NEXT: movl %esi, %ebx
160 ; X86-NEXT: addl %edi, %ebx
161 ; X86-NEXT: setns %al
162 ; X86-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
163 ; X86-NEXT: addl %edi, %esi
164 ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
165 ; X86-NEXT: cmovol %eax, %esi
166 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
167 ; X86-NEXT: xorl %ebx, %ebx
168 ; X86-NEXT: movl %edi, %ebp
169 ; X86-NEXT: addl %eax, %ebp
170 ; X86-NEXT: setns %bl
171 ; X86-NEXT: addl $2147483647, %ebx # imm = 0x7FFFFFFF
172 ; X86-NEXT: addl %eax, %edi
173 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
174 ; X86-NEXT: cmovol %ebx, %edi
175 ; X86-NEXT: movl %ecx, 12(%eax)
176 ; X86-NEXT: movl %edx, 8(%eax)
177 ; X86-NEXT: movl %esi, 4(%eax)
178 ; X86-NEXT: movl %edi, (%eax)
179 ; X86-NEXT: popl %esi
180 ; X86-NEXT: popl %edi
181 ; X86-NEXT: popl %ebx
182 ; X86-NEXT: popl %ebp
183 ; X86-NEXT: retl $4
184 ;
185 ; X64-LABEL: vec:
186 ; X64: # %bb.0:
187 ; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,2,3]
188 ; X64-NEXT: movd %xmm2, %ecx
189 ; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,2,3]
190 ; X64-NEXT: movd %xmm2, %r8d
191 ; X64-NEXT: xorl %edx, %edx
192 ; X64-NEXT: movl %r8d, %esi
193 ; X64-NEXT: addl %ecx, %esi
194 ; X64-NEXT: setns %dl
195 ; X64-NEXT: addl $2147483647, %edx # imm = 0x7FFFFFFF
196 ; X64-NEXT: addl %ecx, %r8d
197 ; X64-NEXT: cmovol %edx, %r8d
198 ; X64-NEXT: movd %xmm1, %edx
199 ; X64-NEXT: movd %xmm0, %ecx
200 ; X64-NEXT: xorl %esi, %esi
201 ; X64-NEXT: movl %ecx, %edi
202 ; X64-NEXT: addl %edx, %edi
203 ; X64-NEXT: setns %sil
204 ; X64-NEXT: addl $2147483647, %esi # imm = 0x7FFFFFFF
205 ; X64-NEXT: addl %edx, %ecx
206 ; X64-NEXT: cmovol %esi, %ecx
207 ; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,3,0,1]
208 ; X64-NEXT: movd %xmm2, %edx
209 ; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1]
210 ; X64-NEXT: movd %xmm2, %eax
211 ; X64-NEXT: xorl %edi, %edi
212 ; X64-NEXT: movl %eax, %esi
213 ; X64-NEXT: addl %edx, %esi
214 ; X64-NEXT: setns %dil
215 ; X64-NEXT: addl $2147483647, %edi # imm = 0x7FFFFFFF
216 ; X64-NEXT: addl %edx, %eax
217 ; X64-NEXT: cmovol %edi, %eax
218 ; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm1[3,1,2,3]
219 ; X64-NEXT: movd %xmm1, %r9d
220 ; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3]
221 ; X64-NEXT: movd %xmm0, %edx
222 ; X64-NEXT: xorl %edi, %edi
223 ; X64-NEXT: movl %edx, %esi
224 ; X64-NEXT: addl %r9d, %esi
225 ; X64-NEXT: setns %dil
226 ; X64-NEXT: addl $2147483647, %edi # imm = 0x7FFFFFFF
227 ; X64-NEXT: addl %r9d, %edx
228 ; X64-NEXT: cmovol %edi, %edx
229 ; X64-NEXT: movd %edx, %xmm0
230 ; X64-NEXT: movd %eax, %xmm1
231 ; X64-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
232 ; X64-NEXT: movd %ecx, %xmm0
233 ; X64-NEXT: movd %r8d, %xmm2
234 ; X64-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
235 ; X64-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
236 ; X64-NEXT: retq
264237 %tmp = call <4 x i32> @llvm.sadd.sat.v4i32(<4 x i32> %x, <4 x i32> %y);
265238 ret <4 x i32> %tmp;
266239 }
0 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
1 ; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s
2 ; RUN: llc < %s -mcpu=generic -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=CHECK32
1 ; RUN: llc < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefixes=CHECK,X86
2 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefixes=CHECK,X64
33
44 declare i4 @llvm.ssub.sat.i4 (i4, i4)
55 declare i32 @llvm.ssub.sat.i32 (i32, i32)
66 declare i64 @llvm.ssub.sat.i64 (i64, i64)
77 declare <4 x i32> @llvm.ssub.sat.v4i32(<4 x i32>, <4 x i32>)
88
9 define i32 @func(i32 %x, i32 %y) {
10 ; CHECK-LABEL: func:
11 ; CHECK: # %bb.0:
12 ; CHECK-NEXT: xorl %eax, %eax
13 ; CHECK-NEXT: movl %edi, %ecx
14 ; CHECK-NEXT: subl %esi, %ecx
15 ; CHECK-NEXT: setns %al
16 ; CHECK-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
17 ; CHECK-NEXT: subl %esi, %edi
18 ; CHECK-NEXT: cmovnol %edi, %eax
19 ; CHECK-NEXT: retq
20 ;
21 ; CHECK32-LABEL: func:
22 ; CHECK32: # %bb.0:
23 ; CHECK32-NEXT: pushl %esi
24 ; CHECK32-NEXT: .cfi_def_cfa_offset 8
25 ; CHECK32-NEXT: .cfi_offset %esi, -8
26 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
27 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
28 ; CHECK32-NEXT: xorl %ecx, %ecx
29 ; CHECK32-NEXT: movl %eax, %esi
30 ; CHECK32-NEXT: subl %edx, %esi
31 ; CHECK32-NEXT: setns %cl
32 ; CHECK32-NEXT: addl $2147483647, %ecx # imm = 0x7FFFFFFF
33 ; CHECK32-NEXT: subl %edx, %eax
34 ; CHECK32-NEXT: cmovol %ecx, %eax
35 ; CHECK32-NEXT: popl %esi
36 ; CHECK32-NEXT: .cfi_def_cfa_offset 4
37 ; CHECK32-NEXT: retl
9 define i32 @func(i32 %x, i32 %y) nounwind {
10 ; X86-LABEL: func:
11 ; X86: # %bb.0:
12 ; X86-NEXT: pushl %esi
13 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
14 ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
15 ; X86-NEXT: xorl %ecx, %ecx
16 ; X86-NEXT: movl %eax, %esi
17 ; X86-NEXT: subl %edx, %esi
18 ; X86-NEXT: setns %cl
19 ; X86-NEXT: addl $2147483647, %ecx # imm = 0x7FFFFFFF
20 ; X86-NEXT: subl %edx, %eax
21 ; X86-NEXT: cmovol %ecx, %eax
22 ; X86-NEXT: popl %esi
23 ; X86-NEXT: retl
24 ;
25 ; X64-LABEL: func:
26 ; X64: # %bb.0:
27 ; X64-NEXT: xorl %eax, %eax
28 ; X64-NEXT: movl %edi, %ecx
29 ; X64-NEXT: subl %esi, %ecx
30 ; X64-NEXT: setns %al
31 ; X64-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
32 ; X64-NEXT: subl %esi, %edi
33 ; X64-NEXT: cmovnol %edi, %eax
34 ; X64-NEXT: retq
3835 %tmp = call i32 @llvm.ssub.sat.i32(i32 %x, i32 %y);
3936 ret i32 %tmp;
4037 }
4138
42 define i64 @func2(i64 %x, i64 %y) {
43 ; CHECK-LABEL: func2:
44 ; CHECK: # %bb.0:
45 ; CHECK-NEXT: xorl %ecx, %ecx
46 ; CHECK-NEXT: movq %rdi, %rax
47 ; CHECK-NEXT: subq %rsi, %rax
48 ; CHECK-NEXT: setns %cl
49 ; CHECK-NEXT: movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF
50 ; CHECK-NEXT: addq %rcx, %rax
51 ; CHECK-NEXT: subq %rsi, %rdi
52 ; CHECK-NEXT: cmovnoq %rdi, %rax
53 ; CHECK-NEXT: retq
54 ;
55 ; CHECK32-LABEL: func2:
56 ; CHECK32: # %bb.0:
57 ; CHECK32-NEXT: pushl %ebp
58 ; CHECK32-NEXT: .cfi_def_cfa_offset 8
59 ; CHECK32-NEXT: pushl %ebx
60 ; CHECK32-NEXT: .cfi_def_cfa_offset 12
61 ; CHECK32-NEXT: pushl %edi
62 ; CHECK32-NEXT: .cfi_def_cfa_offset 16
63 ; CHECK32-NEXT: pushl %esi
64 ; CHECK32-NEXT: .cfi_def_cfa_offset 20
65 ; CHECK32-NEXT: .cfi_offset %esi, -20
66 ; CHECK32-NEXT: .cfi_offset %edi, -16
67 ; CHECK32-NEXT: .cfi_offset %ebx, -12
68 ; CHECK32-NEXT: .cfi_offset %ebp, -8
69 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
70 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edi
71 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ebx
72 ; CHECK32-NEXT: subl {{[0-9]+}}(%esp), %edi
73 ; CHECK32-NEXT: movl %ebx, %ebp
74 ; CHECK32-NEXT: sbbl %esi, %ebp
75 ; CHECK32-NEXT: movl %ebp, %eax
76 ; CHECK32-NEXT: sarl $31, %eax
77 ; CHECK32-NEXT: xorl %ecx, %ecx
78 ; CHECK32-NEXT: testl %ebp, %ebp
79 ; CHECK32-NEXT: setns %cl
80 ; CHECK32-NEXT: movl %ecx, %edx
81 ; CHECK32-NEXT: addl $2147483647, %edx # imm = 0x7FFFFFFF
82 ; CHECK32-NEXT: testl %ebx, %ebx
83 ; CHECK32-NEXT: setns %bl
84 ; CHECK32-NEXT: cmpb %cl, %bl
85 ; CHECK32-NEXT: setne %cl
86 ; CHECK32-NEXT: testl %esi, %esi
87 ; CHECK32-NEXT: setns %ch
88 ; CHECK32-NEXT: cmpb %ch, %bl
89 ; CHECK32-NEXT: setne %ch
90 ; CHECK32-NEXT: testb %cl, %ch
91 ; CHECK32-NEXT: cmovel %ebp, %edx
92 ; CHECK32-NEXT: cmovel %edi, %eax
93 ; CHECK32-NEXT: popl %esi
94 ; CHECK32-NEXT: .cfi_def_cfa_offset 16
95 ; CHECK32-NEXT: popl %edi
96 ; CHECK32-NEXT: .cfi_def_cfa_offset 12
97 ; CHECK32-NEXT: popl %ebx
98 ; CHECK32-NEXT: .cfi_def_cfa_offset 8
99 ; CHECK32-NEXT: popl %ebp
100 ; CHECK32-NEXT: .cfi_def_cfa_offset 4
101 ; CHECK32-NEXT: retl
39 define i64 @func2(i64 %x, i64 %y) nounwind {
40 ; X86-LABEL: func2:
41 ; X86: # %bb.0:
42 ; X86-NEXT: pushl %ebp
43 ; X86-NEXT: pushl %ebx
44 ; X86-NEXT: pushl %edi
45 ; X86-NEXT: pushl %esi
46 ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
47 ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
48 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
49 ; X86-NEXT: subl {{[0-9]+}}(%esp), %edi
50 ; X86-NEXT: movl %ebx, %ebp
51 ; X86-NEXT: sbbl %esi, %ebp
52 ; X86-NEXT: movl %ebp, %eax
53 ; X86-NEXT: sarl $31, %eax
54 ; X86-NEXT: xorl %ecx, %ecx
55 ; X86-NEXT: testl %ebp, %ebp
56 ; X86-NEXT: setns %cl
57 ; X86-NEXT: movl %ecx, %edx
58 ; X86-NEXT: addl $2147483647, %edx # imm = 0x7FFFFFFF
59 ; X86-NEXT: testl %ebx, %ebx
60 ; X86-NEXT: setns %bl
61 ; X86-NEXT: cmpb %cl, %bl
62 ; X86-NEXT: setne %cl
63 ; X86-NEXT: testl %esi, %esi
64 ; X86-NEXT: setns %ch
65 ; X86-NEXT: cmpb %ch, %bl
66 ; X86-NEXT: setne %ch
67 ; X86-NEXT: testb %cl, %ch
68 ; X86-NEXT: cmovel %ebp, %edx
69 ; X86-NEXT: cmovel %edi, %eax
70 ; X86-NEXT: popl %esi
71 ; X86-NEXT: popl %edi
72 ; X86-NEXT: popl %ebx
73 ; X86-NEXT: popl %ebp
74 ; X86-NEXT: retl
75 ;
76 ; X64-LABEL: func2:
77 ; X64: # %bb.0:
78 ; X64-NEXT: xorl %ecx, %ecx
79 ; X64-NEXT: movq %rdi, %rax
80 ; X64-NEXT: subq %rsi, %rax
81 ; X64-NEXT: setns %cl
82 ; X64-NEXT: movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF
83 ; X64-NEXT: addq %rcx, %rax
84 ; X64-NEXT: subq %rsi, %rdi
85 ; X64-NEXT: cmovnoq %rdi, %rax
86 ; X64-NEXT: retq
10287 %tmp = call i64 @llvm.ssub.sat.i64(i64 %x, i64 %y);
10388 ret i64 %tmp;
10489 }
10590
106 define i4 @func3(i4 %x, i4 %y) {
107 ; CHECK-LABEL: func3:
108 ; CHECK: # %bb.0:
109 ; CHECK-NEXT: movl %edi, %eax
110 ; CHECK-NEXT: shlb $4, %sil
111 ; CHECK-NEXT: shlb $4, %al
112 ; CHECK-NEXT: movl %eax, %ecx
113 ; CHECK-NEXT: subb %sil, %cl
114 ; CHECK-NEXT: setns %cl
115 ; CHECK-NEXT: subb %sil, %al
116 ; CHECK-NEXT: jno .LBB2_2
117 ; CHECK-NEXT: # %bb.1:
118 ; CHECK-NEXT: addb $127, %cl
119 ; CHECK-NEXT: movl %ecx, %eax
120 ; CHECK-NEXT: .LBB2_2:
121 ; CHECK-NEXT: sarb $4, %al
122 ; CHECK-NEXT: # kill: def $al killed $al killed $eax
123 ; CHECK-NEXT: retq
124 ;
125 ; CHECK32-LABEL: func3:
126 ; CHECK32: # %bb.0:
127 ; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %al
128 ; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %dl
129 ; CHECK32-NEXT: shlb $4, %dl
130 ; CHECK32-NEXT: shlb $4, %al
131 ; CHECK32-NEXT: movl %eax, %ecx
132 ; CHECK32-NEXT: subb %dl, %cl
133 ; CHECK32-NEXT: setns %cl
134 ; CHECK32-NEXT: subb %dl, %al
135 ; CHECK32-NEXT: jno .LBB2_2
136 ; CHECK32-NEXT: # %bb.1:
137 ; CHECK32-NEXT: addb $127, %cl
138 ; CHECK32-NEXT: movl %ecx, %eax
139 ; CHECK32-NEXT: .LBB2_2:
140 ; CHECK32-NEXT: sarb $4, %al
141 ; CHECK32-NEXT: retl
91 define i4 @func3(i4 %x, i4 %y) nounwind {
92 ; X86-LABEL: func3:
93 ; X86: # %bb.0:
94 ; X86-NEXT: movb {{[0-9]+}}(%esp), %al
95 ; X86-NEXT: movb {{[0-9]+}}(%esp), %dl
96 ; X86-NEXT: shlb $4, %dl
97 ; X86-NEXT: shlb $4, %al
98 ; X86-NEXT: movl %eax, %ecx
99 ; X86-NEXT: subb %dl, %cl
100 ; X86-NEXT: setns %cl
101 ; X86-NEXT: subb %dl, %al
102 ; X86-NEXT: jno .LBB2_2
103 ; X86-NEXT: # %bb.1:
104 ; X86-NEXT: addb $127, %cl
105 ; X86-NEXT: movl %ecx, %eax
106 ; X86-NEXT: .LBB2_2:
107 ; X86-NEXT: sarb $4, %al
108 ; X86-NEXT: retl
109 ;
110 ; X64-LABEL: func3:
111 ; X64: # %bb.0:
112 ; X64-NEXT: movl %edi, %eax
113 ; X64-NEXT: shlb $4, %sil
114 ; X64-NEXT: shlb $4, %al
115 ; X64-NEXT: movl %eax, %ecx
116 ; X64-NEXT: subb %sil, %cl
117 ; X64-NEXT: setns %cl
118 ; X64-NEXT: subb %sil, %al
119 ; X64-NEXT: jno .LBB2_2
120 ; X64-NEXT: # %bb.1:
121 ; X64-NEXT: addb $127, %cl
122 ; X64-NEXT: movl %ecx, %eax
123 ; X64-NEXT: .LBB2_2:
124 ; X64-NEXT: sarb $4, %al
125 ; X64-NEXT: # kill: def $al killed $al killed $eax
126 ; X64-NEXT: retq
142127 %tmp = call i4 @llvm.ssub.sat.i4(i4 %x, i4 %y);
143128 ret i4 %tmp;
144129 }
145130
146 define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) {
147 ; CHECK-LABEL: vec:
148 ; CHECK: # %bb.0:
149 ; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,2,3]
150 ; CHECK-NEXT: movd %xmm2, %ecx
151 ; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,2,3]
152 ; CHECK-NEXT: movd %xmm2, %r8d
153 ; CHECK-NEXT: xorl %edx, %edx
154 ; CHECK-NEXT: movl %r8d, %esi
155 ; CHECK-NEXT: subl %ecx, %esi
156 ; CHECK-NEXT: setns %dl
157 ; CHECK-NEXT: addl $2147483647, %edx # imm = 0x7FFFFFFF
158 ; CHECK-NEXT: subl %ecx, %r8d
159 ; CHECK-NEXT: cmovol %edx, %r8d
160 ; CHECK-NEXT: movd %xmm1, %edx
161 ; CHECK-NEXT: movd %xmm0, %ecx
162 ; CHECK-NEXT: xorl %esi, %esi
163 ; CHECK-NEXT: movl %ecx, %edi
164 ; CHECK-NEXT: subl %edx, %edi
165 ; CHECK-NEXT: setns %sil
166 ; CHECK-NEXT: addl $2147483647, %esi # imm = 0x7FFFFFFF
167 ; CHECK-NEXT: subl %edx, %ecx
168 ; CHECK-NEXT: cmovol %esi, %ecx
169 ; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,3,0,1]
170 ; CHECK-NEXT: movd %xmm2, %edx
171 ; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1]
172 ; CHECK-NEXT: movd %xmm2, %eax
173 ; CHECK-NEXT: xorl %edi, %edi
174 ; CHECK-NEXT: movl %eax, %esi
175 ; CHECK-NEXT: subl %edx, %esi
176 ; CHECK-NEXT: setns %dil
177 ; CHECK-NEXT: addl $2147483647, %edi # imm = 0x7FFFFFFF
178 ; CHECK-NEXT: subl %edx, %eax
179 ; CHECK-NEXT: cmovol %edi, %eax
180 ; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[3,1,2,3]
181 ; CHECK-NEXT: movd %xmm1, %r9d
182 ; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3]
183 ; CHECK-NEXT: movd %xmm0, %edx
184 ; CHECK-NEXT: xorl %edi, %edi
185 ; CHECK-NEXT: movl %edx, %esi
186 ; CHECK-NEXT: subl %r9d, %esi
187 ; CHECK-NEXT: setns %dil
188 ; CHECK-NEXT: addl $2147483647, %edi # imm = 0x7FFFFFFF
189 ; CHECK-NEXT: subl %r9d, %edx
190 ; CHECK-NEXT: cmovol %edi, %edx
191 ; CHECK-NEXT: movd %edx, %xmm0
192 ; CHECK-NEXT: movd %eax, %xmm1
193 ; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
194 ; CHECK-NEXT: movd %ecx, %xmm0
195 ; CHECK-NEXT: movd %r8d, %xmm2
196 ; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
197 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
198 ; CHECK-NEXT: retq
199 ;
200 ; CHECK32-LABEL: vec:
201 ; CHECK32: # %bb.0:
202 ; CHECK32-NEXT: pushl %ebp
203 ; CHECK32-NEXT: .cfi_def_cfa_offset 8
204 ; CHECK32-NEXT: pushl %ebx
205 ; CHECK32-NEXT: .cfi_def_cfa_offset 12
206 ; CHECK32-NEXT: pushl %edi
207 ; CHECK32-NEXT: .cfi_def_cfa_offset 16
208 ; CHECK32-NEXT: pushl %esi
209 ; CHECK32-NEXT: .cfi_def_cfa_offset 20
210 ; CHECK32-NEXT: .cfi_offset %esi, -20
211 ; CHECK32-NEXT: .cfi_offset %edi, -16
212 ; CHECK32-NEXT: .cfi_offset %ebx, -12
213 ; CHECK32-NEXT: .cfi_offset %ebp, -8
214 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
215 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
216 ; CHECK32-NEXT: xorl %eax, %eax
217 ; CHECK32-NEXT: movl %ecx, %esi
218 ; CHECK32-NEXT: subl %edx, %esi
219 ; CHECK32-NEXT: setns %al
220 ; CHECK32-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
221 ; CHECK32-NEXT: subl %edx, %ecx
222 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
223 ; CHECK32-NEXT: cmovol %eax, %ecx
224 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
225 ; CHECK32-NEXT: xorl %eax, %eax
226 ; CHECK32-NEXT: movl %edx, %edi
227 ; CHECK32-NEXT: subl %esi, %edi
228 ; CHECK32-NEXT: setns %al
229 ; CHECK32-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
230 ; CHECK32-NEXT: subl %esi, %edx
231 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
232 ; CHECK32-NEXT: cmovol %eax, %edx
233 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edi
234 ; CHECK32-NEXT: xorl %eax, %eax
235 ; CHECK32-NEXT: movl %esi, %ebx
236 ; CHECK32-NEXT: subl %edi, %ebx
237 ; CHECK32-NEXT: setns %al
238 ; CHECK32-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
239 ; CHECK32-NEXT: subl %edi, %esi
240 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edi
241 ; CHECK32-NEXT: cmovol %eax, %esi
242 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
243 ; CHECK32-NEXT: xorl %ebx, %ebx
244 ; CHECK32-NEXT: movl %edi, %ebp
245 ; CHECK32-NEXT: subl %eax, %ebp
246 ; CHECK32-NEXT: setns %bl
247 ; CHECK32-NEXT: addl $2147483647, %ebx # imm = 0x7FFFFFFF
248 ; CHECK32-NEXT: subl %eax, %edi
249 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
250 ; CHECK32-NEXT: cmovol %ebx, %edi
251 ; CHECK32-NEXT: movl %ecx, 12(%eax)
252 ; CHECK32-NEXT: movl %edx, 8(%eax)
253 ; CHECK32-NEXT: movl %esi, 4(%eax)
254 ; CHECK32-NEXT: movl %edi, (%eax)
255 ; CHECK32-NEXT: popl %esi
256 ; CHECK32-NEXT: .cfi_def_cfa_offset 16
257 ; CHECK32-NEXT: popl %edi
258 ; CHECK32-NEXT: .cfi_def_cfa_offset 12
259 ; CHECK32-NEXT: popl %ebx
260 ; CHECK32-NEXT: .cfi_def_cfa_offset 8
261 ; CHECK32-NEXT: popl %ebp
262 ; CHECK32-NEXT: .cfi_def_cfa_offset 4
263 ; CHECK32-NEXT: retl $4
131 define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
132 ; X86-LABEL: vec:
133 ; X86: # %bb.0:
134 ; X86-NEXT: pushl %ebp
135 ; X86-NEXT: pushl %ebx
136 ; X86-NEXT: pushl %edi
137 ; X86-NEXT: pushl %esi
138 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
139 ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
140 ; X86-NEXT: xorl %eax, %eax
141 ; X86-NEXT: movl %ecx, %esi
142 ; X86-NEXT: subl %edx, %esi
143 ; X86-NEXT: setns %al
144 ; X86-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
145 ; X86-NEXT: subl %edx, %ecx
146 ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
147 ; X86-NEXT: cmovol %eax, %ecx
148 ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
149 ; X86-NEXT: xorl %eax, %eax
150 ; X86-NEXT: movl %edx, %edi
151 ; X86-NEXT: subl %esi, %edi
152 ; X86-NEXT: setns %al
153 ; X86-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
154 ; X86-NEXT: subl %esi, %edx
155 ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
156 ; X86-NEXT: cmovol %eax, %edx
157 ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
158 ; X86-NEXT: xorl %eax, %eax
159 ; X86-NEXT: movl %esi, %ebx
160 ; X86-NEXT: subl %edi, %ebx
161 ; X86-NEXT: setns %al
162 ; X86-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
163 ; X86-NEXT: subl %edi, %esi
164 ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
165 ; X86-NEXT: cmovol %eax, %esi
166 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
167 ; X86-NEXT: xorl %ebx, %ebx
168 ; X86-NEXT: movl %edi, %ebp
169 ; X86-NEXT: subl %eax, %ebp
170 ; X86-NEXT: setns %bl
171 ; X86-NEXT: addl $2147483647, %ebx # imm = 0x7FFFFFFF
172 ; X86-NEXT: subl %eax, %edi
173 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
174 ; X86-NEXT: cmovol %ebx, %edi
175 ; X86-NEXT: movl %ecx, 12(%eax)
176 ; X86-NEXT: movl %edx, 8(%eax)
177 ; X86-NEXT: movl %esi, 4(%eax)
178 ; X86-NEXT: movl %edi, (%eax)
179 ; X86-NEXT: popl %esi
180 ; X86-NEXT: popl %edi
181 ; X86-NEXT: popl %ebx
182 ; X86-NEXT: popl %ebp
183 ; X86-NEXT: retl $4
184 ;
185 ; X64-LABEL: vec:
186 ; X64: # %bb.0:
187 ; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,2,3]
188 ; X64-NEXT: movd %xmm2, %ecx
189 ; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,2,3]
190 ; X64-NEXT: movd %xmm2, %r8d
191 ; X64-NEXT: xorl %edx, %edx
192 ; X64-NEXT: movl %r8d, %esi
193 ; X64-NEXT: subl %ecx, %esi
194 ; X64-NEXT: setns %dl
195 ; X64-NEXT: addl $2147483647, %edx # imm = 0x7FFFFFFF
196 ; X64-NEXT: subl %ecx, %r8d
197 ; X64-NEXT: cmovol %edx, %r8d
198 ; X64-NEXT: movd %xmm1, %edx
199 ; X64-NEXT: movd %xmm0, %ecx
200 ; X64-NEXT: xorl %esi, %esi
201 ; X64-NEXT: movl %ecx, %edi
202 ; X64-NEXT: subl %edx, %edi
203 ; X64-NEXT: setns %sil
204 ; X64-NEXT: addl $2147483647, %esi # imm = 0x7FFFFFFF
205 ; X64-NEXT: subl %edx, %ecx
206 ; X64-NEXT: cmovol %esi, %ecx
207 ; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,3,0,1]
208 ; X64-NEXT: movd %xmm2, %edx
209 ; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1]
210 ; X64-NEXT: movd %xmm2, %eax
211 ; X64-NEXT: xorl %edi, %edi
212 ; X64-NEXT: movl %eax, %esi
213 ; X64-NEXT: subl %edx, %esi
214 ; X64-NEXT: setns %dil
215 ; X64-NEXT: addl $2147483647, %edi # imm = 0x7FFFFFFF
216 ; X64-NEXT: subl %edx, %eax
217 ; X64-NEXT: cmovol %edi, %eax
218 ; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm1[3,1,2,3]
219 ; X64-NEXT: movd %xmm1, %r9d
220 ; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3]
221 ; X64-NEXT: movd %xmm0, %edx
222 ; X64-NEXT: xorl %edi, %edi
223 ; X64-NEXT: movl %edx, %esi
224 ; X64-NEXT: subl %r9d, %esi
225 ; X64-NEXT: setns %dil
226 ; X64-NEXT: addl $2147483647, %edi # imm = 0x7FFFFFFF
227 ; X64-NEXT: subl %r9d, %edx
228 ; X64-NEXT: cmovol %edi, %edx
229 ; X64-NEXT: movd %edx, %xmm0
230 ; X64-NEXT: movd %eax, %xmm1
231 ; X64-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
232 ; X64-NEXT: movd %ecx, %xmm0
233 ; X64-NEXT: movd %r8d, %xmm2
234 ; X64-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
235 ; X64-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
236 ; X64-NEXT: retq
264237 %tmp = call <4 x i32> @llvm.ssub.sat.v4i32(<4 x i32> %x, <4 x i32> %y);
265238 ret <4 x i32> %tmp;
266239 }
0 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
1 ; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s
2 ; RUN: llc < %s -mcpu=generic -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=CHECK32
1 ; RUN: llc < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefixes=CHECK,X86
2 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefixes=CHECK,X64
33
44 declare i4 @llvm.uadd.sat.i4 (i4, i4)
55 declare i32 @llvm.uadd.sat.i32 (i32, i32)
66 declare i64 @llvm.uadd.sat.i64 (i64, i64)
77 declare <4 x i32> @llvm.uadd.sat.v4i32(<4 x i32>, <4 x i32>)
88
9 define i32 @func(i32 %x, i32 %y) {
10 ; CHECK-LABEL: func:
11 ; CHECK: # %bb.0:
12 ; CHECK-NEXT: addl %esi, %edi
13 ; CHECK-NEXT: movl $-1, %eax
14 ; CHECK-NEXT: cmovael %edi, %eax
15 ; CHECK-NEXT: retq
9 define i32 @func(i32 %x, i32 %y) nounwind {
10 ; X86-LABEL: func:
11 ; X86: # %bb.0:
12 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
13 ; X86-NEXT: addl {{[0-9]+}}(%esp), %ecx
14 ; X86-NEXT: movl $-1, %eax
15 ; X86-NEXT: cmovael %ecx, %eax
16 ; X86-NEXT: retl
1617 ;
17 ; CHECK32-LABEL: func:
18 ; CHECK32: # %bb.0:
19 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
20 ; CHECK32-NEXT: addl {{[0-9]+}}(%esp), %ecx
21 ; CHECK32-NEXT: movl $-1, %eax
22 ; CHECK32-NEXT: cmovael %ecx, %eax
23 ; CHECK32-NEXT: retl
18 ; X64-LABEL: func:
19 ; X64: # %bb.0:
20 ; X64-NEXT: addl %esi, %edi
21 ; X64-NEXT: movl $-1, %eax
22 ; X64-NEXT: cmovael %edi, %eax
23 ; X64-NEXT: retq
2424 %tmp = call i32 @llvm.uadd.sat.i32(i32 %x, i32 %y);
2525 ret i32 %tmp;
2626 }
2727
28 define i64 @func2(i64 %x, i64 %y) {
29 ; CHECK-LABEL: func2:
30 ; CHECK: # %bb.0:
31 ; CHECK-NEXT: addq %rsi, %rdi
32 ; CHECK-NEXT: movq $-1, %rax
33 ; CHECK-NEXT: cmovaeq %rdi, %rax
34 ; CHECK-NEXT: retq
28 define i64 @func2(i64 %x, i64 %y) nounwind {
29 ; X86-LABEL: func2:
30 ; X86: # %bb.0:
31 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
32 ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
33 ; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
34 ; X86-NEXT: adcl {{[0-9]+}}(%esp), %edx
35 ; X86-NEXT: movl $-1, %ecx
36 ; X86-NEXT: cmovbl %ecx, %edx
37 ; X86-NEXT: cmovbl %ecx, %eax
38 ; X86-NEXT: retl
3539 ;
36 ; CHECK32-LABEL: func2:
37 ; CHECK32: # %bb.0:
38 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
39 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
40 ; CHECK32-NEXT: addl {{[0-9]+}}(%esp), %eax
41 ; CHECK32-NEXT: adcl {{[0-9]+}}(%esp), %edx
42 ; CHECK32-NEXT: movl $-1, %ecx
43 ; CHECK32-NEXT: cmovbl %ecx, %edx
44 ; CHECK32-NEXT: cmovbl %ecx, %eax
45 ; CHECK32-NEXT: retl
40 ; X64-LABEL: func2:
41 ; X64: # %bb.0:
42 ; X64-NEXT: addq %rsi, %rdi
43 ; X64-NEXT: movq $-1, %rax
44 ; X64-NEXT: cmovaeq %rdi, %rax
45 ; X64-NEXT: retq
4646 %tmp = call i64 @llvm.uadd.sat.i64(i64 %x, i64 %y);
4747 ret i64 %tmp;
4848 }
4949
50 define i4 @func3(i4 %x, i4 %y) {
51 ; CHECK-LABEL: func3:
52 ; CHECK: # %bb.0:
53 ; CHECK-NEXT: shlb $4, %sil
54 ; CHECK-NEXT: shlb $4, %dil
55 ; CHECK-NEXT: addb %sil, %dil
56 ; CHECK-NEXT: movb $-1, %al
57 ; CHECK-NEXT: jb .LBB2_2
58 ; CHECK-NEXT: # %bb.1:
59 ; CHECK-NEXT: movl %edi, %eax
60 ; CHECK-NEXT: .LBB2_2:
61 ; CHECK-NEXT: shrb $4, %al
62 ; CHECK-NEXT: retq
50 define i4 @func3(i4 %x, i4 %y) nounwind {
51 ; X86-LABEL: func3:
52 ; X86: # %bb.0:
53 ; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
54 ; X86-NEXT: movb {{[0-9]+}}(%esp), %al
55 ; X86-NEXT: shlb $4, %al
56 ; X86-NEXT: shlb $4, %cl
57 ; X86-NEXT: addb %al, %cl
58 ; X86-NEXT: movb $-1, %al
59 ; X86-NEXT: jb .LBB2_2
60 ; X86-NEXT: # %bb.1:
61 ; X86-NEXT: movl %ecx, %eax
62 ; X86-NEXT: .LBB2_2:
63 ; X86-NEXT: shrb $4, %al
64 ; X86-NEXT: retl
6365 ;
64 ; CHECK32-LABEL: func3:
65 ; CHECK32: # %bb.0:
66 ; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %cl
67 ; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %al
68 ; CHECK32-NEXT: shlb $4, %al
69 ; CHECK32-NEXT: shlb $4, %cl
70 ; CHECK32-NEXT: addb %al, %cl
71 ; CHECK32-NEXT: movb $-1, %al
72 ; CHECK32-NEXT: jb .LBB2_2
73 ; CHECK32-NEXT: # %bb.1:
74 ; CHECK32-NEXT: movl %ecx, %eax
75 ; CHECK32-NEXT: .LBB2_2:
76 ; CHECK32-NEXT: shrb $4, %al
77 ; CHECK32-NEXT: retl
66 ; X64-LABEL: func3:
67 ; X64: # %bb.0:
68 ; X64-NEXT: shlb $4, %sil
69 ; X64-NEXT: shlb $4, %dil
70 ; X64-NEXT: addb %sil, %dil
71 ; X64-NEXT: movb $-1, %al
72 ; X64-NEXT: jb .LBB2_2
73 ; X64-NEXT: # %bb.1:
74 ; X64-NEXT: movl %edi, %eax
75 ; X64-NEXT: .LBB2_2:
76 ; X64-NEXT: shrb $4, %al
77 ; X64-NEXT: retq
7878 %tmp = call i4 @llvm.uadd.sat.i4(i4 %x, i4 %y);
7979 ret i4 %tmp;
8080 }
8181
82 define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) {
83 ; CHECK-LABEL: vec:
84 ; CHECK: # %bb.0:
85 ; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm1[3,1,2,3]
86 ; CHECK-NEXT: movd %xmm2, %eax
87 ; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[3,1,2,3]
88 ; CHECK-NEXT: movd %xmm2, %ecx
89 ; CHECK-NEXT: addl %eax, %ecx
90 ; CHECK-NEXT: movl $-1, %eax
91 ; CHECK-NEXT: cmovbl %eax, %ecx
92 ; CHECK-NEXT: movd %ecx, %xmm2
93 ; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1]
94 ; CHECK-NEXT: movd %xmm3, %ecx
95 ; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,0,1]
96 ; CHECK-NEXT: movd %xmm3, %edx
97 ; CHECK-NEXT: addl %ecx, %edx
98 ; CHECK-NEXT: cmovbl %eax, %edx
99 ; CHECK-NEXT: movd %edx, %xmm3
100 ; CHECK-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
101 ; CHECK-NEXT: movd %xmm1, %ecx
102 ; CHECK-NEXT: movd %xmm0, %edx
103 ; CHECK-NEXT: addl %ecx, %edx
104 ; CHECK-NEXT: cmovbl %eax, %edx
105 ; CHECK-NEXT: movd %edx, %xmm2
106 ; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,2,3]
107 ; CHECK-NEXT: movd %xmm1, %ecx
108 ; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
109 ; CHECK-NEXT: movd %xmm0, %edx
110 ; CHECK-NEXT: addl %ecx, %edx
111 ; CHECK-NEXT: cmovbl %eax, %edx
112 ; CHECK-NEXT: movd %edx, %xmm0
113 ; CHECK-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
114 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
115 ; CHECK-NEXT: movdqa %xmm2, %xmm0
116 ; CHECK-NEXT: retq
82 define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
83 ; X86-LABEL: vec:
84 ; X86: # %bb.0:
85 ; X86-NEXT: pushl %ebx
86 ; X86-NEXT: pushl %edi
87 ; X86-NEXT: pushl %esi
88 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
89 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
90 ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
91 ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
92 ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
93 ; X86-NEXT: addl {{[0-9]+}}(%esp), %edi
94 ; X86-NEXT: movl $-1, %ebx
95 ; X86-NEXT: cmovbl %ebx, %edi
96 ; X86-NEXT: addl {{[0-9]+}}(%esp), %esi
97 ; X86-NEXT: cmovbl %ebx, %esi
98 ; X86-NEXT: addl {{[0-9]+}}(%esp), %edx
99 ; X86-NEXT: cmovbl %ebx, %edx
100 ; X86-NEXT: addl {{[0-9]+}}(%esp), %ecx
101 ; X86-NEXT: cmovbl %ebx, %ecx
102 ; X86-NEXT: movl %ecx, 12(%eax)
103 ; X86-NEXT: movl %edx, 8(%eax)
104 ; X86-NEXT: movl %esi, 4(%eax)
105 ; X86-NEXT: movl %edi, (%eax)
106 ; X86-NEXT: popl %esi
107 ; X86-NEXT: popl %edi
108 ; X86-NEXT: popl %ebx
109 ; X86-NEXT: retl $4
117110 ;
118 ; CHECK32-LABEL: vec:
119 ; CHECK32: # %bb.0:
120 ; CHECK32-NEXT: pushl %ebx
121 ; CHECK32-NEXT: .cfi_def_cfa_offset 8
122 ; CHECK32-NEXT: pushl %edi
123 ; CHECK32-NEXT: .cfi_def_cfa_offset 12
124 ; CHECK32-NEXT: pushl %esi
125 ; CHECK32-NEXT: .cfi_def_cfa_offset 16
126 ; CHECK32-NEXT: .cfi_offset %esi, -16
127 ; CHECK32-NEXT: .cfi_offset %edi, -12
128 ; CHECK32-NEXT: .cfi_offset %ebx, -8
129 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
130 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
131 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
132 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
133 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edi
134 ; CHECK32-NEXT: addl {{[0-9]+}}(%esp), %edi
135 ; CHECK32-NEXT: movl $-1, %ebx
136 ; CHECK32-NEXT: cmovbl %ebx, %edi
137 ; CHECK32-NEXT: addl {{[0-9]+}}(%esp), %esi
138 ; CHECK32-NEXT: cmovbl %ebx, %esi
139 ; CHECK32-NEXT: addl {{[0-9]+}}(%esp), %edx
140 ; CHECK32-NEXT: cmovbl %ebx, %edx
141 ; CHECK32-NEXT: addl {{[0-9]+}}(%esp), %ecx
142 ; CHECK32-NEXT: cmovbl %ebx, %ecx
143 ; CHECK32-NEXT: movl %ecx, 12(%eax)
144 ; CHECK32-NEXT: movl %edx, 8(%eax)
145 ; CHECK32-NEXT: movl %esi, 4(%eax)
146 ; CHECK32-NEXT: movl %edi, (%eax)
147 ; CHECK32-NEXT: popl %esi
148 ; CHECK32-NEXT: .cfi_def_cfa_offset 12
149 ; CHECK32-NEXT: popl %edi
150 ; CHECK32-NEXT: .cfi_def_cfa_offset 8
151 ; CHECK32-NEXT: popl %ebx
152 ; CHECK32-NEXT: .cfi_def_cfa_offset 4
153 ; CHECK32-NEXT: retl $4
111 ; X64-LABEL: vec:
112 ; X64: # %bb.0:
113 ; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm1[3,1,2,3]
114 ; X64-NEXT: movd %xmm2, %eax
115 ; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm0[3,1,2,3]
116 ; X64-NEXT: movd %xmm2, %ecx
117 ; X64-NEXT: addl %eax, %ecx
118 ; X64-NEXT: movl $-1, %eax
119 ; X64-NEXT: cmovbl %eax, %ecx
120 ; X64-NEXT: movd %ecx, %xmm2
121 ; X64-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1]
122 ; X64-NEXT: movd %xmm3, %ecx
123 ; X64-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,0,1]
124 ; X64-NEXT: movd %xmm3, %edx
125 ; X64-NEXT: addl %ecx, %edx
126 ; X64-NEXT: cmovbl %eax, %edx
127 ; X64-NEXT: movd %edx, %xmm3
128 ; X64-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
129 ; X64-NEXT: movd %xmm1, %ecx
130 ; X64-NEXT: movd %xmm0, %edx
131 ; X64-NEXT: addl %ecx, %edx
132 ; X64-NEXT: cmovbl %eax, %edx
133 ; X64-NEXT: movd %edx, %xmm2
134 ; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,2,3]
135 ; X64-NEXT: movd %xmm1, %ecx
136 ; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
137 ; X64-NEXT: movd %xmm0, %edx
138 ; X64-NEXT: addl %ecx, %edx
139 ; X64-NEXT: cmovbl %eax, %edx
140 ; X64-NEXT: movd %edx, %xmm0
141 ; X64-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
142 ; X64-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
143 ; X64-NEXT: movdqa %xmm2, %xmm0
144 ; X64-NEXT: retq
154145 %tmp = call <4 x i32> @llvm.uadd.sat.v4i32(<4 x i32> %x, <4 x i32> %y);
155146 ret <4 x i32> %tmp;
156147 }
0 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
1 ; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s
2 ; RUN: llc < %s -mcpu=generic -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=CHECK32
1 ; RUN: llc < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefixes=CHECK,X86
2 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefixes=CHECK,X64
33
44 declare i4 @llvm.usub.sat.i4 (i4, i4)
55 declare i32 @llvm.usub.sat.i32 (i32, i32)
66 declare i64 @llvm.usub.sat.i64 (i64, i64)
77 declare <4 x i32> @llvm.usub.sat.v4i32(<4 x i32>, <4 x i32>)
88
9 define i32 @func(i32 %x, i32 %y) {
10 ; CHECK-LABEL: func:
11 ; CHECK: # %bb.0:
12 ; CHECK-NEXT: xorl %eax, %eax
13 ; CHECK-NEXT: subl %esi, %edi
14 ; CHECK-NEXT: cmovael %edi, %eax
15 ; CHECK-NEXT: retq
9 define i32 @func(i32 %x, i32 %y) nounwind {
10 ; X86-LABEL: func:
11 ; X86: # %bb.0:
12 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
13 ; X86-NEXT: xorl %ecx, %ecx
14 ; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
15 ; X86-NEXT: cmovbl %ecx, %eax
16 ; X86-NEXT: retl
1617 ;
17 ; CHECK32-LABEL: func:
18 ; CHECK32: # %bb.0:
19 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
20 ; CHECK32-NEXT: xorl %ecx, %ecx
21 ; CHECK32-NEXT: subl {{[0-9]+}}(%esp), %eax
22 ; CHECK32-NEXT: cmovbl %ecx, %eax
23 ; CHECK32-NEXT: retl
18 ; X64-LABEL: func:
19 ; X64: # %bb.0:
20 ; X64-NEXT: xorl %eax, %eax
21 ; X64-NEXT: subl %esi, %edi
22 ; X64-NEXT: cmovael %edi, %eax
23 ; X64-NEXT: retq
2424 %tmp = call i32 @llvm.usub.sat.i32(i32 %x, i32 %y);
2525 ret i32 %tmp;
2626 }
2727
28 define i64 @func2(i64 %x, i64 %y) {
29 ; CHECK-LABEL: func2:
30 ; CHECK: # %bb.0:
31 ; CHECK-NEXT: xorl %eax, %eax
32 ; CHECK-NEXT: subq %rsi, %rdi
33 ; CHECK-NEXT: cmovaeq %rdi, %rax
34 ; CHECK-NEXT: retq
28 define i64 @func2(i64 %x, i64 %y) nounwind {
29 ; X86-LABEL: func2:
30 ; X86: # %bb.0:
31 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
32 ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
33 ; X86-NEXT: xorl %ecx, %ecx
34 ; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
35 ; X86-NEXT: sbbl {{[0-9]+}}(%esp), %edx
36 ; X86-NEXT: cmovbl %ecx, %edx
37 ; X86-NEXT: cmovbl %ecx, %eax
38 ; X86-NEXT: retl
3539 ;
36 ; CHECK32-LABEL: func2:
37 ; CHECK32: # %bb.0:
38 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
39 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
40 ; CHECK32-NEXT: xorl %ecx, %ecx
41 ; CHECK32-NEXT: subl {{[0-9]+}}(%esp), %eax
42 ; CHECK32-NEXT: sbbl {{[0-9]+}}(%esp), %edx
43 ; CHECK32-NEXT: cmovbl %ecx, %edx
44 ; CHECK32-NEXT: cmovbl %ecx, %eax
45 ; CHECK32-NEXT: retl
40 ; X64-LABEL: func2:
41 ; X64: # %bb.0:
42 ; X64-NEXT: xorl %eax, %eax
43 ; X64-NEXT: subq %rsi, %rdi
44 ; X64-NEXT: cmovaeq %rdi, %rax
45 ; X64-NEXT: retq
4646 %tmp = call i64 @llvm.usub.sat.i64(i64 %x, i64 %y);
4747 ret i64 %tmp;
4848 }
4949
50 define i4 @func3(i4 %x, i4 %y) {
51 ; CHECK-LABEL: func3:
52 ; CHECK: # %bb.0:
53 ; CHECK-NEXT: movl %edi, %eax
54 ; CHECK-NEXT: shlb $4, %sil
55 ; CHECK-NEXT: shlb $4, %al
56 ; CHECK-NEXT: subb %sil, %al
57 ; CHECK-NEXT: jae .LBB2_2
58 ; CHECK-NEXT: # %bb.1:
59 ; CHECK-NEXT: xorl %eax, %eax
60 ; CHECK-NEXT: .LBB2_2:
61 ; CHECK-NEXT: shrb $4, %al
62 ; CHECK-NEXT: # kill: def $al killed $al killed $eax
63 ; CHECK-NEXT: retq
50 define i4 @func3(i4 %x, i4 %y) nounwind {
51 ; X86-LABEL: func3:
52 ; X86: # %bb.0:
53 ; X86-NEXT: movb {{[0-9]+}}(%esp), %al
54 ; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
55 ; X86-NEXT: shlb $4, %cl
56 ; X86-NEXT: shlb $4, %al
57 ; X86-NEXT: subb %cl, %al
58 ; X86-NEXT: jae .LBB2_2
59 ; X86-NEXT: # %bb.1:
60 ; X86-NEXT: xorl %eax, %eax
61 ; X86-NEXT: .LBB2_2:
62 ; X86-NEXT: shrb $4, %al
63 ; X86-NEXT: # kill: def $al killed $al killed $eax
64 ; X86-NEXT: retl
6465 ;
65 ; CHECK32-LABEL: func3:
66 ; CHECK32: # %bb.0:
67 ; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %al
68 ; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %cl
69 ; CHECK32-NEXT: shlb $4, %cl
70 ; CHECK32-NEXT: shlb $4, %al
71 ; CHECK32-NEXT: subb %cl, %al
72 ; CHECK32-NEXT: jae .LBB2_2
73 ; CHECK32-NEXT: # %bb.1:
74 ; CHECK32-NEXT: xorl %eax, %eax
75 ; CHECK32-NEXT: .LBB2_2:
76 ; CHECK32-NEXT: shrb $4, %al
77 ; CHECK32-NEXT: # kill: def $al killed $al killed $eax
78 ; CHECK32-NEXT: retl
66 ; X64-LABEL: func3:
67 ; X64: # %bb.0:
68 ; X64-NEXT: movl %edi, %eax
69 ; X64-NEXT: shlb $4, %sil
70 ; X64-NEXT: shlb $4, %al
71 ; X64-NEXT: subb %sil, %al
72 ; X64-NEXT: jae .LBB2_2
73 ; X64-NEXT: # %bb.1:
74 ; X64-NEXT: xorl %eax, %eax
75 ; X64-NEXT: .LBB2_2:
76 ; X64-NEXT: shrb $4, %al
77 ; X64-NEXT: # kill: def $al killed $al killed $eax
78 ; X64-NEXT: retq
7979 %tmp = call i4 @llvm.usub.sat.i4(i4 %x, i4 %y);
8080 ret i4 %tmp;
8181 }
8282
83 define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) {
84 ; CHECK-LABEL: vec:
85 ; CHECK: # %bb.0:
86 ; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm1[3,1,2,3]
87 ; CHECK-NEXT: movd %xmm2, %eax
88 ; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[3,1,2,3]
89 ; CHECK-NEXT: movd %xmm2, %ecx
90 ; CHECK-NEXT: xorl %edx, %edx
91 ; CHECK-NEXT: subl %eax, %ecx
92 ; CHECK-NEXT: cmovbl %edx, %ecx
93 ; CHECK-NEXT: movd %ecx, %xmm2
94 ; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1]
95 ; CHECK-NEXT: movd %xmm3, %eax
96 ; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,0,1]
97 ; CHECK-NEXT: movd %xmm3, %ecx
98 ; CHECK-NEXT: subl %eax, %ecx
99 ; CHECK-NEXT: cmovbl %edx, %ecx
100 ; CHECK-NEXT: movd %ecx, %xmm3
101 ; CHECK-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
102 ; CHECK-NEXT: movd %xmm1, %eax
103 ; CHECK-NEXT: movd %xmm0, %ecx
104 ; CHECK-NEXT: subl %eax, %ecx
105 ; CHECK-NEXT: cmovbl %edx, %ecx
106 ; CHECK-NEXT: movd %ecx, %xmm2
107 ; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,2,3]
108 ; CHECK-NEXT: movd %xmm1, %eax
109 ; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
110 ; CHECK-NEXT: movd %xmm0, %ecx
111 ; CHECK-NEXT: subl %eax, %ecx
112 ; CHECK-NEXT: cmovbl %edx, %ecx
113 ; CHECK-NEXT: movd %ecx, %xmm0
114 ; CHECK-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
115 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
116 ; CHECK-NEXT: movdqa %xmm2, %xmm0
117 ; CHECK-NEXT: retq
83 define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
84 ; X86-LABEL: vec:
85 ; X86: # %bb.0:
86 ; X86-NEXT: pushl %ebx
87 ; X86-NEXT: pushl %edi
88 ; X86-NEXT: pushl %esi
89 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
90 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
91 ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
92 ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
93 ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
94 ; X86-NEXT: xorl %ebx, %ebx
95 ; X86-NEXT: subl {{[0-9]+}}(%esp), %edi
96 ; X86-NEXT: cmovbl %ebx, %edi
97 ; X86-NEXT: subl {{[0-9]+}}(%esp), %esi
98 ; X86-NEXT: cmovbl %ebx, %esi
99 ; X86-NEXT: subl {{[0-9]+}}(%esp), %edx
100 ; X86-NEXT: cmovbl %ebx, %edx
101 ; X86-NEXT: subl {{[0-9]+}}(%esp), %ecx
102 ; X86-NEXT: cmovbl %ebx, %ecx
103 ; X86-NEXT: movl %ecx, 12(%eax)
104 ; X86-NEXT: movl %edx, 8(%eax)
105 ; X86-NEXT: movl %esi, 4(%eax)
106 ; X86-NEXT: movl %edi, (%eax)
107 ; X86-NEXT: popl %esi
108 ; X86-NEXT: popl %edi
109 ; X86-NEXT: popl %ebx
110 ; X86-NEXT: retl $4
118111 ;
119 ; CHECK32-LABEL: vec:
120 ; CHECK32: # %bb.0:
121 ; CHECK32-NEXT: pushl %ebx
122 ; CHECK32-NEXT: .cfi_def_cfa_offset 8
123 ; CHECK32-NEXT: pushl %edi
124 ; CHECK32-NEXT: .cfi_def_cfa_offset 12
125 ; CHECK32-NEXT: pushl %esi
126 ; CHECK32-NEXT: .cfi_def_cfa_offset 16
127 ; CHECK32-NEXT: .cfi_offset %esi, -16
128 ; CHECK32-NEXT: .cfi_offset %edi, -12
129 ; CHECK32-NEXT: .cfi_offset %ebx, -8
130 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
131 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
132 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
133 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
134 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edi
135 ; CHECK32-NEXT: xorl %ebx, %ebx
136 ; CHECK32-NEXT: subl {{[0-9]+}}(%esp), %edi
137 ; CHECK32-NEXT: cmovbl %ebx, %edi
138 ; CHECK32-NEXT: subl {{[0-9]+}}(%esp), %esi
139 ; CHECK32-NEXT: cmovbl %ebx, %esi
140 ; CHECK32-NEXT: subl {{[0-9]+}}(%esp), %edx
141 ; CHECK32-NEXT: cmovbl %ebx, %edx
142 ; CHECK32-NEXT: subl {{[0-9]+}}(%esp), %ecx
143 ; CHECK32-NEXT: cmovbl %ebx, %ecx
144 ; CHECK32-NEXT: movl %ecx, 12(%eax)
145 ; CHECK32-NEXT: movl %edx, 8(%eax)
146 ; CHECK32-NEXT: movl %esi, 4(%eax)
147 ; CHECK32-NEXT: movl %edi, (%eax)
148 ; CHECK32-NEXT: popl %esi
149 ; CHECK32-NEXT: .cfi_def_cfa_offset 12
150 ; CHECK32-NEXT: popl %edi
151 ; CHECK32-NEXT: .cfi_def_cfa_offset 8
152 ; CHECK32-NEXT: popl %ebx
153 ; CHECK32-NEXT: .cfi_def_cfa_offset 4
154 ; CHECK32-NEXT: retl $4
112 ; X64-LABEL: vec:
113 ; X64: # %bb.0:
114 ; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm1[3,1,2,3]
115 ; X64-NEXT: movd %xmm2, %eax
116 ; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm0[3,1,2,3]
117 ; X64-NEXT: movd %xmm2, %ecx
118 ; X64-NEXT: xorl %edx, %edx
119 ; X64-NEXT: subl %eax, %ecx
120 ; X64-NEXT: cmovbl %edx, %ecx
121 ; X64-NEXT: movd %ecx, %xmm2
122 ; X64-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1]
123 ; X64-NEXT: movd %xmm3, %eax
124 ; X64-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,0,1]
125 ; X64-NEXT: movd %xmm3, %ecx
126 ; X64-NEXT: subl %eax, %ecx
127 ; X64-NEXT: cmovbl %edx, %ecx
128 ; X64-NEXT: movd %ecx, %xmm3
129 ; X64-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
130 ; X64-NEXT: movd %xmm1, %eax
131 ; X64-NEXT: movd %xmm0, %ecx
132 ; X64-NEXT: subl %eax, %ecx
133 ; X64-NEXT: cmovbl %edx, %ecx
134 ; X64-NEXT: movd %ecx, %xmm2
135 ; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,2,3]
136 ; X64-NEXT: movd %xmm1, %eax
137 ; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
138 ; X64-NEXT: movd %xmm0, %ecx
139 ; X64-NEXT: subl %eax, %ecx
140 ; X64-NEXT: cmovbl %edx, %ecx
141 ; X64-NEXT: movd %ecx, %xmm0
142 ; X64-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
143 ; X64-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
144 ; X64-NEXT: movdqa %xmm2, %xmm0
145 ; X64-NEXT: retq
155146 %tmp = call <4 x i32> @llvm.usub.sat.v4i32(<4 x i32> %x, <4 x i32> %y);
156147 ret <4 x i32> %tmp;
157148 }