llvm.org GIT mirror llvm / f5ade5d
Add support for the R and Q constraints. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137217 91177308-0d34-0410-b5e6-96231b3b80d8 Rafael Espindola 8 years ago
2 changed file(s) with 39 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
468468
469469 return false;
470470 }
471 case 'R': // The most significant register of a pair.
472 case 'Q': { // The least significant register of a pair.
473 if (OpNum == 0)
474 return true;
475 const MachineOperand &FlagsOP = MI->getOperand(OpNum - 1);
476 if (!FlagsOP.isImm())
477 return true;
478 unsigned Flags = FlagsOP.getImm();
479 unsigned NumVals = InlineAsm::getNumOperandRegisters(Flags);
480 if (NumVals != 2)
481 return true;
482 unsigned RegOp = ExtraCode[0] == 'Q' ? OpNum : OpNum + 1;
483 if (RegOp >= MI->getNumOperands())
484 return true;
485 const MachineOperand &MO = MI->getOperand(RegOp);
486 if (!MO.isReg())
487 return true;
488 unsigned Reg = MO.getReg();
489 O << ARMInstPrinter::getRegisterName(Reg);
490 return false;
491 }
492
471493 // These modifiers are not yet supported.
472494 case 'p': // The high single-precision register of a VFP double-precision
473495 // register.
474496 case 'e': // The low doubleword register of a NEON quad register.
475497 case 'f': // The high doubleword register of a NEON quad register.
476498 case 'h': // A range of VFP/NEON registers suitable for VLD1/VST1.
477 case 'Q': // The least significant register of a pair.
478 case 'R': // The most significant register of a pair.
479499 case 'H': // The highest-numbered register of a pair.
480500 return true;
481501 }
0 ; RUN: llc < %s -march=arm | FileCheck %s
1
2 define double @f(double %x) {
3 entry:
4 %0 = tail call double asm "mov ${0:R}, #4\0A", "=&r"()
5 ret double %0
6 ; CHECK: f:
7 ; CHECK: mov r1, #4
8 }
9
10 define double @g(double %x) {
11 entry:
12 %0 = tail call double asm "mov ${0:Q}, #4\0A", "=&r"()
13 ret double %0
14 ; CHECK: g:
15 ; CHECK: mov r0, #4
16 }