llvm.org GIT mirror llvm / f548d5a
[X86] In combineStore, don't convert v2f32 load/store pairs to f64 loads/stores. Type legalization can take care of this. This gives DAG combine a little more time with the original types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366182 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 2 months ago
1 changed file(s) with 2 addition(s) and 3 deletion(s). Raw diff Collapse all Expand all
4009240092 bool NoImplicitFloatOps = F.hasFnAttribute(Attribute::NoImplicitFloat);
4009340093 bool F64IsLegal =
4009440094 !Subtarget.useSoftFloat() && !NoImplicitFloatOps && Subtarget.hasSSE2();
40095 if ((VT.isVector() ||
40095 if (((VT.isVector() && !VT.isFloatingPoint()) ||
4009640096 (VT == MVT::i64 && F64IsLegal && !Subtarget.is64Bit())) &&
4009740097 isa(St->getValue()) &&
4009840098 !cast(St->getValue())->isVolatile() &&
4011540115 // Otherwise, if it's legal to use f64 SSE instructions, use f64 load/store
4011640116 // pair instead.
4011740117 if (Subtarget.is64Bit() || F64IsLegal) {
40118 MVT LdVT = (Subtarget.is64Bit() &&
40119 (!VT.isFloatingPoint() || !F64IsLegal)) ? MVT::i64 : MVT::f64;
40118 MVT LdVT = Subtarget.is64Bit() ? MVT::i64 : MVT::f64;
4012040119 SDValue NewLd = DAG.getLoad(LdVT, LdDL, Ld->getChain(), Ld->getBasePtr(),
4012140120 Ld->getMemOperand());
4012240121