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Merging r227584: ------------------------------------------------------------------------ r227584 | compnerd | 2015-01-30 09:58:25 -0800 (Fri, 30 Jan 2015) | 10 lines ARM: correct handling of .fpu directive The FPU directive permits the user to switch the target FPU, enabling instructions that would be otherwise unavailable. However, when configuring the new subtarget features, we would not enable the implied functions for newer FPUs. This would result in invalid rejection of valid input. Ensure that we inherit the implied FPU functionality when enabling newer versions of the FPU. Fortunately, these are mostly hierarchical, unlike the CPUs. Addresses PR22395. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_36@227637 91177308-0d34-0410-b5e6-96231b3b80d8 Hans Wennborg 5 years ago
2 changed file(s) with 98 addition(s) and 23 deletion(s). Raw diff Collapse all Expand all
91909190 // FIXME: This is duplicated in getARMFPUFeatures() in
91919191 // tools/clang/lib/Driver/Tools.cpp
91929192 static const struct {
9193 const unsigned Fpu;
9193 const unsigned ID;
91949194 const uint64_t Enabled;
91959195 const uint64_t Disabled;
9196 } Fpus[] = {
9197 {ARM::VFP, ARM::FeatureVFP2, ARM::FeatureNEON},
9198 {ARM::VFPV2, ARM::FeatureVFP2, ARM::FeatureNEON},
9199 {ARM::VFPV3, ARM::FeatureVFP3, ARM::FeatureNEON},
9200 {ARM::VFPV3_D16, ARM::FeatureVFP3 | ARM::FeatureD16, ARM::FeatureNEON},
9201 {ARM::VFPV4, ARM::FeatureVFP4, ARM::FeatureNEON},
9202 {ARM::VFPV4_D16, ARM::FeatureVFP4 | ARM::FeatureD16, ARM::FeatureNEON},
9203 {ARM::FPV5_D16, ARM::FeatureFPARMv8 | ARM::FeatureD16,
9204 ARM::FeatureNEON | ARM::FeatureCrypto},
9205 {ARM::FP_ARMV8, ARM::FeatureFPARMv8,
9206 ARM::FeatureNEON | ARM::FeatureCrypto},
9207 {ARM::NEON, ARM::FeatureNEON, 0},
9208 {ARM::NEON_VFPV4, ARM::FeatureVFP4 | ARM::FeatureNEON, 0},
9209 {ARM::NEON_FP_ARMV8, ARM::FeatureFPARMv8 | ARM::FeatureNEON,
9210 ARM::FeatureCrypto},
9211 {ARM::CRYPTO_NEON_FP_ARMV8,
9212 ARM::FeatureFPARMv8 | ARM::FeatureNEON | ARM::FeatureCrypto, 0},
9213 {ARM::SOFTVFP, 0, 0},
9196 } FPUs[] = {
9197 {ARM::VFP, ARM::FeatureVFP2, ARM::FeatureNEON},
9198 {ARM::VFPV2, ARM::FeatureVFP2, ARM::FeatureNEON},
9199 {ARM::VFPV3, ARM::FeatureVFP2 | ARM::FeatureVFP3, ARM::FeatureNEON},
9200 {ARM::VFPV3_D16, ARM::FeatureVFP2 | ARM::FeatureVFP3 | ARM::FeatureD16,
9201 ARM::FeatureNEON},
9202 {ARM::VFPV4, ARM::FeatureVFP2 | ARM::FeatureVFP3 | ARM::FeatureVFP4,
9203 ARM::FeatureNEON},
9204 {ARM::VFPV4_D16,
9205 ARM::FeatureVFP2 | ARM::FeatureVFP3 | ARM::FeatureVFP4 | ARM::FeatureD16,
9206 ARM::FeatureNEON},
9207 {ARM::FPV5_D16, ARM::FeatureVFP2 | ARM::FeatureVFP3 | ARM::FeatureVFP4 |
9208 ARM::FeatureFPARMv8 | ARM::FeatureD16,
9209 ARM::FeatureNEON | ARM::FeatureCrypto},
9210 {ARM::FP_ARMV8, ARM::FeatureVFP2 | ARM::FeatureVFP3 | ARM::FeatureVFP4 |
9211 ARM::FeatureFPARMv8,
9212 ARM::FeatureNEON | ARM::FeatureCrypto},
9213 {ARM::NEON, ARM::FeatureVFP2 | ARM::FeatureVFP3 | ARM::FeatureNEON, 0},
9214 {ARM::NEON_VFPV4,
9215 ARM::FeatureVFP2 | ARM::FeatureVFP3 | ARM::FeatureVFP4 | ARM::FeatureNEON,
9216 0},
9217 {ARM::NEON_FP_ARMV8,
9218 ARM::FeatureVFP2 | ARM::FeatureVFP3 | ARM::FeatureVFP4 |
9219 ARM::FeatureFPARMv8 | ARM::FeatureNEON,
9220 ARM::FeatureCrypto},
9221 {ARM::CRYPTO_NEON_FP_ARMV8,
9222 ARM::FeatureVFP2 | ARM::FeatureVFP3 | ARM::FeatureVFP4 |
9223 ARM::FeatureFPARMv8 | ARM::FeatureNEON | ARM::FeatureCrypto,
9224 0},
9225 {ARM::SOFTVFP, 0, 0},
92149226 };
92159227
92169228 /// parseDirectiveFPU
92289240 return false;
92299241 }
92309242
9231 for (const auto &Fpu : Fpus) {
9232 if (Fpu.Fpu != ID)
9243 for (const auto &Entry : FPUs) {
9244 if (Entry.ID != ID)
92339245 continue;
92349246
92359247 // Need to toggle features that should be on but are off and that
92369248 // should off but are on.
9237 uint64_t Toggle = (Fpu.Enabled & ~STI.getFeatureBits()) |
9238 (Fpu.Disabled & STI.getFeatureBits());
9249 uint64_t Toggle = (Entry.Enabled & ~STI.getFeatureBits()) |
9250 (Entry.Disabled & STI.getFeatureBits());
92399251 setAvailableFeatures(ComputeAvailableFeatures(STI.ToggleFeature(Toggle)));
92409252 break;
92419253 }
0 @ RUN: llvm-mc -triple armv4t-eabi -filetype asm -o - %s 2>&1 | FileCheck %s
1
2 .text
3 .thumb
4
5 .p2align 2
6
7 .fpu neon
8 vldmia r0, {d16-d31}
9
10 @ CHECK: vldmia r0, {d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31}
11 @ CHECK-NOT: error: instruction requires: VFP2
12
13 .fpu vfpv3
14 vadd.f32 s1, s2, s3
15 @ CHECK: vadd.f32 s1, s2, s3
16 @ CHECK-NOT: error: instruction requires: VPF2
17
18 .fpu vfpv3-d16
19 vadd.f32 s1, s2, s3
20 @ CHECK: vadd.f32 s1, s2, s3
21 @ CHECK-NOT: error: instruction requires: VPF2
22
23 .fpu vfpv4
24 vadd.f32 s1, s2, s3
25 @ CHECK: vadd.f32 s1, s2, s3
26 @ CHECK-NOT: error: instruction requires: VPF2
27
28 .fpu vfpv4-d16
29 vadd.f32 s1, s2, s3
30 @ CHECK: vadd.f32 s1, s2, s3
31 @ CHECK-NOT: error: instruction requires: VPF2
32
33 .fpu fpv5-d16
34 vadd.f32 s1, s2, s3
35 @ CHECK: vadd.f32 s1, s2, s3
36 @ CHECK-NOT: error: instruction requires: VPF2
37
38 .fpu fp-armv8
39 vadd.f32 s1, s2, s3
40 @ CHECK: vadd.f32 s1, s2, s3
41 @ CHECK-NOT: error: instruction requires: VPF2
42
43 .fpu fp-armv8
44 vadd.f32 s1, s2, s3
45 @ CHECK: vadd.f32 s1, s2, s3
46 @ CHECK-NOT: error: instruction requires: VPF2
47
48 .fpu neon
49 vadd.f32 s1, s2, s3
50 @ CHECK: vadd.f32 s1, s2, s3
51 @ CHECK-NOT: error: instruction requires: VPF2
52
53 .fpu neon-vfpv4
54 vadd.f32 s1, s2, s3
55 @ CHECK: vadd.f32 s1, s2, s3
56 @ CHECK-NOT: error: instruction requires: VPF2
57
58 .fpu crypto-neon-fp-armv8
59 vadd.f32 s1, s2, s3
60 @ CHECK: vadd.f32 s1, s2, s3
61 @ CHECK-NOT: error: instruction requires: VPF2
62