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[X86][SSE] Combine (VSRLI (VSRAI X, Y), (NumSignBits-1)) -> (VSRLI X, (NumSignBits-1)) Part 3 of 3. Differential Revision: https://reviews.llvm.org/D31347 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298782 91177308-0d34-0410-b5e6-96231b3b80d8 Simon Pilgrim 3 years ago
2 changed file(s) with 9 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
3107431074 bool LogicalShift = X86ISD::VSHLI == Opcode || X86ISD::VSRLI == Opcode;
3107531075 EVT VT = N->getValueType(0);
3107631076 SDValue N0 = N->getOperand(0);
31077 SDValue N1 = N->getOperand(1);
3107731078 unsigned NumBitsPerElt = VT.getScalarSizeInBits();
3107831079 assert(VT == N0.getValueType() && (NumBitsPerElt % 8) == 0 &&
3107931080 "Unexpected value type");
3108031081
3108131082 // Out of range logical bit shifts are guaranteed to be zero.
3108231083 // Out of range arithmetic bit shifts splat the sign bit.
31083 APInt ShiftVal = cast(N->getOperand(1))->getAPIntValue();
31084 APInt ShiftVal = cast(N1)->getAPIntValue();
3108431085 if (ShiftVal.zextOrTrunc(8).uge(NumBitsPerElt)) {
3108531086 if (LogicalShift)
3108631087 return getZeroVector(VT.getSimpleVT(), Subtarget, DAG, SDLoc(N));
3109531096 // Shift zero -> zero.
3109631097 if (ISD::isBuildVectorAllZeros(N0.getNode()))
3109731098 return getZeroVector(VT.getSimpleVT(), Subtarget, DAG, SDLoc(N));
31099
31100 // fold (VSRLI (VSRAI X, Y), 31) -> (VSRLI X, 31).
31101 // This VSRLI only looks at the sign bit, which is unmodified by VSRAI.
31102 // TODO - support other sra opcodes as needed.
31103 if (Opcode == X86ISD::VSRLI && (ShiftVal + 1) == NumBitsPerElt &&
31104 N0.getOpcode() == X86ISD::VSRAI)
31105 return DAG.getNode(X86ISD::VSRLI, SDLoc(N), VT, N0.getOperand(0), N1);
3109831106
3109931107 // We can decode 'whole byte' logical bit shifts as shuffles.
3110031108 if (LogicalShift && (ShiftVal.getZExtValue() % 8) == 0) {
252252 define <8 x i16> @ashr_mask1_v8i16(<8 x i16> %a0) {
253253 ; CHECK-LABEL: ashr_mask1_v8i16:
254254 ; CHECK: # BB#0:
255 ; CHECK-NEXT: psraw $15, %xmm0
256255 ; CHECK-NEXT: psrlw $15, %xmm0
257256 ; CHECK-NEXT: retq
258257 %1 = ashr <8 x i16> %a0,