llvm.org GIT mirror llvm / f4646d9
Added sse test patterns for r62979 and r63193. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63194 91177308-0d34-0410-b5e6-96231b3b80d8 Mon P Wang 11 years ago
4 changed file(s) with 254 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
0 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx -o %t -f
1 ; RUN: grep psllq %t | count 2
2 ; RUN: grep pslld %t | count 2
3 ; RUN: grep psllw %t | count 2
4
5 ; test vector shifts converted to proper SSE2 vector shifts when the shift
6 ; amounts are the same.
7
8 define void @shift1a(<2 x i64> %val, <2 x i64>* %dst) nounwind {
9 entry:
10 %shl = shl <2 x i64> %val, < i64 32, i64 32 >
11 store <2 x i64> %shl, <2 x i64>* %dst
12 ret void
13 }
14
15 define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, i64 %amt) nounwind {
16 entry:
17 %0 = insertelement <2 x i64> undef, i64 %amt, i32 0
18 %1 = insertelement <2 x i64> %0, i64 %amt, i32 1
19 %shl = shl <2 x i64> %val, %1
20 store <2 x i64> %shl, <2 x i64>* %dst
21 ret void
22 }
23
24
25 define void @shift2a(<4 x i32> %val, <4 x i32>* %dst) nounwind {
26 entry:
27 %shl = shl <4 x i32> %val, < i32 5, i32 5, i32 5, i32 5 >
28 store <4 x i32> %shl, <4 x i32>* %dst
29 ret void
30 }
31
32 define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind {
33 entry:
34 %0 = insertelement <4 x i32> undef, i32 %amt, i32 0
35 %1 = insertelement <4 x i32> %0, i32 %amt, i32 1
36 %2 = insertelement <4 x i32> %1, i32 %amt, i32 2
37 %3 = insertelement <4 x i32> %2, i32 %amt, i32 3
38 %shl = shl <4 x i32> %val, %3
39 store <4 x i32> %shl, <4 x i32>* %dst
40 ret void
41 }
42
43 define void @shift3a(<8 x i16> %val, <8 x i16>* %dst) nounwind {
44 entry:
45 %shl = shl <8 x i16> %val, < i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5 >
46 store <8 x i16> %shl, <8 x i16>* %dst
47 ret void
48 }
49
50 define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind {
51 entry:
52 %0 = insertelement <8 x i16> undef, i16 %amt, i32 0
53 %1 = insertelement <8 x i16> %0, i16 %amt, i32 1
54 %2 = insertelement <8 x i16> %0, i16 %amt, i32 2
55 %3 = insertelement <8 x i16> %0, i16 %amt, i32 3
56 %4 = insertelement <8 x i16> %0, i16 %amt, i32 4
57 %5 = insertelement <8 x i16> %0, i16 %amt, i32 5
58 %6 = insertelement <8 x i16> %0, i16 %amt, i32 6
59 %7 = insertelement <8 x i16> %0, i16 %amt, i32 7
60 %shl = shl <8 x i16> %val, %7
61 store <8 x i16> %shl, <8 x i16>* %dst
62 ret void
63 }
64
0 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx -o %t -f
1 ; RUN: grep psrlq %t | count 2
2 ; RUN: grep psrld %t | count 2
3 ; RUN: grep psrlw %t | count 2
4
5 ; test vector shifts converted to proper SSE2 vector shifts when the shift
6 ; amounts are the same.
7
8 define void @shift1a(<2 x i64> %val, <2 x i64>* %dst) nounwind {
9 entry:
10 %lshr = lshr <2 x i64> %val, < i64 32, i64 32 >
11 store <2 x i64> %lshr, <2 x i64>* %dst
12 ret void
13 }
14
15 define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, i64 %amt) nounwind {
16 entry:
17 %0 = insertelement <2 x i64> undef, i64 %amt, i32 0
18 %1 = insertelement <2 x i64> %0, i64 %amt, i32 1
19 %lshr = lshr <2 x i64> %val, %1
20 store <2 x i64> %lshr, <2 x i64>* %dst
21 ret void
22 }
23
24 define void @shift2a(<4 x i32> %val, <4 x i32>* %dst) nounwind {
25 entry:
26 %lshr = lshr <4 x i32> %val, < i32 17, i32 17, i32 17, i32 17 >
27 store <4 x i32> %lshr, <4 x i32>* %dst
28 ret void
29 }
30
31 define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind {
32 entry:
33 %0 = insertelement <4 x i32> undef, i32 %amt, i32 0
34 %1 = insertelement <4 x i32> %0, i32 %amt, i32 1
35 %2 = insertelement <4 x i32> %1, i32 %amt, i32 2
36 %3 = insertelement <4 x i32> %2, i32 %amt, i32 3
37 %lshr = lshr <4 x i32> %val, %3
38 store <4 x i32> %lshr, <4 x i32>* %dst
39 ret void
40 }
41
42
43 define void @shift3a(<8 x i16> %val, <8 x i16>* %dst) nounwind {
44 entry:
45 %lshr = lshr <8 x i16> %val, < i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5 >
46 store <8 x i16> %lshr, <8 x i16>* %dst
47 ret void
48 }
49
50 define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind {
51 entry:
52 %0 = insertelement <8 x i16> undef, i16 %amt, i32 0
53 %1 = insertelement <8 x i16> %0, i16 %amt, i32 1
54 %2 = insertelement <8 x i16> %0, i16 %amt, i32 2
55 %3 = insertelement <8 x i16> %0, i16 %amt, i32 3
56 %4 = insertelement <8 x i16> %0, i16 %amt, i32 4
57 %5 = insertelement <8 x i16> %0, i16 %amt, i32 5
58 %6 = insertelement <8 x i16> %0, i16 %amt, i32 6
59 %7 = insertelement <8 x i16> %0, i16 %amt, i32 7
60 %lshr = lshr <8 x i16> %val, %7
61 store <8 x i16> %lshr, <8 x i16>* %dst
62 ret void
63 }
0 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx -o %t -f
1 ; RUN: grep psrad %t | count 2
2 ; RUN: grep psraw %t | count 2
3
4 ; test vector shifts converted to proper SSE2 vector shifts when the shift
5 ; amounts are the same.
6
7 ; Note that x86 does have ashr
8 define void @shift1a(<2 x i64> %val, <2 x i64>* %dst) nounwind {
9 entry:
10 %ashr = ashr <2 x i64> %val, < i64 32, i64 32 >
11 store <2 x i64> %ashr, <2 x i64>* %dst
12 ret void
13 }
14
15 define void @shift2a(<4 x i32> %val, <4 x i32>* %dst) nounwind {
16 entry:
17 %ashr = ashr <4 x i32> %val, < i32 5, i32 5, i32 5, i32 5 >
18 store <4 x i32> %ashr, <4 x i32>* %dst
19 ret void
20 }
21
22 define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind {
23 entry:
24 %0 = insertelement <4 x i32> undef, i32 %amt, i32 0
25 %1 = insertelement <4 x i32> %0, i32 %amt, i32 1
26 %2 = insertelement <4 x i32> %1, i32 %amt, i32 2
27 %3 = insertelement <4 x i32> %2, i32 %amt, i32 3
28 %ashr = ashr <4 x i32> %val, %3
29 store <4 x i32> %ashr, <4 x i32>* %dst
30 ret void
31 }
32
33 define void @shift3a(<8 x i16> %val, <8 x i16>* %dst) nounwind {
34 entry:
35 %ashr = ashr <8 x i16> %val, < i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5 >
36 store <8 x i16> %ashr, <8 x i16>* %dst
37 ret void
38 }
39
40 define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind {
41 entry:
42 %0 = insertelement <8 x i16> undef, i16 %amt, i32 0
43 %1 = insertelement <8 x i16> %0, i16 %amt, i32 1
44 %2 = insertelement <8 x i16> %0, i16 %amt, i32 2
45 %3 = insertelement <8 x i16> %0, i16 %amt, i32 3
46 %4 = insertelement <8 x i16> %0, i16 %amt, i32 4
47 %5 = insertelement <8 x i16> %0, i16 %amt, i32 5
48 %6 = insertelement <8 x i16> %0, i16 %amt, i32 6
49 %7 = insertelement <8 x i16> %0, i16 %amt, i32 7
50 %ashr = ashr <8 x i16> %val, %7
51 store <8 x i16> %ashr, <8 x i16>* %dst
52 ret void
53 }
0 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx -o %t -f
1 ; RUN: grep psllq %t | count 1
2 ; RUN: grep pslld %t | count 3
3 ; RUN: grep psllw %t | count 2
4
5 ; test vector shifts converted to proper SSE2 vector shifts when the shift
6 ; amounts are the same when using a shuffle splat.
7
8 define void @shift1a(<2 x i64> %val, <2 x i64>* %dst, <2 x i64> %sh) nounwind {
9 entry:
10 %shamt = shufflevector <2 x i64> %sh, <2 x i64> undef, <2 x i32>
11 %shl = shl <2 x i64> %val, %shamt
12 store <2 x i64> %shl, <2 x i64>* %dst
13 ret void
14 }
15
16 define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, <2 x i64> %sh) nounwind {
17 entry:
18 %shamt = shufflevector <2 x i64> %sh, <2 x i64> undef, <2 x i32>
19 %shl = shl <2 x i64> %val, %shamt
20 store <2 x i64> %shl, <2 x i64>* %dst
21 ret void
22 }
23
24 define void @shift2a(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind {
25 entry:
26 %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32>
27 %shl = shl <4 x i32> %val, %shamt
28 store <4 x i32> %shl, <4 x i32>* %dst
29 ret void
30 }
31
32 define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind {
33 entry:
34 %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32>
35 %shl = shl <4 x i32> %val, %shamt
36 store <4 x i32> %shl, <4 x i32>* %dst
37 ret void
38 }
39
40 define void @shift2c(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind {
41 entry:
42 %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32>
43 %shl = shl <4 x i32> %val, %shamt
44 store <4 x i32> %shl, <4 x i32>* %dst
45 ret void
46 }
47
48 define void @shift3a(<8 x i16> %val, <8 x i16>* %dst, <8 x i16> %amt) nounwind {
49 entry:
50 %shamt = shufflevector <8 x i16> %amt, <8 x i16> undef, <8 x i32>
51 %shl = shl <8 x i16> %val, %shamt
52 store <8 x i16> %shl, <8 x i16>* %dst
53 ret void
54 }
55
56 define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind {
57 entry:
58 %0 = insertelement <8 x i16> undef, i16 %amt, i32 0
59 %1 = insertelement <8 x i16> %0, i16 %amt, i32 1
60 %2 = insertelement <8 x i16> %0, i16 %amt, i32 2
61 %3 = insertelement <8 x i16> %0, i16 %amt, i32 3
62 %4 = insertelement <8 x i16> %0, i16 %amt, i32 4
63 %5 = insertelement <8 x i16> %0, i16 %amt, i32 5
64 %6 = insertelement <8 x i16> %0, i16 %amt, i32 6
65 %7 = insertelement <8 x i16> %0, i16 %amt, i32 7
66 %shl = shl <8 x i16> %val, %7
67 store <8 x i16> %shl, <8 x i16>* %dst
68 ret void
69 }
70