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AMDGPU/GlobalISel: Define instruction mapping for G_FMUL git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326532 91177308-0d34-0410-b5e6-96231b3b80d8 Matt Arsenault 2 years ago
2 changed file(s) with 70 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
292292 // Fall-through
293293
294294 case AMDGPU::G_FADD:
295 case AMDGPU::G_FMUL:
295296 return getDefaultMappingVOP(MI);
296297 case AMDGPU::G_IMPLICIT_DEF: {
297298 unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits();
0 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
1 # RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -global-isel %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
2 # RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -global-isel %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
3
4 ---
5 name: fmul_ss
6 legalized: true
7
8 body: |
9 bb.0:
10 liveins: $sgpr0, $sgpr1
11 ; CHECK-LABEL: name: fmul_ss
12 ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
13 ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
14 ; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
15 ; CHECK: [[FMUL:%[0-9]+]]:vgpr(s32) = G_FMUL [[COPY]], [[COPY2]]
16 %0:_(s32) = COPY $sgpr0
17 %1:_(s32) = COPY $sgpr1
18 %2:_(s32) = G_FMUL %0, %1
19 ...
20
21 ---
22 name: fmul_sv
23 legalized: true
24
25 body: |
26 bb.0:
27 liveins: $sgpr0, $vgpr0
28 ; CHECK-LABEL: name: fmul_sv
29 ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
30 ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
31 ; CHECK: [[FMUL:%[0-9]+]]:vgpr(s32) = G_FMUL [[COPY]], [[COPY1]]
32 %0:_(s32) = COPY $sgpr0
33 %1:_(s32) = COPY $vgpr0
34 %2:_(s32) = G_FMUL %0, %1
35 ...
36
37 ---
38 name: fmul_vs
39 legalized: true
40
41 body: |
42 bb.0:
43 liveins: $sgpr0, $vgpr0
44 ; CHECK-LABEL: name: fmul_vs
45 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
46 ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
47 ; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
48 ; CHECK: [[FMUL:%[0-9]+]]:vgpr(s32) = G_FMUL [[COPY]], [[COPY2]]
49 %0:_(s32) = COPY $vgpr0
50 %1:_(s32) = COPY $sgpr0
51 %2:_(s32) = G_FMUL %0, %1
52 ...
53
54 ---
55 name: fmul_vv
56 legalized: true
57
58 body: |
59 bb.0:
60 liveins: $vgpr0, $vgpr1
61 ; CHECK-LABEL: name: fmul_vv
62 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
63 ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
64 ; CHECK: [[FMUL:%[0-9]+]]:vgpr(s32) = G_FMUL [[COPY]], [[COPY1]]
65 %0:_(s32) = COPY $vgpr0
66 %1:_(s32) = COPY $vgpr1
67 %2:_(s32) = G_FMUL %0, %1
68 ...