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[Disasm][AVX512] Implement decoding of top bit for non-destructive reg fields V' bit in the P2 byte of the EVEX prefix provides the top bit of the NDD and NDS register fields. This was simply not used in the decoder until now. Fixes <rdar://problem/17402661> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211565 91177308-0d34-0410-b5e6-96231b3b80d8 Adam Nemet 6 years ago
2 changed file(s) with 8 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
16191619
16201620 int vvvv;
16211621 if (insn->vectorExtensionType == TYPE_EVEX)
1622 vvvv = vvvvFromEVEX3of4(insn->vectorExtensionPrefix[2]);
1622 vvvv = (v2FromEVEX4of4(insn->vectorExtensionPrefix[3]) << 4 |
1623 vvvvFromEVEX3of4(insn->vectorExtensionPrefix[2]));
16231624 else if (insn->vectorExtensionType == TYPE_VEX_3B)
16241625 vvvv = vvvvFromVEX3of3(insn->vectorExtensionPrefix[2]);
16251626 else if (insn->vectorExtensionType == TYPE_VEX_2B)
3838 # CHECK: vgatherdpd (%rsi,%ymm0,4), %zmm1 {%k2}
3939 0x62 0xf2 0xfd 0x4a 0x92 0x0c 0x86
4040
41 # CHECK: vpslld $16, %zmm21, %zmm22
42 0x62 0xb1 0x4d 0x40 0x72 0xf5 0x10
43
44 # CHECK: vpord %zmm22, %zmm21, %zmm23
45 0x62 0xa1 0x55 0x40 0xeb 0xfe
46
4147 #####################################################
4248 # MASK INSTRUCTIONS #
4349 #####################################################