llvm.org GIT mirror llvm / f29cc18
Make TargetLowering::getPointerTy() taking DataLayout as an argument Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: jholewinski, ted, yaron.keren, rafael, llvm-commits Differential Revision: http://reviews.llvm.org/D11028 From: Mehdi Amini <mehdi.amini@apple.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241775 91177308-0d34-0410-b5e6-96231b3b80d8 Mehdi Amini 5 years ago
72 changed file(s) with 1588 addition(s) and 1346 deletion(s). Raw diff Collapse all Expand all
9393 explicit BasicTTIImplBase(const TargetMachine *TM, const DataLayout &DL)
9494 : BaseT(DL) {}
9595
96 using TargetTransformInfoImplBase::DL;
97
9698 public:
9799 // Provide value semantics. MSVC requires that we spell all of these out.
98100 BasicTTIImplBase(const BasicTTIImplBase &Arg)
145147 }
146148
147149 bool isTypeLegal(Type *Ty) {
148 EVT VT = getTLI()->getValueType(Ty);
150 EVT VT = getTLI()->getValueType(DL, Ty);
149151 return getTLI()->isTypeLegal(VT);
150152 }
151153
183185
184186 bool haveFastSqrt(Type *Ty) {
185187 const TargetLoweringBase *TLI = getTLI();
186 EVT VT = TLI->getValueType(Ty);
188 EVT VT = TLI->getValueType(DL, Ty);
187189 return TLI->isTypeLegal(VT) &&
188190 TLI->isOperationLegalOrCustom(ISD::FSQRT, VT);
189191 }
290292 int ISD = TLI->InstructionOpcodeToISD(Opcode);
291293 assert(ISD && "Invalid opcode");
292294
293 std::pair LT = TLI->getTypeLegalizationCost(Ty);
295 std::pair LT = TLI->getTypeLegalizationCost(DL, Ty);
294296
295297 bool IsFloat = Ty->getScalarType()->isFloatingPointTy();
296298 // Assume that floating point arithmetic operations cost twice as much as
340342 const TargetLoweringBase *TLI = getTLI();
341343 int ISD = TLI->InstructionOpcodeToISD(Opcode);
342344 assert(ISD && "Invalid opcode");
343
344 std::pair SrcLT = TLI->getTypeLegalizationCost(Src);
345 std::pair DstLT = TLI->getTypeLegalizationCost(Dst);
345 std::pair SrcLT = TLI->getTypeLegalizationCost(DL, Src);
346 std::pair DstLT = TLI->getTypeLegalizationCost(DL, Dst);
346347
347348 // Check for NOOP conversions.
348349 if (SrcLT.first == DstLT.first &&
446447 if (CondTy->isVectorTy())
447448 ISD = ISD::VSELECT;
448449 }
449
450 std::pair LT = TLI->getTypeLegalizationCost(ValTy);
450 std::pair LT = TLI->getTypeLegalizationCost(DL, ValTy);
451451
452452 if (!(ValTy->isVectorTy() && !LT.second.isVector()) &&
453453 !TLI->isOperationExpand(ISD, LT.second)) {
476476
477477 unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) {
478478 std::pair LT =
479 getTLI()->getTypeLegalizationCost(Val->getScalarType());
479 getTLI()->getTypeLegalizationCost(DL, Val->getScalarType());
480480
481481 return LT.first;
482482 }
484484 unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
485485 unsigned AddressSpace) {
486486 assert(!Src->isVoidTy() && "Invalid type");
487 std::pair LT = getTLI()->getTypeLegalizationCost(Src);
487 std::pair LT = getTLI()->getTypeLegalizationCost(DL, Src);
488488
489489 // Assuming that all loads of legal types cost 1.
490490 unsigned Cost = LT.first;
495495 // itself. Unless the corresponding extending load or truncating store is
496496 // legal, then this will scalarize.
497497 TargetLowering::LegalizeAction LA = TargetLowering::Expand;
498 EVT MemVT = getTLI()->getValueType(Src, true);
498 EVT MemVT = getTLI()->getValueType(DL, Src, true);
499499 if (MemVT.isSimple() && MemVT != MVT::Other) {
500500 if (Opcode == Instruction::Store)
501501 LA = getTLI()->getTruncStoreAction(LT.second, MemVT.getSimpleVT());
691691 }
692692
693693 const TargetLoweringBase *TLI = getTLI();
694 std::pair LT = TLI->getTypeLegalizationCost(RetTy);
694 std::pair LT = TLI->getTypeLegalizationCost(DL, RetTy);
695695
696696 if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
697697 // The operation is legal. Assume it costs 1.
762762 }
763763
764764 unsigned getNumberOfParts(Type *Tp) {
765 std::pair LT = getTLI()->getTypeLegalizationCost(Tp);
765 std::pair LT = getTLI()->getTypeLegalizationCost(DL, Tp);
766766 return LT.first;
767767 }
768768
167167 /// Return the pointer type for the given address space, defaults to
168168 /// the pointer type from the data layout.
169169 /// FIXME: The default needs to be removed once all the code is updated.
170 virtual MVT getPointerTy(uint32_t /*AS*/ = 0) const;
171 unsigned getPointerSizeInBits(uint32_t AS = 0) const;
172 unsigned getPointerTypeSizeInBits(Type *Ty) const;
170 MVT getPointerTy(const DataLayout &DL, uint32_t AS = 0) const {
171 return MVT::getIntegerVT(DL.getPointerSizeInBits(AS));
172 }
173173 virtual MVT getScalarShiftAmountTy(EVT LHSTy) const;
174174
175175 EVT getShiftAmountTy(EVT LHSTy) const;
177177 /// Returns the type to be used for the index operand of:
178178 /// ISD::INSERT_VECTOR_ELT, ISD::EXTRACT_VECTOR_ELT,
179179 /// ISD::INSERT_SUBVECTOR, and ISD::EXTRACT_SUBVECTOR
180 virtual MVT getVectorIdxTy() const {
181 return getPointerTy();
180 virtual MVT getVectorIdxTy(const DataLayout &DL) const {
181 return getPointerTy(DL);
182182 }
183183
184184 /// Return true if the select operation is expensive for this target.
324324 }
325325
326326 /// Return the ValueType of the result of SETCC operations.
327 virtual EVT getSetCCResultType(LLVMContext &Context, EVT VT) const;
327 virtual EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,
328 EVT VT) const;
328329
329330 /// Return the ValueType for comparison libcalls. Comparions libcalls include
330331 /// floating point comparion calls, and Ordered/Unordered check calls on
712713 /// operations except for the pointer size. If AllowUnknown is true, this
713714 /// will return MVT::Other for types with no EVT counterpart (e.g. structs),
714715 /// otherwise it will assert.
715 EVT getValueType(Type *Ty, bool AllowUnknown = false) const {
716 EVT getValueType(const DataLayout &DL, Type *Ty,
717 bool AllowUnknown = false) const {
716718 // Lower scalar pointers to native pointer types.
717719 if (PointerType *PTy = dyn_cast(Ty))
718 return getPointerTy(PTy->getAddressSpace());
720 return getPointerTy(DL, PTy->getAddressSpace());
719721
720722 if (Ty->isVectorTy()) {
721723 VectorType *VTy = cast(Ty);
722724 Type *Elm = VTy->getElementType();
723725 // Lower vectors of pointers to native pointer types.
724726 if (PointerType *PT = dyn_cast(Elm)) {
725 EVT PointerTy(getPointerTy(PT->getAddressSpace()));
727 EVT PointerTy(getPointerTy(DL, PT->getAddressSpace()));
726728 Elm = PointerTy.getTypeForEVT(Ty->getContext());
727729 }
728730
733735 }
734736
735737 /// Return the MVT corresponding to this LLVM type. See getValueType.
736 MVT getSimpleValueType(Type *Ty, bool AllowUnknown = false) const {
737 return getValueType(Ty, AllowUnknown).getSimpleVT();
738 MVT getSimpleValueType(const DataLayout &DL, Type *Ty,
739 bool AllowUnknown = false) const {
740 return getValueType(DL, Ty, AllowUnknown).getSimpleVT();
738741 }
739742
740743 /// Return the desired alignment for ByVal or InAlloca aggregate function
10031006 int InstructionOpcodeToISD(unsigned Opcode) const;
10041007
10051008 /// Estimate the cost of type-legalization and the legalized type.
1006 std::pair getTypeLegalizationCost(Type *Ty) const;
1009 std::pair getTypeLegalizationCost(const DataLayout &DL,
1010 Type *Ty) const;
10071011
10081012 /// @}
10091013
108108 if (Ty->isVoidTy())
109109 return;
110110 // Base case: we can get an EVT for this LLVM IR type.
111 ValueVTs.push_back(TLI.getValueType(Ty));
111 ValueVTs.push_back(TLI.getValueType(DL, Ty));
112112 if (Offsets)
113113 Offsets->push_back(StartingOffset);
114114 }
232232 static const Value *getNoopInput(const Value *V,
233233 SmallVectorImpl &ValLoc,
234234 unsigned &DataBits,
235 const TargetLoweringBase &TLI) {
235 const TargetLoweringBase &TLI,
236 const DataLayout &DL) {
236237 while (true) {
237238 // Try to look through V1; if V1 is not an instruction, it can't be looked
238239 // through.
254255 // Make sure this isn't a truncating or extending cast. We could
255256 // support this eventually, but don't bother for now.
256257 if (!isa(I->getType()) &&
257 TLI.getPointerTy().getSizeInBits() ==
258 cast(Op->getType())->getBitWidth())
258 DL.getPointerSizeInBits() ==
259 cast(Op->getType())->getBitWidth())
259260 NoopInput = Op;
260261 } else if (isa(I)) {
261262 // Look through ptrtoint.
262263 // Make sure this isn't a truncating or extending cast. We could
263264 // support this eventually, but don't bother for now.
264265 if (!isa(I->getType()) &&
265 TLI.getPointerTy().getSizeInBits() ==
266 cast(I->getType())->getBitWidth())
266 DL.getPointerSizeInBits() ==
267 cast(I->getType())->getBitWidth())
267268 NoopInput = Op;
268269 } else if (isa(I) &&
269270 TLI.allowTruncateForTailCall(Op->getType(), I->getType())) {
330331 SmallVectorImpl &RetIndices,
331332 SmallVectorImpl &CallIndices,
332333 bool AllowDifferingSizes,
333 const TargetLoweringBase &TLI) {
334 const TargetLoweringBase &TLI,
335 const DataLayout &DL) {
334336
335337 // Trace the sub-value needed by the return value as far back up the graph as
336338 // possible, in the hope that it will intersect with the value produced by the
337339 // call. In the simple case with no "returned" attribute, the hope is actually
338340 // that we end up back at the tail call instruction itself.
339341 unsigned BitsRequired = UINT_MAX;
340 RetVal = getNoopInput(RetVal, RetIndices, BitsRequired, TLI);
342 RetVal = getNoopInput(RetVal, RetIndices, BitsRequired, TLI, DL);
341343
342344 // If this slot in the value returned is undef, it doesn't matter what the
343345 // call puts there, it'll be fine.
349351 // a "returned" attribute, the search will be blocked immediately and the loop
350352 // a Noop.
351353 unsigned BitsProvided = UINT_MAX;
352 CallVal = getNoopInput(CallVal, CallIndices, BitsProvided, TLI);
354 CallVal = getNoopInput(CallVal, CallIndices, BitsProvided, TLI, DL);
353355
354356 // There's no hope if we can't actually trace them to (the same part of!) the
355357 // same value.
605607 // Finally, we can check whether the value produced by the tail call at this
606608 // index is compatible with the value we return.
607609 if (!slotOnlyDiscardsData(RetVal, CallVal, TmpRetPath, TmpCallPath,
608 AllowDifferingSizes, TLI))
610 AllowDifferingSizes, TLI,
611 F->getParent()->getDataLayout()))
609612 return false;
610613
611614 CallEmpty = !nextRealType(CallSubTypes, CallPath);
757757 ///
758758 /// Return true if any changes are made.
759759 ///
760 static bool OptimizeNoopCopyExpression(CastInst *CI, const TargetLowering &TLI){
760 static bool OptimizeNoopCopyExpression(CastInst *CI, const TargetLowering &TLI,
761 const DataLayout &DL) {
761762 // If this is a noop copy,
762 EVT SrcVT = TLI.getValueType(CI->getOperand(0)->getType());
763 EVT DstVT = TLI.getValueType(CI->getType());
763 EVT SrcVT = TLI.getValueType(DL, CI->getOperand(0)->getType());
764 EVT DstVT = TLI.getValueType(DL, CI->getType());
764765
765766 // This is an fp<->int conversion?
766767 if (SrcVT.isInteger() != DstVT.isInteger())
925926 static bool
926927 SinkShiftAndTruncate(BinaryOperator *ShiftI, Instruction *User, ConstantInt *CI,
927928 DenseMap &InsertedShifts,
928 const TargetLowering &TLI) {
929 const TargetLowering &TLI, const DataLayout &DL) {
929930 BasicBlock *UserBB = User->getParent();
930931 DenseMap InsertedTruncs;
931932 TruncInst *TruncI = dyn_cast(User);
951952 // approximation; some nodes' legality is determined by the
952953 // operand or other means. There's no good way to find out though.
953954 if (TLI.isOperationLegalOrCustom(
954 ISDOpcode, TLI.getValueType(TruncUser->getType(), true)))
955 ISDOpcode, TLI.getValueType(DL, TruncUser->getType(), true)))
955956 continue;
956957
957958 // Don't bother for PHI nodes.
10091010 /// instruction.
10101011 /// Return true if any changes are made.
10111012 static bool OptimizeExtractBits(BinaryOperator *ShiftI, ConstantInt *CI,
1012 const TargetLowering &TLI) {
1013 const TargetLowering &TLI,
1014 const DataLayout &DL) {
10131015 BasicBlock *DefBB = ShiftI->getParent();
10141016
10151017 /// Only insert instructions in each block once.
10161018 DenseMap InsertedShifts;
10171019
1018 bool shiftIsLegal = TLI.isTypeLegal(TLI.getValueType(ShiftI->getType()));
1020 bool shiftIsLegal = TLI.isTypeLegal(TLI.getValueType(DL, ShiftI->getType()));
10191021
10201022 bool MadeChange = false;
10211023 for (Value::user_iterator UI = ShiftI->user_begin(), E = ShiftI->user_end();
10521054 if (isa(User) && shiftIsLegal
10531055 // If the type of the truncate is legal, no trucate will be
10541056 // introduced in other basic blocks.
1055 && (!TLI.isTypeLegal(TLI.getValueType(User->getType()))))
1057 &&
1058 (!TLI.isTypeLegal(TLI.getValueType(DL, User->getType()))))
10561059 MadeChange =
1057 SinkShiftAndTruncate(ShiftI, User, CI, InsertedShifts, TLI);
1060 SinkShiftAndTruncate(ShiftI, User, CI, InsertedShifts, TLI, DL);
10581061
10591062 continue;
10601063 }
22642267 /// \note \p Val is assumed to be the product of some type promotion.
22652268 /// Therefore if \p Val has an undefined state in \p TLI, this is assumed
22662269 /// to be legal, as the non-promoted value would have had the same state.
2267 static bool isPromotedInstructionLegal(const TargetLowering &TLI, Value *Val) {
2270 static bool isPromotedInstructionLegal(const TargetLowering &TLI,
2271 const DataLayout &DL, Value *Val) {
22682272 Instruction *PromotedInst = dyn_cast(Val);
22692273 if (!PromotedInst)
22702274 return false;
22742278 return true;
22752279 // Otherwise, check if the promoted instruction is legal or not.
22762280 return TLI.isOperationLegalOrCustom(
2277 ISDOpcode, TLI.getValueType(PromotedInst->getType()));
2281 ISDOpcode, TLI.getValueType(DL, PromotedInst->getType()));
22782282 }
22792283
22802284 /// \brief Hepler class to perform type promotion.
26482652 // The promotion is neutral but it may help folding the sign extension in
26492653 // loads for instance.
26502654 // Check that we did not create an illegal instruction.
2651 return isPromotedInstructionLegal(TLI, PromotedOperand);
2655 return isPromotedInstructionLegal(TLI, DL, PromotedOperand);
26522656 }
26532657
26542658 /// MatchOperationAddr - Given an instruction or constant expr, see if we can
26762680 case Instruction::PtrToInt:
26772681 // PtrToInt is always a noop, as we know that the int type is pointer sized.
26782682 return MatchAddr(AddrInst->getOperand(0), Depth);
2679 case Instruction::IntToPtr:
2683 case Instruction::IntToPtr: {
2684 auto AS = AddrInst->getType()->getPointerAddressSpace();
2685 auto PtrTy = MVT::getIntegerVT(DL.getPointerSizeInBits(AS));
26802686 // This inttoptr is a no-op if the integer type is pointer sized.
2681 if (TLI.getValueType(AddrInst->getOperand(0)->getType()) ==
2682 TLI.getPointerTy(AddrInst->getType()->getPointerAddressSpace()))
2687 if (TLI.getValueType(DL, AddrInst->getOperand(0)->getType()) == PtrTy)
26832688 return MatchAddr(AddrInst->getOperand(0), Depth);
26842689 return false;
2690 }
26852691 case Instruction::BitCast:
26862692 // BitCast is always a noop, and we can handle it as long as it is
26872693 // int->int or pointer->pointer (we don't want int<->fp or something).
36823688 TotalCreatedInstsCost -= ExtCost;
36833689 if (!StressExtLdPromotion &&
36843690 (TotalCreatedInstsCost > 1 ||
3685 !isPromotedInstructionLegal(*TLI, PromotedVal))) {
3691 !isPromotedInstructionLegal(*TLI, *DL, PromotedVal))) {
36863692 // The promotion is not profitable, rollback to the previous state.
36873693 TPT.rollback(LastKnownGood);
36883694 continue;
37373743 if (!HasPromoted && LI->getParent() == I->getParent())
37383744 return false;
37393745
3740 EVT VT = TLI->getValueType(I->getType());
3741 EVT LoadVT = TLI->getValueType(LI->getType());
3746 EVT VT = TLI->getValueType(*DL, I->getType());
3747 EVT LoadVT = TLI->getValueType(*DL, LI->getType());
37423748
37433749 // If the load has other users and the truncate is not free, this probably
37443750 // isn't worthwhile.
40154021 /// Assuming both extractelement and store can be combine, we get rid of the
40164022 /// transition.
40174023 class VectorPromoteHelper {
4024 /// DataLayout associated with the current module.
4025 const DataLayout &DL;
4026
40184027 /// Used to perform some checks on the legality of vector operations.
40194028 const TargetLowering &TLI;
40204029
40884097 unsigned Align = ST->getAlignment();
40894098 // Check if this store is supported.
40904099 if (!TLI.allowsMisalignedMemoryAccesses(
4091 TLI.getValueType(ST->getValueOperand()->getType()), AS, Align)) {
4100 TLI.getValueType(DL, ST->getValueOperand()->getType()), AS,
4101 Align)) {
40924102 // If this is not supported, there is no way we can combine
40934103 // the extract with the store.
40944104 return false;
41834193 }
41844194
41854195 public:
4186 VectorPromoteHelper(const TargetLowering &TLI, const TargetTransformInfo &TTI,
4187 Instruction *Transition, unsigned CombineCost)
4188 : TLI(TLI), TTI(TTI), Transition(Transition),
4196 VectorPromoteHelper(const DataLayout &DL, const TargetLowering &TLI,
4197 const TargetTransformInfo &TTI, Instruction *Transition,
4198 unsigned CombineCost)
4199 : DL(DL), TLI(TLI), TTI(TTI), Transition(Transition),
41894200 StoreExtractCombineCost(CombineCost), CombineInst(nullptr) {
41904201 assert(Transition && "Do not know how to promote null");
41914202 }
42214232 return false;
42224233 return StressStoreExtract ||
42234234 TLI.isOperationLegalOrCustom(
4224 ISDOpcode, TLI.getValueType(getTransitionType(), true));
4235 ISDOpcode, TLI.getValueType(DL, getTransitionType(), true));
42254236 }
42264237
42274238 /// \brief Check whether or not \p Use can be combined
43254336 // we do not do that for now.
43264337 BasicBlock *Parent = Inst->getParent();
43274338 DEBUG(dbgs() << "Found an interesting transition: " << *Inst << '\n');
4328 VectorPromoteHelper VPH(*TLI, *TTI, Inst, CombineCost);
4339 VectorPromoteHelper VPH(*DL, *TLI, *TTI, Inst, CombineCost);
43294340 // If the transition has more than one use, assume this is not going to be
43304341 // beneficial.
43314342 while (Inst->hasOneUse()) {
43894400 if (isa(CI->getOperand(0)))
43904401 return false;
43914402
4392 if (TLI && OptimizeNoopCopyExpression(CI, *TLI))
4403 if (TLI && OptimizeNoopCopyExpression(CI, *TLI, *DL))
43934404 return true;
43944405
43954406 if (isa(I) || isa(I)) {
43964407 /// Sink a zext or sext into its user blocks if the target type doesn't
43974408 /// fit in one register
4398 if (TLI && TLI->getTypeAction(CI->getContext(),
4399 TLI->getValueType(CI->getType())) ==
4400 TargetLowering::TypeExpandInteger) {
4409 if (TLI &&
4410 TLI->getTypeAction(CI->getContext(),
4411 TLI->getValueType(*DL, CI->getType())) ==
4412 TargetLowering::TypeExpandInteger) {
44014413 return SinkCast(CI);
44024414 } else {
44034415 bool MadeChange = MoveExtToFormExtLoad(I);
44344446 BinOp->getOpcode() == Instruction::LShr)) {
44354447 ConstantInt *CI = dyn_cast(BinOp->getOperand(1));
44364448 if (TLI && CI && TLI->hasExtractBitsInsn())
4437 return OptimizeExtractBits(BinOp, CI, *TLI);
4449 return OptimizeExtractBits(BinOp, CI, *TLI, *DL);
44384450
44394451 return false;
44404452 }
442442 assert(LHSTy.isInteger() && "Shift amount is not an integer type!");
443443 if (LHSTy.isVector())
444444 return LHSTy;
445 auto &DL = DAG.getDataLayout();
445446 return LegalTypes ? TLI.getScalarShiftAmountTy(LHSTy)
446 : TLI.getPointerTy();
447 : TLI.getPointerTy(DL);
447448 }
448449
449450 /// This method returns true if we are running before type legalization or
455456
456457 /// Convenience wrapper around TargetLowering::getSetCCResultType
457458 EVT getSetCCResultType(EVT VT) const {
458 return TLI.getSetCCResultType(*DAG.getContext(), VT);
459 return TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT);
459460 }
460461 };
461462 }
69256926 SDValue EltNo = N0->getOperand(1);
69266927 if (isa(EltNo) && isTypeLegal(NVT)) {
69276928 int Elt = cast(EltNo)->getZExtValue();
6928 EVT IndexTy = TLI.getVectorIdxTy();
6929 EVT IndexTy = TLI.getVectorIdxTy(DAG.getDataLayout());
69296930 int Index = isLE ? (Elt*SizeRatio) : (Elt*SizeRatio + (SizeRatio-1));
69306931
69316932 SDValue V = DAG.getNode(ISD::BITCAST, SDLoc(N),
84218422 // Unfortunately, RV is now NaN if the input was exactly 0.
84228423 // Select out this case and force the answer to 0.
84238424 SDValue Zero = DAG.getConstantFP(0.0, DL, VT);
8424 EVT CCVT = TLI.getSetCCResultType(*DAG.getContext(), VT);
8425 EVT CCVT = TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT);
84258426 SDValue ZeroCmp = DAG.getSetCC(DL, CCVT, N->getOperand(0), Zero, ISD::SETEQ);
84268427 AddToWorklist(ZeroCmp.getNode());
84278428 AddToWorklist(RV.getNode());
1164611647 // scalar_to_vector here as well.
1164711648
1164811649 if (!LegalOperations) {
11649 EVT IndexTy = TLI.getVectorIdxTy();
11650 EVT IndexTy = TLI.getVectorIdxTy(DAG.getDataLayout());
1165011651 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N), NVT, SVInVec,
1165111652 DAG.getConstant(OrigElt, SDLoc(SVOp), IndexTy));
1165211653 }
1207712078
1207812079 // Try to replace VecIn1 with two extract_subvectors
1207912080 // No need to update the masks, they should still be correct.
12080 VecIn2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, VecIn1,
12081 DAG.getConstant(VT.getVectorNumElements(), dl, TLI.getVectorIdxTy()));
12082 VecIn1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, VecIn1,
12083 DAG.getConstant(0, dl, TLI.getVectorIdxTy()));
12081 VecIn2 = DAG.getNode(
12082 ISD::EXTRACT_SUBVECTOR, dl, VT, VecIn1,
12083 DAG.getConstant(VT.getVectorNumElements(), dl,
12084 TLI.getVectorIdxTy(DAG.getDataLayout())));
12085 VecIn1 = DAG.getNode(
12086 ISD::EXTRACT_SUBVECTOR, dl, VT, VecIn1,
12087 DAG.getConstant(0, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
1208412088 } else
1208512089 return SDValue();
1208612090 }
1335613360
1335713361 // Create a ConstantArray of the two constants.
1335813362 Constant *CA = ConstantArray::get(ArrayType::get(FPTy, 2), Elts);
13359 SDValue CPIdx = DAG.getConstantPool(CA, TLI.getPointerTy(),
13360 TD.getPrefTypeAlignment(FPTy));
13363 SDValue CPIdx =
13364 DAG.getConstantPool(CA, TLI.getPointerTy(DAG.getDataLayout()),
13365 TD.getPrefTypeAlignment(FPTy));
1336113366 unsigned Alignment = cast(CPIdx)->getAlignment();
1336213367
1336313368 // Get the offsets to the 0 and 1 element of the array so that we can
165165 }
166166
167167 unsigned FastISel::getRegForValue(const Value *V) {
168 EVT RealVT = TLI.getValueType(V->getType(), /*AllowUnknown=*/true);
168 EVT RealVT = TLI.getValueType(DL, V->getType(), /*AllowUnknown=*/true);
169169 // Don't handle non-simple values in FastISel.
170170 if (!RealVT.isSimple())
171171 return 0;
227227 if (!Reg) {
228228 // Try to emit the constant by using an integer constant with a cast.
229229 const APFloat &Flt = CF->getValueAPF();
230 EVT IntVT = TLI.getPointerTy();
230 EVT IntVT = TLI.getPointerTy(DL);
231231
232232 uint64_t x[2];
233233 uint32_t IntBitWidth = IntVT.getSizeInBits();
320320 bool IdxNIsKill = hasTrivialKill(Idx);
321321
322322 // If the index is smaller or larger than intptr_t, truncate or extend it.
323 MVT PtrVT = TLI.getPointerTy();
323 MVT PtrVT = TLI.getPointerTy(DL);
324324 EVT IdxVT = EVT::getEVT(Idx->getType(), /*HandleUnknown=*/false);
325325 if (IdxVT.bitsLT(PtrVT)) {
326326 IdxN = fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::SIGN_EXTEND, IdxN,
492492 // FIXME: What's a good SWAG number for MaxOffs?
493493 uint64_t MaxOffs = 2048;
494494 Type *Ty = I->getOperand(0)->getType();
495 MVT VT = TLI.getPointerTy();
495 MVT VT = TLI.getPointerTy(DL);
496496 for (GetElementPtrInst::const_op_iterator OI = I->op_begin() + 1,
497497 E = I->op_end();
498498 OI != E; ++OI) {
12441244 }
12451245
12461246 bool FastISel::selectCast(const User *I, unsigned Opcode) {
1247 EVT SrcVT = TLI.getValueType(I->getOperand(0)->getType());
1248 EVT DstVT = TLI.getValueType(I->getType());
1247 EVT SrcVT = TLI.getValueType(DL, I->getOperand(0)->getType());
1248 EVT DstVT = TLI.getValueType(DL, I->getType());
12491249
12501250 if (SrcVT == MVT::Other || !SrcVT.isSimple() || DstVT == MVT::Other ||
12511251 !DstVT.isSimple())
12871287 }
12881288
12891289 // Bitcasts of other values become reg-reg copies or BITCAST operators.
1290 EVT SrcEVT = TLI.getValueType(I->getOperand(0)->getType());
1291 EVT DstEVT = TLI.getValueType(I->getType());
1290 EVT SrcEVT = TLI.getValueType(DL, I->getOperand(0)->getType());
1291 EVT DstEVT = TLI.getValueType(DL, I->getType());
12921292 if (SrcEVT == MVT::Other || DstEVT == MVT::Other ||
12931293 !TLI.isTypeLegal(SrcEVT) || !TLI.isTypeLegal(DstEVT))
12941294 // Unhandled type. Halt "fast" selection and bail.
14121412 bool OpRegIsKill = hasTrivialKill(I);
14131413
14141414 // If the target has ISD::FNEG, use it.
1415 EVT VT = TLI.getValueType(I->getType());
1415 EVT VT = TLI.getValueType(DL, I->getType());
14161416 unsigned ResultReg = fastEmit_r(VT.getSimpleVT(), VT.getSimpleVT(), ISD::FNEG,
14171417 OpReg, OpRegIsKill);
14181418 if (ResultReg) {
14551455
14561456 // Make sure we only try to handle extracts with a legal result. But also
14571457 // allow i1 because it's easy.
1458 EVT RealVT = TLI.getValueType(EVI->getType(), /*AllowUnknown=*/true);
1458 EVT RealVT = TLI.getValueType(DL, EVI->getType(), /*AllowUnknown=*/true);
14591459 if (!RealVT.isSimple())
14601460 return false;
14611461 MVT VT = RealVT.getSimpleVT();
15811581
15821582 case Instruction::IntToPtr: // Deliberate fall-through.
15831583 case Instruction::PtrToInt: {
1584 EVT SrcVT = TLI.getValueType(I->getOperand(0)->getType());
1585 EVT DstVT = TLI.getValueType(I->getType());
1584 EVT SrcVT = TLI.getValueType(DL, I->getOperand(0)->getType());
1585 EVT DstVT = TLI.getValueType(DL, I->getType());
15861586 if (DstVT.bitsGT(SrcVT))
15871587 return selectCast(I, ISD::ZERO_EXTEND);
15881588 if (DstVT.bitsLT(SrcVT))
20362036 // own moves. Second, this check is necessary because FastISel doesn't
20372037 // use CreateRegs to create registers, so it always creates
20382038 // exactly one register for each non-void instruction.
2039 EVT VT = TLI.getValueType(PN->getType(), /*AllowUnknown=*/true);
2039 EVT VT = TLI.getValueType(DL, PN->getType(), /*AllowUnknown=*/true);
20402040 if (VT == MVT::Other || !TLI.isTypeLegal(VT)) {
20412041 // Handle integer promotions, though, because they're common and easy.
20422042 if (!(VT == MVT::i1 || VT == MVT::i8 || VT == MVT::i16)) {
6464 SmallSetVector *UpdatedNodes;
6565
6666 EVT getSetCCResultType(EVT VT) const {
67 return TLI.getSetCCResultType(*DAG.getContext(), VT);
67 return TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT);
6868 }
6969
7070 // Libcall insertion helpers.
268268 }
269269 }
270270
271 SDValue CPIdx = DAG.getConstantPool(LLVMC, TLI.getPointerTy());
271 SDValue CPIdx =
272 DAG.getConstantPool(LLVMC, TLI.getPointerTy(DAG.getDataLayout()));
272273 unsigned Alignment = cast(CPIdx)->getAlignment();
273274 if (Extend) {
274275 SDValue Result =
330331 SDValue Store = DAG.getTruncStore(Chain, dl,
331332 Val, StackPtr, MachinePointerInfo(),
332333 StoredVT, false, false, 0);
333 SDValue Increment = DAG.getConstant(RegBytes, dl, TLI.getPointerTy(AS));
334 SDValue Increment = DAG.getConstant(
335 RegBytes, dl, TLI.getPointerTy(DAG.getDataLayout(), AS));
334336 SmallVector Stores;
335337 unsigned Offset = 0;
336338
397399 ST->isVolatile(), ST->isNonTemporal(), Alignment);
398400
399401 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
400 DAG.getConstant(IncrementSize, dl, TLI.getPointerTy(AS)));
402 DAG.getConstant(IncrementSize, dl,
403 TLI.getPointerTy(DAG.getDataLayout(), AS)));
401404 Alignment = MinAlign(Alignment, IncrementSize);
402405 Store2 = DAG.getTruncStore(
403406 Chain, dl, DAG.getDataLayout().isLittleEndian() ? Hi : Lo, Ptr,
448451 // Make sure the stack slot is also aligned for the register type.
449452 SDValue StackBase = DAG.CreateStackTemporary(LoadedVT, RegVT);
450453
451 SDValue Increment = DAG.getConstant(RegBytes, dl, TLI.getPointerTy());
454 SDValue Increment =
455 DAG.getConstant(RegBytes, dl, TLI.getPointerTy(DAG.getDataLayout()));
452456 SmallVector Stores;
453457 SDValue StackPtr = StackBase;
454458 unsigned Offset = 0;
581585 EVT VT = Tmp1.getValueType();
582586 EVT EltVT = VT.getVectorElementType();
583587 EVT IdxVT = Tmp3.getValueType();
584 EVT PtrVT = TLI.getPointerTy();
588 EVT PtrVT = TLI.getPointerTy(DAG.getDataLayout());
585589 SDValue StackPtr = DAG.CreateStackTemporary(VT);
586590
587591 int SPFI = cast(StackPtr.getNode())->getIndex();
14411445 Idx = DAG.getNode(ISD::MUL, dl, Idx.getValueType(), Idx,
14421446 DAG.getConstant(EltSize, SDLoc(Vec), Idx.getValueType()));
14431447
1444 Idx = DAG.getZExtOrTrunc(Idx, dl, TLI.getPointerTy());
1448 Idx = DAG.getZExtOrTrunc(Idx, dl, TLI.getPointerTy(DAG.getDataLayout()));
14451449 StackPtr = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx, StackPtr);
14461450
14471451 SDValue NewLoad;
14931497
14941498 Idx = DAG.getNode(ISD::MUL, dl, Idx.getValueType(), Idx,
14951499 DAG.getConstant(EltSize, SDLoc(Vec), Idx.getValueType()));
1496 Idx = DAG.getZExtOrTrunc(Idx, dl, TLI.getPointerTy());
1500 Idx = DAG.getZExtOrTrunc(Idx, dl, TLI.getPointerTy(DAG.getDataLayout()));
14971501
14981502 SDValue SubStackPtr = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx,
14991503 StackPtr);
15731577 } else {
15741578 auto &DL = DAG.getDataLayout();
15751579 // Store the float to memory, then load the sign part out as an integer.
1576 MVT LoadTy = TLI.getPointerTy();
1580 MVT LoadTy = TLI.getPointerTy(DL);
15771581 // First create a temporary that is aligned for both the load and store.
15781582 SDValue StackPtr = DAG.CreateStackTemporary(FloatVT, LoadTy);
15791583 // Then store the float to it.
19962000 }
19972001 }
19982002 Constant *CP = ConstantVector::get(CV);
1999 SDValue CPIdx = DAG.getConstantPool(CP, TLI.getPointerTy());
2003 SDValue CPIdx =
2004 DAG.getConstantPool(CP, TLI.getPointerTy(DAG.getDataLayout()));
20002005 unsigned Alignment = cast(CPIdx)->getAlignment();
20012006 return DAG.getLoad(VT, dl, DAG.getEntryNode(), CPIdx,
20022007 MachinePointerInfo::getConstantPool(),
20602065 Args.push_back(Entry);
20612066 }
20622067 SDValue Callee = DAG.getExternalSymbol(TLI.getLibcallName(LC),
2063 TLI.getPointerTy());
2068 TLI.getPointerTy(DAG.getDataLayout()));
20642069
20652070 Type *RetTy = Node->getValueType(0).getTypeForEVT(*DAG.getContext());
20662071
21082113 Args.push_back(Entry);
21092114 }
21102115 SDValue Callee = DAG.getExternalSymbol(TLI.getLibcallName(LC),
2111 TLI.getPointerTy());
2116 TLI.getPointerTy(DAG.getDataLayout()));
21122117
21132118 Type *RetTy = RetVT.getTypeForEVT(*DAG.getContext());
21142119
21422147 Args.push_back(Entry);
21432148 }
21442149 SDValue Callee = DAG.getExternalSymbol(TLI.getLibcallName(LC),
2145 TLI.getPointerTy());
2150 TLI.getPointerTy(DAG.getDataLayout()));
21462151
21472152 Type *RetTy = Node->getValueType(0).getTypeForEVT(*DAG.getContext());
21482153
22792284 Args.push_back(Entry);
22802285
22812286 SDValue Callee = DAG.getExternalSymbol(TLI.getLibcallName(LC),
2282 TLI.getPointerTy());
2287 TLI.getPointerTy(DAG.getDataLayout()));
22832288
22842289 SDLoc dl(Node);
22852290 TargetLowering::CallLoweringInfo CLI(DAG);
23912396 Args.push_back(Entry);
23922397
23932398 SDValue Callee = DAG.getExternalSymbol(TLI.getLibcallName(LC),
2394 TLI.getPointerTy());
2399 TLI.getPointerTy(DAG.getDataLayout()));
23952400
23962401 SDLoc dl(Node);
23972402 TargetLowering::CallLoweringInfo CLI(DAG);
25912596 Constant *FudgeFactor = ConstantInt::get(
25922597 Type::getInt64Ty(*DAG.getContext()), FF);
25932598
2594 SDValue CPIdx = DAG.getConstantPool(FudgeFactor, TLI.getPointerTy());
2599 SDValue CPIdx =
2600 DAG.getConstantPool(FudgeFactor, TLI.getPointerTy(DAG.getDataLayout()));
25952601 unsigned Alignment = cast(CPIdx)->getAlignment();
25962602 CPIdx = DAG.getNode(ISD::ADD, dl, CPIdx.getValueType(), CPIdx, CstOffset);
25972603 Alignment = std::min(Alignment, 4u);
29062912 TargetLowering::ArgListTy Args;
29072913
29082914 TargetLowering::CallLoweringInfo CLI(DAG);
2909 CLI.setDebugLoc(dl).setChain(Node->getOperand(0))
2910 .setCallee(CallingConv::C, Type::getVoidTy(*DAG.getContext()),
2911 DAG.getExternalSymbol("__sync_synchronize",
2912 TLI.getPointerTy()), std::move(Args), 0);
2915 CLI.setDebugLoc(dl)
2916 .setChain(Node->getOperand(0))
2917 .setCallee(CallingConv::C, Type::getVoidTy(*DAG.getContext()),
2918 DAG.getExternalSymbol("__sync_synchronize",
2919 TLI.getPointerTy(DAG.getDataLayout())),
2920 std::move(Args), 0);
29132921
29142922 std::pair CallResult = TLI.LowerCallTo(CLI);
29152923
30053013 // If this operation is not supported, lower it to 'abort()' call
30063014 TargetLowering::ArgListTy Args;
30073015 TargetLowering::CallLoweringInfo CLI(DAG);
3008 CLI.setDebugLoc(dl).setChain(Node->getOperand(0))
3009 .setCallee(CallingConv::C, Type::getVoidTy(*DAG.getContext()),
3010 DAG.getExternalSymbol("abort", TLI.getPointerTy()),
3011 std::move(Args), 0);
3016 CLI.setDebugLoc(dl)
3017 .setChain(Node->getOperand(0))
3018 .setCallee(CallingConv::C, Type::getVoidTy(*DAG.getContext()),
3019 DAG.getExternalSymbol("abort",
3020 TLI.getPointerTy(DAG.getDataLayout())),
3021 std::move(Args), 0);
30123022 std::pair CallResult = TLI.LowerCallTo(CLI);
30133023
30143024 Results.push_back(CallResult.second);
30953105 Tmp2 = Node->getOperand(1);
30963106 unsigned Align = Node->getConstantOperandVal(3);
30973107
3098 SDValue VAListLoad = DAG.getLoad(TLI.getPointerTy(), dl, Tmp1, Tmp2,
3099 MachinePointerInfo(V),
3100 false, false, false, 0);
3108 SDValue VAListLoad =
3109 DAG.getLoad(TLI.getPointerTy(DAG.getDataLayout()), dl, Tmp1, Tmp2,
3110 MachinePointerInfo(V), false, false, false, 0);
31013111 SDValue VAList = VAListLoad;
31023112
31033113 if (Align > TLI.getMinStackArgumentAlignment()) {
31313141 // output, returning the chain.
31323142 const Value *VD = cast(Node->getOperand(3))->getValue();
31333143 const Value *VS = cast(Node->getOperand(4))->getValue();
3134 Tmp1 = DAG.getLoad(TLI.getPointerTy(), dl, Node->getOperand(0),
3135 Node->getOperand(2), MachinePointerInfo(VS),
3136 false, false, false, 0);
3144 Tmp1 = DAG.getLoad(TLI.getPointerTy(DAG.getDataLayout()), dl,
3145 Node->getOperand(0), Node->getOperand(2),
3146 MachinePointerInfo(VS), false, false, false, 0);
31373147 Tmp1 = DAG.getStore(Tmp1.getValue(1), dl, Tmp1, Node->getOperand(1),
31383148 MachinePointerInfo(VD), false, false, 0);
31393149 Results.push_back(Tmp1);
32283238 }
32293239 unsigned Idx = Mask[i];
32303240 if (Idx < NumElems)
3231 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT,
3232 Op0,
3233 DAG.getConstant(Idx, dl, TLI.getVectorIdxTy())));
3241 Ops.push_back(DAG.getNode(
3242 ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0,
3243 DAG.getConstant(Idx, dl, TLI.getVectorIdxTy(DAG.getDataLayout()))));
32343244 else
3235 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT,
3236 Op1,
3237 DAG.getConstant(Idx - NumElems, dl,
3238 TLI.getVectorIdxTy())));
3245 Ops.push_back(DAG.getNode(
3246 ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op1,
3247 DAG.getConstant(Idx - NumElems, dl,
3248 TLI.getVectorIdxTy(DAG.getDataLayout()))));
32393249 }
32403250
32413251 Tmp1 = DAG.getNode(ISD::BUILD_VECTOR, dl, VT, Ops);
37613771 // The high part is obtained by SRA'ing all but one of the bits of low
37623772 // part.
37633773 unsigned LoSize = VT.getSizeInBits();
3764 SDValue HiLHS = DAG.getNode(ISD::SRA, dl, VT, RHS,
3765 DAG.getConstant(LoSize - 1, dl,
3766 TLI.getPointerTy()));
3767 SDValue HiRHS = DAG.getNode(ISD::SRA, dl, VT, LHS,
3768 DAG.getConstant(LoSize - 1, dl,
3769 TLI.getPointerTy()));
3774 SDValue HiLHS =
3775 DAG.getNode(ISD::SRA, dl, VT, RHS,
3776 DAG.getConstant(LoSize - 1, dl,
3777 TLI.getPointerTy(DAG.getDataLayout())));
3778 SDValue HiRHS =
3779 DAG.getNode(ISD::SRA, dl, VT, LHS,
3780 DAG.getConstant(LoSize - 1, dl,
3781 TLI.getPointerTy(DAG.getDataLayout())));
37703782
37713783 // Here we're passing the 2 arguments explicitly as 4 arguments that are
37723784 // pre-lowered to the correct types. This all depends upon WideVT not
38303842 SDValue Table = Node->getOperand(1);
38313843 SDValue Index = Node->getOperand(2);
38323844
3833 EVT PTy = TLI.getPointerTy();
3845 EVT PTy = TLI.getPointerTy(DAG.getDataLayout());
38343846
38353847 const DataLayout &TD = DAG.getDataLayout();
38363848 unsigned EntrySize =
39383950 assert(!TLI.isOperationExpand(ISD::SELECT, VT) &&
39393951 "Cannot expand ISD::SELECT_CC when ISD::SELECT also needs to be "
39403952 "expanded.");
3941 EVT CCVT = TLI.getSetCCResultType(*DAG.getContext(), CmpVT);
3953 EVT CCVT =
3954 TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), CmpVT);
39423955 SDValue Cond = DAG.getNode(ISD::SETCC, dl, CCVT, Tmp1, Tmp2, CC);
39433956 Results.push_back(DAG.getSelect(dl, VT, Cond, Tmp3, Tmp4));
39443957 break;
40384051
40394052 SmallVector Scalars;
40404053 for (unsigned Idx = 0; Idx < NumElem; Idx++) {
4041 SDValue Ex = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
4042 VT.getScalarType(),
4043 Node->getOperand(0),
4044 DAG.getConstant(Idx, dl, TLI.getVectorIdxTy()));
4045 SDValue Sh = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
4046 VT.getScalarType(),
4047 Node->getOperand(1),
4048 DAG.getConstant(Idx, dl, TLI.getVectorIdxTy()));
4054 SDValue Ex = DAG.getNode(
4055 ISD::EXTRACT_VECTOR_ELT, dl, VT.getScalarType(), Node->getOperand(0),
4056 DAG.getConstant(Idx, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
4057 SDValue Sh = DAG.getNode(
4058 ISD::EXTRACT_VECTOR_ELT, dl, VT.getScalarType(), Node->getOperand(1),
4059 DAG.getConstant(Idx, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
40494060 Scalars.push_back(DAG.getNode(Node->getOpcode(), dl,
40504061 VT.getScalarType(), Ex, Sh));
40514062 }
808808 SDValue Part = DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, Parts[i]);
809809 // Shift it to the right position and "or" it in.
810810 Part = DAG.getNode(ISD::SHL, dl, NVT, Part,
811 DAG.getConstant(i*RegVT.getSizeInBits(), dl,
812 TLI.getPointerTy()));
811 DAG.getConstant(i * RegVT.getSizeInBits(), dl,
812 TLI.getPointerTy(DAG.getDataLayout())));
813813 Res = DAG.getNode(ISD::OR, dl, NVT, Res, Part);
814814 }
815815
10031003
10041004 Hi = DAG.getNode(ISD::SHL, dl, N->getValueType(0), Hi,
10051005 DAG.getConstant(OVT.getSizeInBits(), dl,
1006 TLI.getPointerTy()));
1006 TLI.getPointerTy(DAG.getDataLayout())));
10071007 return DAG.getNode(ISD::OR, dl, N->getValueType(0), Lo, Hi);
10081008 }
10091009
10621062
10631063 // Promote the index.
10641064 SDValue Idx = DAG.getZExtOrTrunc(N->getOperand(2), SDLoc(N),
1065 TLI.getVectorIdxTy());
1065 TLI.getVectorIdxTy(DAG.getDataLayout()));
10661066 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0),
10671067 N->getOperand(1), Idx), 0);
10681068 }
18071807 Lo = DAG.getNode(ISD::AssertSext, dl, NVT, Lo, DAG.getValueType(EVT));
18081808 // The high part replicates the sign bit of Lo, make it explicit.
18091809 Hi = DAG.getNode(ISD::SRA, dl, NVT, Lo,
1810 DAG.getConstant(NVTBits - 1, dl, TLI.getPointerTy()));
1810 DAG.getConstant(NVTBits - 1, dl,
1811 TLI.getPointerTy(DAG.getDataLayout())));
18111812 }
18121813 }
18131814
19741975 // lo part.
19751976 unsigned LoSize = Lo.getValueType().getSizeInBits();
19761977 Hi = DAG.getNode(ISD::SRA, dl, NVT, Lo,
1977 DAG.getConstant(LoSize - 1, dl, TLI.getPointerTy()));
1978 DAG.getConstant(LoSize - 1, dl,
1979 TLI.getPointerTy(DAG.getDataLayout())));
19781980 } else if (ExtType == ISD::ZEXTLOAD) {
19791981 // The high part is just a zero.
19801982 Hi = DAG.getConstant(0, dl, NVT);
20382040
20392041 if (ExcessBits < NVT.getSizeInBits()) {
20402042 // Transfer low bits from the bottom of Hi to the top of Lo.
2041 Lo = DAG.getNode(ISD::OR, dl, NVT, Lo,
2042 DAG.getNode(ISD::SHL, dl, NVT, Hi,
2043 DAG.getConstant(ExcessBits, dl,
2044 TLI.getPointerTy())));
2043 Lo = DAG.getNode(
2044 ISD::OR, dl, NVT, Lo,
2045 DAG.getNode(ISD::SHL, dl, NVT, Hi,
2046 DAG.getConstant(ExcessBits, dl,
2047 TLI.getPointerTy(DAG.getDataLayout()))));
20452048 // Move high bits to the right position in Hi.
2046 Hi = DAG.getNode(ExtType == ISD::SEXTLOAD ? ISD::SRA : ISD::SRL, dl,
2047 NVT, Hi,
2049 Hi = DAG.getNode(ExtType == ISD::SEXTLOAD ? ISD::SRA : ISD::SRL, dl, NVT,
2050 Hi,
20482051 DAG.getConstant(NVT.getSizeInBits() - ExcessBits, dl,
2049 TLI.getPointerTy()));
2052 TLI.getPointerTy(DAG.getDataLayout())));
20502053 }
20512054 }
20522055
22752278 Lo = DAG.getNode(ISD::SIGN_EXTEND, dl, NVT, N->getOperand(0));
22762279 // The high part is obtained by SRA'ing all but one of the bits of low part.
22772280 unsigned LoSize = NVT.getSizeInBits();
2278 Hi = DAG.getNode(ISD::SRA, dl, NVT, Lo,
2279 DAG.getConstant(LoSize - 1, dl, TLI.getPointerTy()));
2281 Hi = DAG.getNode(
2282 ISD::SRA, dl, NVT, Lo,
2283 DAG.getConstant(LoSize - 1, dl, TLI.getPointerTy(DAG.getDataLayout())));
22802284 } else {
22812285 // For example, extension of an i48 to an i64. The operand type necessarily
22822286 // promotes to the result type, so will end up being expanded too.
23112315 // things like sextinreg V:i64 from i8.
23122316 Hi = DAG.getNode(ISD::SRA, dl, Hi.getValueType(), Lo,
23132317 DAG.getConstant(Hi.getValueType().getSizeInBits() - 1, dl,
2314 TLI.getPointerTy()));
2318 TLI.getPointerTy(DAG.getDataLayout())));
23152319 } else {
23162320 // For example, extension of an i48 to an i64. Leave the low part alone,
23172321 // sext_inreg the high part.
23542358 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
23552359 SDLoc dl(N);
23562360 Lo = DAG.getNode(ISD::TRUNCATE, dl, NVT, N->getOperand(0));
2357 Hi = DAG.getNode(ISD::SRL, dl,
2358 N->getOperand(0).getValueType(), N->getOperand(0),
2361 Hi = DAG.getNode(ISD::SRL, dl, N->getOperand(0).getValueType(),
2362 N->getOperand(0),
23592363 DAG.getConstant(NVT.getSizeInBits(), dl,
2360 TLI.getPointerTy()));
2364 TLI.getPointerTy(DAG.getDataLayout())));
23612365 Hi = DAG.getNode(ISD::TRUNCATE, dl, NVT, Hi);
23622366 }
23632367
24132417 }
24142418
24152419 Type *RetTy = VT.getTypeForEVT(*DAG.getContext());
2416 EVT PtrVT = TLI.getPointerTy();
2420 EVT PtrVT = TLI.getPointerTy(DAG.getDataLayout());
24172421 Type *PtrTy = PtrVT.getTypeForEVT(*DAG.getContext());
24182422
24192423 // Replace this with a libcall that will check overflow.
28812885 // Transfer high bits from the top of Lo to the bottom of Hi.
28822886 Hi = DAG.getNode(ISD::SHL, dl, NVT, Hi,
28832887 DAG.getConstant(NVT.getSizeInBits() - ExcessBits, dl,
2884 TLI.getPointerTy()));
2885 Hi = DAG.getNode(ISD::OR, dl, NVT, Hi,
2886 DAG.getNode(ISD::SRL, dl, NVT, Lo,
2887 DAG.getConstant(ExcessBits, dl,
2888 TLI.getPointerTy())));
2888 TLI.getPointerTy(DAG.getDataLayout())));
2889 Hi = DAG.getNode(
2890 ISD::OR, dl, NVT, Hi,
2891 DAG.getNode(ISD::SRL, dl, NVT, Lo,
2892 DAG.getConstant(ExcessBits, dl,
2893 TLI.getPointerTy(DAG.getDataLayout()))));
28892894 }
28902895
28912896 // Store both the high bits and maybe some of the low bits.
29552960 ISD::SETLT);
29562961
29572962 // Build a 64 bit pair (0, FF) in the constant pool, with FF in the lo bits.
2958 SDValue FudgePtr = DAG.getConstantPool(
2959 ConstantInt::get(*DAG.getContext(), FF.zext(64)),
2960 TLI.getPointerTy());
2963 SDValue FudgePtr =
2964 DAG.getConstantPool(ConstantInt::get(*DAG.getContext(), FF.zext(64)),
2965 TLI.getPointerTy(DAG.getDataLayout()));
29612966
29622967 // Get a pointer to FF if the sign bit was set, or to 0 otherwise.
29632968 SDValue Zero = DAG.getIntPtrConstant(0, dl);
31133118 for (unsigned i = 0; i < NumOperands; ++i) {
31143119 SDValue Op = N->getOperand(i);
31153120 for (unsigned j = 0; j < NumElem; ++j) {
3116 SDValue Ext = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
3117 InElemTy, Op, DAG.getConstant(j, dl,
3118 TLI.getVectorIdxTy()));
3121 SDValue Ext = DAG.getNode(
3122 ISD::EXTRACT_VECTOR_ELT, dl, InElemTy, Op,
3123 DAG.getConstant(j, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
31193124 Ops[i * NumElem + j] = DAG.getNode(ISD::ANY_EXTEND, dl, OutElemTy, Ext);
31203125 }
31213126 }
31423147 SDValue DAGTypeLegalizer::PromoteIntOp_EXTRACT_VECTOR_ELT(SDNode *N) {
31433148 SDLoc dl(N);
31443149 SDValue V0 = GetPromotedInteger(N->getOperand(0));
3145 SDValue V1 = DAG.getZExtOrTrunc(N->getOperand(1), dl, TLI.getVectorIdxTy());
3150 SDValue V1 = DAG.getZExtOrTrunc(N->getOperand(1), dl,
3151 TLI.getVectorIdxTy(DAG.getDataLayout()));
31463152 SDValue Ext = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
31473153 V0->getValueType(0).getScalarType(), V0, V1);
31483154
31793185
31803186 for (unsigned i=0; i
31813187 // Extract element from incoming vector
3182 SDValue Ex = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, SclrTy,
3183 Incoming, DAG.getConstant(i, dl, TLI.getVectorIdxTy()));
3188 SDValue Ex = DAG.getNode(
3189 ISD::EXTRACT_VECTOR_ELT, dl, SclrTy, Incoming,
3190 DAG.getConstant(i, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
31843191 SDValue Tr = DAG.getNode(ISD::TRUNCATE, dl, RetSclrTy, Ex);
31853192 NewOps.push_back(Tr);
31863193 }
10051005 SDValue Index) {
10061006 SDLoc dl(Index);
10071007 // Make sure the index type is big enough to compute in.
1008 Index = DAG.getZExtOrTrunc(Index, dl, TLI.getPointerTy());
1008 Index = DAG.getZExtOrTrunc(Index, dl, TLI.getPointerTy(DAG.getDataLayout()));
10091009
10101010 // Calculate the element offset and add it to the pointer.
10111011 unsigned EltSize = EltVT.getSizeInBits() / 8; // FIXME: should be ABI size.
10291029 Hi = DAG.getNode(ISD::ANY_EXTEND, dlHi, NVT, Hi);
10301030 Hi = DAG.getNode(ISD::SHL, dlHi, NVT, Hi,
10311031 DAG.getConstant(LVT.getSizeInBits(), dlHi,
1032 TLI.getPointerTy()));
1032 TLI.getPointerTy(DAG.getDataLayout())));
10331033 return DAG.getNode(ISD::OR, dlHi, NVT, Lo, Hi);
10341034 }
10351035
10781078 Args.push_back(Entry);
10791079 }
10801080 SDValue Callee = DAG.getExternalSymbol(TLI.getLibcallName(LC),
1081 TLI.getPointerTy());
1081 TLI.getPointerTy(DAG.getDataLayout()));
10821082
10831083 Type *RetTy = Node->getValueType(0).getTypeForEVT(*DAG.getContext());
10841084
11161116 Lo = DAG.getNode(ISD::TRUNCATE, dl, LoVT, Op);
11171117 Hi = DAG.getNode(ISD::SRL, dl, Op.getValueType(), Op,
11181118 DAG.getConstant(LoVT.getSizeInBits(), dl,
1119 TLI.getPointerTy()));
1119 TLI.getPointerTy(DAG.getDataLayout())));
11201120 Hi = DAG.getNode(ISD::TRUNCATE, dl, HiVT, Hi);
11211121 }
11221122
7272 }
7373
7474 EVT getSetCCResultType(EVT VT) const {
75 return TLI.getSetCCResultType(*DAG.getContext(), VT);
75 return TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT);
7676 }
7777
7878 /// IgnoreNodeResults - Pretend all of this node's results are legal.
120120
121121 SmallVector Vals;
122122 for (unsigned i = 0; i < NumElems; ++i)
123 Vals.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ElemVT,
124 CastInOp, DAG.getConstant(i, dl,
125 TLI.getVectorIdxTy())));
123 Vals.push_back(DAG.getNode(
124 ISD::EXTRACT_VECTOR_ELT, dl, ElemVT, CastInOp,
125 DAG.getConstant(i, dl, TLI.getVectorIdxTy(DAG.getDataLayout()))));
126126
127127 // Build Lo, Hi pair by pairing extracted elements if needed.
128128 unsigned Slot = 0;
502502 // Instead, we load all significant words, mask bits off, and concatenate
503503 // them to form each element. Finally, they are extended to destination
504504 // scalar type to build the destination vector.
505 EVT WideVT = TLI.getPointerTy();
505 EVT WideVT = TLI.getPointerTy(DAG.getDataLayout());
506506
507507 assert(WideVT.isRound() &&
508508 "Could not handle the sophisticated case when the widest integer is"
662662 // and save them into memory individually.
663663 SmallVector Stores;
664664 for (unsigned Idx = 0; Idx < NumElem; Idx++) {
665 SDValue Ex = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
666 RegSclVT, Value, DAG.getConstant(Idx, dl, TLI.getVectorIdxTy()));
665 SDValue Ex = DAG.getNode(
666 ISD::EXTRACT_VECTOR_ELT, dl, RegSclVT, Value,
667 DAG.getConstant(Idx, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
667668
668669 // This scalar TruncStore may be illegal, but we legalize it later.
669670 SDValue Store = DAG.getTruncStore(Chain, dl, Ex, BasePTR,
994995 SDLoc dl(Op);
995996 SmallVector Ops(NumElems);
996997 for (unsigned i = 0; i < NumElems; ++i) {
997 SDValue LHSElem = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, TmpEltVT, LHS,
998 DAG.getConstant(i, dl, TLI.getVectorIdxTy()));
999 SDValue RHSElem = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, TmpEltVT, RHS,
1000 DAG.getConstant(i, dl, TLI.getVectorIdxTy()));
998 SDValue LHSElem = DAG.getNode(
999 ISD::EXTRACT_VECTOR_ELT, dl, TmpEltVT, LHS,
1000 DAG.getConstant(i, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
1001 SDValue RHSElem = DAG.getNode(
1002 ISD::EXTRACT_VECTOR_ELT, dl, TmpEltVT, RHS,
1003 DAG.getConstant(i, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
10011004 Ops[i] = DAG.getNode(ISD::SETCC, dl,
1002 TLI.getSetCCResultType(*DAG.getContext(), TmpEltVT),
1005 TLI.getSetCCResultType(DAG.getDataLayout(),
1006 *DAG.getContext(), TmpEltVT),
10031007 LHSElem, RHSElem, CC);
10041008 Ops[i] = DAG.getSelect(dl, EltVT, Ops[i],
10051009 DAG.getConstant(APInt::getAllOnesValue
250250 Op = GetScalarizedVector(Op);
251251 } else {
252252 EVT VT = OpVT.getVectorElementType();
253 Op = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, Op,
254 DAG.getConstant(0, DL, TLI.getVectorIdxTy()));
253 Op = DAG.getNode(
254 ISD::EXTRACT_VECTOR_ELT, DL, VT, Op,
255 DAG.getConstant(0, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
255256 }
256257 return DAG.getNode(N->getOpcode(), SDLoc(N), DestVT, Op);
257258 }
383384 RHS = GetScalarizedVector(RHS);
384385 } else {
385386 EVT VT = OpVT.getVectorElementType();
386 LHS = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, LHS,
387 DAG.getConstant(0, DL, TLI.getVectorIdxTy()));
388 RHS = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, RHS,
389 DAG.getConstant(0, DL, TLI.getVectorIdxTy()));
387 LHS = DAG.getNode(
388 ISD::EXTRACT_VECTOR_ELT, DL, VT, LHS,
389 DAG.getConstant(0, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
390 RHS = DAG.getNode(
391 ISD::EXTRACT_VECTOR_ELT, DL, VT, RHS,
392 DAG.getConstant(0, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
390393 }
391394
392395 // Turn it into a scalar SETCC.
818821 uint64_t IdxVal = cast(Idx)->getZExtValue();
819822 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, HiVT, Vec,
820823 DAG.getConstant(IdxVal + LoVT.getVectorNumElements(), dl,
821 TLI.getVectorIdxTy()));
824 TLI.getVectorIdxTy(DAG.getDataLayout())));
822825 }
823826
824827 void DAGTypeLegalizer::SplitVecRes_INSERT_SUBVECTOR(SDNode *N, SDValue &Lo,
897900 Lo = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl,
898901 Lo.getValueType(), Lo, Elt, Idx);
899902 else
900 Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, Hi.getValueType(), Hi, Elt,
901 DAG.getConstant(IdxVal - LoNumElts, dl,
902 TLI.getVectorIdxTy()));
903 Hi =
904 DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, Hi.getValueType(), Hi, Elt,
905 DAG.getConstant(IdxVal - LoNumElts, dl,
906 TLI.getVectorIdxTy(DAG.getDataLayout())));
903907 return;
904908 }
905909
12901294 Idx -= Input * NewElts;
12911295
12921296 // Extract the vector element by hand.
1293 SVOps.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT,
1294 Inputs[Input],
1295 DAG.getConstant(Idx, dl,
1296 TLI.getVectorIdxTy())));
1297 SVOps.push_back(DAG.getNode(
1298 ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Inputs[Input],
1299 DAG.getConstant(Idx, dl, TLI.getVectorIdxTy(DAG.getDataLayout()))));
12971300 }
12981301
12991302 // Construct the Lo/Hi output using a BUILD_VECTOR.
17611764 for (const SDValue &Op : N->op_values()) {
17621765 for (unsigned i = 0, e = Op.getValueType().getVectorNumElements();
17631766 i != e; ++i) {
1764 Elts.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT,
1765 Op, DAG.getConstant(i, DL, TLI.getVectorIdxTy())));
1766
1767 Elts.push_back(DAG.getNode(
1768 ISD::EXTRACT_VECTOR_ELT, DL, EltVT, Op,
1769 DAG.getConstant(i, DL, TLI.getVectorIdxTy(DAG.getDataLayout()))));
17671770 }
17681771 }
17691772
18271830 // type. This should normally be something that ends up being legal directly,
18281831 // but in theory if a target has very wide vectors and an annoyingly
18291832 // restricted set of legal types, this split can chain to build things up.
1830 return IsFloat ?
1831 DAG.getNode(ISD::FP_ROUND, DL, OutVT, InterVec,
1832 DAG.getTargetConstant(0, DL, TLI.getPointerTy())) :
1833 DAG.getNode(ISD::TRUNCATE, DL, OutVT, InterVec);
1833 return IsFloat
1834 ? DAG.getNode(ISD::FP_ROUND, DL, OutVT, InterVec,
1835 DAG.getTargetConstant(
1836 0, DL, TLI.getPointerTy(DAG.getDataLayout())))
1837 : DAG.getNode(ISD::TRUNCATE, DL, OutVT, InterVec);
18341838 }
18351839
18361840 SDValue DAGTypeLegalizer::SplitVecOp_VSETCC(SDNode *N) {
20602064 // }
20612065 while (CurNumElts != 0) {
20622066 while (CurNumElts >= NumElts) {
2063 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp1,
2064 DAG.getConstant(Idx, dl,
2065 TLI.getVectorIdxTy()));
2066 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp2,
2067 DAG.getConstant(Idx, dl,
2068 TLI.getVectorIdxTy()));
2067 SDValue EOp1 = DAG.getNode(
2068 ISD::EXTRACT_SUBVECTOR, dl, VT, InOp1,
2069 DAG.getConstant(Idx, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
2070 SDValue EOp2 = DAG.getNode(
2071 ISD::EXTRACT_SUBVECTOR, dl, VT, InOp2,
2072 DAG.getConstant(Idx, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
20692073 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, VT, EOp1, EOp2);
20702074 Idx += NumElts;
20712075 CurNumElts -= NumElts;
20772081
20782082 if (NumElts == 1) {
20792083 for (unsigned i = 0; i != CurNumElts; ++i, ++Idx) {
2080 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
2081 InOp1,
2082 DAG.getConstant(Idx, dl,
2083 TLI.getVectorIdxTy()));
2084 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
2085 InOp2,
2086 DAG.getConstant(Idx, dl,
2087 TLI.getVectorIdxTy()));
2084 SDValue EOp1 = DAG.getNode(
2085 ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT, InOp1,
2086 DAG.getConstant(Idx, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
2087 SDValue EOp2 = DAG.getNode(
2088 ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT, InOp2,
2089 DAG.getConstant(Idx, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
20882090 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, WidenEltVT,
20892091 EOp1, EOp2);
20902092 }
21212123 SDValue VecOp = DAG.getUNDEF(NextVT);
21222124 unsigned NumToInsert = ConcatEnd - Idx - 1;
21232125 for (unsigned i = 0, OpIdx = Idx+1; i < NumToInsert; i++, OpIdx++) {
2124 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NextVT, VecOp,
2125 ConcatOps[OpIdx],
2126 DAG.getConstant(i, dl, TLI.getVectorIdxTy()));
2126 VecOp = DAG.getNode(
2127 ISD::INSERT_VECTOR_ELT, dl, NextVT, VecOp, ConcatOps[OpIdx],
2128 DAG.getConstant(i, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
21272129 }
21282130 ConcatOps[Idx+1] = VecOp;
21292131 ConcatEnd = Idx + 2;
22092211 }
22102212
22112213 if (InVTNumElts % WidenNumElts == 0) {
2212 SDValue InVal = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InWidenVT, InOp,
2213 DAG.getConstant(0, DL, TLI.getVectorIdxTy()));
2214 SDValue InVal = DAG.getNode(
2215 ISD::EXTRACT_SUBVECTOR, DL, InWidenVT, InOp,
2216 DAG.getConstant(0, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
22142217 // Extract the input and convert the shorten input vector.
22152218 if (N->getNumOperands() == 1)
22162219 return DAG.getNode(Opcode, DL, WidenVT, InVal);
22242227 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
22252228 unsigned i;
22262229 for (i=0; i < MinElts; ++i) {
2227 SDValue Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, InEltVT, InOp,
2228 DAG.getConstant(i, DL, TLI.getVectorIdxTy()));
2230 SDValue Val = DAG.getNode(
2231 ISD::EXTRACT_VECTOR_ELT, DL, InEltVT, InOp,
2232 DAG.getConstant(i, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
22292233 if (N->getNumOperands() == 1)
22302234 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val);
22312235 else
24512455 if (InputWidened)
24522456 InOp = GetWidenedVector(InOp);
24532457 for (unsigned j=0; j < NumInElts; ++j)
2454 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2455 DAG.getConstant(j, dl, TLI.getVectorIdxTy()));
2458 Ops[Idx++] = DAG.getNode(
2459 ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2460 DAG.getConstant(j, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
24562461 }
24572462 SDValue UndefVal = DAG.getUNDEF(EltVT);
24582463 for (; Idx < WidenNumElts; ++Idx)
25092514
25102515 if (InVTNumElts % WidenNumElts == 0) {
25112516 // Extract the input and convert the shorten input vector.
2512 InOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InWidenVT, InOp,
2513 DAG.getConstant(0, dl, TLI.getVectorIdxTy()));
2517 InOp = DAG.getNode(
2518 ISD::EXTRACT_SUBVECTOR, dl, InWidenVT, InOp,
2519 DAG.getConstant(0, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
25142520 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
25152521 SatOp, CvtCode);
25162522 }
25252531 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
25262532 unsigned i;
25272533 for (i=0; i < MinElts; ++i) {
2528 SDValue ExtVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
2529 DAG.getConstant(i, dl, TLI.getVectorIdxTy()));
2534 SDValue ExtVal = DAG.getNode(
2535 ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
2536 DAG.getConstant(i, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
25302537 Ops[i] = DAG.getConvertRndSat(WidenVT, dl, ExtVal, DTyOp, STyOp, RndOp,
25312538 SatOp, CvtCode);
25322539 }
25682575 unsigned NumElts = VT.getVectorNumElements();
25692576 unsigned i;
25702577 for (i=0; i < NumElts; ++i)
2571 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2572 DAG.getConstant(IdxVal + i, dl, TLI.getVectorIdxTy()));
2578 Ops[i] =
2579 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2580 DAG.getConstant(IdxVal + i, dl,
2581 TLI.getVectorIdxTy(DAG.getDataLayout())));
25732582
25742583 SDValue UndefVal = DAG.getUNDEF(EltVT);
25752584 for (; i < WidenNumElts; ++i)
28702879 assert(FixedVT.getVectorNumElements() != InVT.getVectorNumElements() &&
28712880 "We can't have the same type as we started with!");
28722881 if (FixedVT.getVectorNumElements() > InVT.getVectorNumElements())
2873 InOp = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, FixedVT,
2874 DAG.getUNDEF(FixedVT), InOp,
2875 DAG.getConstant(0, DL, TLI.getVectorIdxTy()));
2882 InOp = DAG.getNode(
2883 ISD::INSERT_SUBVECTOR, DL, FixedVT, DAG.getUNDEF(FixedVT), InOp,
2884 DAG.getConstant(0, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
28762885 else
2877 InOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, FixedVT, InOp,
2878 DAG.getConstant(0, DL, TLI.getVectorIdxTy()));
2886 InOp = DAG.getNode(
2887 ISD::EXTRACT_SUBVECTOR, DL, FixedVT, InOp,
2888 DAG.getConstant(0, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
28792889 break;
28802890 }
28812891 }
29182928 unsigned Opcode = N->getOpcode();
29192929 SmallVector Ops(NumElts);
29202930 for (unsigned i=0; i < NumElts; ++i)
2921 Ops[i] = DAG.getNode(Opcode, dl, EltVT,
2922 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
2923 DAG.getConstant(i, dl,
2924 TLI.getVectorIdxTy())));
2931 Ops[i] = DAG.getNode(
2932 Opcode, dl, EltVT,
2933 DAG.getNode(
2934 ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
2935 DAG.getConstant(i, dl, TLI.getVectorIdxTy(DAG.getDataLayout()))));
29252936
29262937 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, Ops);
29272938 }
29412952 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), VT, NewNumElts);
29422953 if (TLI.isTypeLegal(NewVT)) {
29432954 SDValue BitOp = DAG.getNode(ISD::BITCAST, dl, NewVT, InOp);
2944 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, BitOp,
2945 DAG.getConstant(0, dl, TLI.getVectorIdxTy()));
2955 return DAG.getNode(
2956 ISD::EXTRACT_VECTOR_ELT, dl, VT, BitOp,
2957 DAG.getConstant(0, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
29462958 }
29472959 }
29482960
29692981 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
29702982 InOp = GetWidenedVector(InOp);
29712983 for (unsigned j=0; j < NumInElts; ++j)
2972 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2973 DAG.getConstant(j, dl, TLI.getVectorIdxTy()));
2984 Ops[Idx++] = DAG.getNode(
2985 ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2986 DAG.getConstant(j, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
29742987 }
29752988 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, Ops);
29762989 }
30513064
30523065 // Get a new SETCC node to compare the newly widened operands.
30533066 // Only some of the compared elements are legal.
3054 EVT SVT = TLI.getSetCCResultType(*DAG.getContext(), InOp0.getValueType());
3067 EVT SVT = TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(),
3068 InOp0.getValueType());
30553069 SDValue WideSETCC = DAG.getNode(ISD::SETCC, SDLoc(N),
30563070 SVT, InOp0, InOp1, N->getOperand(2));
30573071
30593073 EVT ResVT = EVT::getVectorVT(*DAG.getContext(),
30603074 SVT.getVectorElementType(),
30613075 N->getValueType(0).getVectorNumElements());
3062 SDValue CC = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl,
3063 ResVT, WideSETCC,
3064 DAG.getConstant(0, dl, TLI.getVectorIdxTy()));
3076 SDValue CC = DAG.getNode(
3077 ISD::EXTRACT_SUBVECTOR, dl, ResVT, WideSETCC,
3078 DAG.getConstant(0, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
30653079
30663080 return PromoteTargetBoolean(CC, N->getValueType(0));
30673081 }
31573171 Idx = Idx * LdTy.getSizeInBits() / NewLdTy.getSizeInBits();
31583172 LdTy = NewLdTy;
31593173 }
3160 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, VecOp, LdOps[i],
3161 DAG.getConstant(Idx++, dl, TLI.getVectorIdxTy()));
3174 VecOp = DAG.getNode(
3175 ISD::INSERT_VECTOR_ELT, dl, NewVecVT, VecOp, LdOps[i],
3176 DAG.getConstant(Idx++, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
31623177 }
31633178 return DAG.getNode(ISD::BITCAST, dl, VecTy, VecOp);
31643179 }
34053420 if (NewVT.isVector()) {
34063421 unsigned NumVTElts = NewVT.getVectorNumElements();
34073422 do {
3408 SDValue EOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NewVT, ValOp,
3409 DAG.getConstant(Idx, dl,
3410 TLI.getVectorIdxTy()));
3423 SDValue EOp = DAG.getNode(
3424 ISD::EXTRACT_SUBVECTOR, dl, NewVT, ValOp,
3425 DAG.getConstant(Idx, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
34113426 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr,
34123427 ST->getPointerInfo().getWithOffset(Offset),
34133428 isVolatile, isNonTemporal,
34273442 // Readjust index position based on new vector type
34283443 Idx = Idx * ValEltWidth / NewVTWidth;
34293444 do {
3430 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, VecOp,
3431 DAG.getConstant(Idx++, dl, TLI.getVectorIdxTy()));
3445 SDValue EOp = DAG.getNode(
3446 ISD::EXTRACT_VECTOR_ELT, dl, NewVT, VecOp,
3447 DAG.getConstant(Idx++, dl,
3448 TLI.getVectorIdxTy(DAG.getDataLayout())));
34323449 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr,
34333450 ST->getPointerInfo().getWithOffset(Offset),
34343451 isVolatile, isNonTemporal,
34743491 EVT ValEltVT = ValVT.getVectorElementType();
34753492 unsigned Increment = ValEltVT.getSizeInBits() / 8;
34763493 unsigned NumElts = StVT.getVectorNumElements();
3477 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
3478 DAG.getConstant(0, dl, TLI.getVectorIdxTy()));
3494 SDValue EOp = DAG.getNode(
3495 ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
3496 DAG.getConstant(0, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
34793497 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, BasePtr,
34803498 ST->getPointerInfo(), StEltVT,
34813499 isVolatile, isNonTemporal, Align,
34863504 BasePtr,
34873505 DAG.getConstant(Offset, dl,
34883506 BasePtr.getValueType()));
3489 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
3490 DAG.getConstant(0, dl, TLI.getVectorIdxTy()));
3507 SDValue EOp = DAG.getNode(
3508 ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
3509 DAG.getConstant(0, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
34913510 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, NewBasePtr,
34923511 ST->getPointerInfo().getWithOffset(Offset),
34933512 StEltVT, isVolatile, isNonTemporal,
35233542 }
35243543
35253544 if (WidenNumElts < InNumElts && InNumElts % WidenNumElts)
3526 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NVT, InOp,
3527 DAG.getConstant(0, dl, TLI.getVectorIdxTy()));
3545 return DAG.getNode(
3546 ISD::EXTRACT_SUBVECTOR, dl, NVT, InOp,
3547 DAG.getConstant(0, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
35283548
35293549 // Fall back to extract and build.
35303550 SmallVector Ops(WidenNumElts);
35323552 unsigned MinNumElts = std::min(WidenNumElts, InNumElts);
35333553 unsigned Idx;
35343554 for (Idx = 0; Idx < MinNumElts; ++Idx)
3535 Ops[Idx] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
3536 DAG.getConstant(Idx, dl, TLI.getVectorIdxTy()));
3555 Ops[Idx] = DAG.getNode(
3556 ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
3557 DAG.getConstant(Idx, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
35373558
35383559 SDValue UndefVal = DAG.getUNDEF(EltVT);
35393560 for ( ; Idx < WidenNumElts; ++Idx)
12331233 }
12341234
12351235 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, SDLoc DL, bool isTarget) {
1236 return getConstant(Val, DL, TLI->getPointerTy(), isTarget);
1236 return getConstant(Val, DL, TLI->getPointerTy(getDataLayout()), isTarget);
12371237 }
12381238
12391239 SDValue SelectionDAG::getConstantFP(const APFloat& V, SDLoc DL, EVT VT,
18661866 std::max((unsigned)getDataLayout().getPrefTypeAlignment(Ty), minAlign);
18671867
18681868 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1869 return getFrameIndex(FrameIdx, TLI->getPointerTy());
1869 return getFrameIndex(FrameIdx, TLI->getPointerTy(getDataLayout()));
18701870 }
18711871
18721872 /// CreateStackTemporary - Create a stack temporary suitable for holding
18821882
18831883 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
18841884 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1885 return getFrameIndex(FrameIdx, TLI->getPointerTy());
1885 return getFrameIndex(FrameIdx, TLI->getPointerTy(getDataLayout()));
18861886 }
18871887
18881888 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
40674067 unsigned AS = 0;
40684068 if (DstAlign >= DAG.getDataLayout().getPointerPrefAlignment(AS) ||
40694069 TLI.allowsMisalignedMemoryAccesses(VT, AS, DstAlign)) {
4070 VT = TLI.getPointerTy();
4070 VT = TLI.getPointerTy(DAG.getDataLayout());
40714071 } else {
40724072 switch (DstAlign & 7) {
40734073 case 0: VT = MVT::i64; break;
44934493 Entry.Node = Size; Args.push_back(Entry);
44944494 // FIXME: pass in SDLoc
44954495 TargetLowering::CallLoweringInfo CLI(*this);
4496 CLI.setDebugLoc(dl).setChain(Chain)
4497 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMCPY),
4498 Type::getVoidTy(*getContext()),
4499 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMCPY),
4500 TLI->getPointerTy()), std::move(Args), 0)
4501 .setDiscardResult()
4502 .setTailCall(isTailCall);
4496 CLI.setDebugLoc(dl)
4497 .setChain(Chain)
4498 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMCPY),
4499 Type::getVoidTy(*getContext()),
4500 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMCPY),
4501 TLI->getPointerTy(getDataLayout())),
4502 std::move(Args), 0)
4503 .setDiscardResult()
4504 .setTailCall(isTailCall);
45034505
45044506 std::pair CallResult = TLI->LowerCallTo(CLI);
45054507 return CallResult.second;
45494551 Entry.Node = Size; Args.push_back(Entry);
45504552 // FIXME: pass in SDLoc
45514553 TargetLowering::CallLoweringInfo CLI(*this);
4552 CLI.setDebugLoc(dl).setChain(Chain)
4553 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMMOVE),
4554 Type::getVoidTy(*getContext()),
4555 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMMOVE),
4556 TLI->getPointerTy()), std::move(Args), 0)
4557 .setDiscardResult()
4558 .setTailCall(isTailCall);
4554 CLI.setDebugLoc(dl)
4555 .setChain(Chain)
4556 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMMOVE),
4557 Type::getVoidTy(*getContext()),
4558 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMMOVE),
4559 TLI->getPointerTy(getDataLayout())),
4560 std::move(Args), 0)
4561 .setDiscardResult()
4562 .setTailCall(isTailCall);
45594563
45604564 std::pair CallResult = TLI->LowerCallTo(CLI);
45614565 return CallResult.second;
46074611
46084612 // FIXME: pass in SDLoc
46094613 TargetLowering::CallLoweringInfo CLI(*this);
4610 CLI.setDebugLoc(dl).setChain(Chain)
4611 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMSET),
4612 Type::getVoidTy(*getContext()),
4613 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMSET),
4614 TLI->getPointerTy()), std::move(Args), 0)
4615 .setDiscardResult()
4616 .setTailCall(isTailCall);
4614 CLI.setDebugLoc(dl)
4615 .setChain(Chain)
4616 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMSET),
4617 Type::getVoidTy(*getContext()),
4618 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMSET),
4619 TLI->getPointerTy(getDataLayout())),
4620 std::move(Args), 0)
4621 .setDiscardResult()
4622 .setTailCall(isTailCall);
46174623
46184624 std::pair CallResult = TLI->LowerCallTo(CLI);
46194625 return CallResult.second;
67836789 if (OperandVT.isVector()) {
67846790 // A vector operand; extract a single element.
67856791 EVT OperandEltVT = OperandVT.getVectorElementType();
6786 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6787 OperandEltVT,
6788 Operand,
6789 getConstant(i, dl, TLI->getVectorIdxTy()));
6792 Operands[j] =
6793 getNode(ISD::EXTRACT_VECTOR_ELT, dl, OperandEltVT, Operand,
6794 getConstant(i, dl, TLI->getVectorIdxTy(getDataLayout())));
67906795 } else {
67916796 // A scalar operand; just use it as is.
67926797 Operands[j] = Operand;
69496954 "More vector elements requested than available!");
69506955 SDValue Lo, Hi;
69516956 Lo = getNode(ISD::EXTRACT_SUBVECTOR, DL, LoVT, N,
6952 getConstant(0, DL, TLI->getVectorIdxTy()));
6957 getConstant(0, DL, TLI->getVectorIdxTy(getDataLayout())));
69536958 Hi = getNode(ISD::EXTRACT_SUBVECTOR, DL, HiVT, N,
69546959 getConstant(LoVT.getVectorNumElements(), DL,
6955 TLI->getVectorIdxTy()));
6960 TLI->getVectorIdxTy(getDataLayout())));
69566961 return std::make_pair(Lo, Hi);
69576962 }
69586963
69646969 Count = VT.getVectorNumElements();
69656970
69666971 EVT EltVT = VT.getVectorElementType();
6967 EVT IdxTy = TLI->getVectorIdxTy();
6972 EVT IdxTy = TLI->getVectorIdxTy(getDataLayout());
69686973 SDLoc SL(Op);
69696974 for (unsigned i = Start, e = Start + Count; i != e; ++i) {
69706975 Args.push_back(getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT,
163163 std::swap(Lo, Hi);
164164 EVT TotalVT = EVT::getIntegerVT(*DAG.getContext(), NumParts * PartBits);
165165 Hi = DAG.getNode(ISD::ANY_EXTEND, DL, TotalVT, Hi);
166 Hi = DAG.getNode(ISD::SHL, DL, TotalVT, Hi,
167 DAG.getConstant(Lo.getValueType().getSizeInBits(), DL,
168 TLI.getPointerTy()));
166 Hi =
167 DAG.getNode(ISD::SHL, DL, TotalVT, Hi,
168 DAG.getConstant(Lo.getValueType().getSizeInBits(), DL,
169 TLI.getPointerTy(DAG.getDataLayout())));
169170 Lo = DAG.getNode(ISD::ZERO_EXTEND, DL, TotalVT, Lo);
170171 Val = DAG.getNode(ISD::OR, DL, TotalVT, Lo, Hi);
171172 }
210211 if (PartEVT.isFloatingPoint() && ValueVT.isFloatingPoint()) {
211212 // FP_ROUND's are always exact here.
212213 if (ValueVT.bitsLT(Val.getValueType()))
213 return DAG.getNode(ISD::FP_ROUND, DL, ValueVT, Val,
214 DAG.getTargetConstant(1, DL, TLI.getPointerTy()));
214 return DAG.getNode(
215 ISD::FP_ROUND, DL, ValueVT, Val,
216 DAG.getTargetConstant(1, DL, TLI.getPointerTy(DAG.getDataLayout())));
215217
216218 return DAG.getNode(ISD::FP_EXTEND, DL, ValueVT, Val);
217219 }
304306 if (PartEVT.getVectorElementType() == ValueVT.getVectorElementType()) {
305307 assert(PartEVT.getVectorNumElements() > ValueVT.getVectorNumElements() &&
306308 "Cannot narrow, it would be a lossy transformation");
307 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, ValueVT, Val,
308 DAG.getConstant(0, DL, TLI.getVectorIdxTy()));
309 return DAG.getNode(
310 ISD::EXTRACT_SUBVECTOR, DL, ValueVT, Val,
311 DAG.getConstant(0, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
309312 }
310313
311314 // Vector/Vector bitcast.
496499 // undef elements.
497500 SmallVector Ops;
498501 for (unsigned i = 0, e = ValueVT.getVectorNumElements(); i != e; ++i)
499 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL,
500 ElementVT, Val, DAG.getConstant(i, DL,
501 TLI.getVectorIdxTy())));
502 Ops.push_back(DAG.getNode(
503 ISD::EXTRACT_VECTOR_ELT, DL, ElementVT, Val,
504 DAG.getConstant(i, DL, TLI.getVectorIdxTy(DAG.getDataLayout()))));
502505
503506 for (unsigned i = ValueVT.getVectorNumElements(),
504507 e = PartVT.getVectorNumElements(); i != e; ++i)
523526 // Vector -> scalar conversion.
524527 assert(ValueVT.getVectorNumElements() == 1 &&
525528 "Only trivial vector-to-scalar conversions should get here!");
526 Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL,
527 PartVT, Val,
528 DAG.getConstant(0, DL, TLI.getVectorIdxTy()));
529 Val = DAG.getNode(
530 ISD::EXTRACT_VECTOR_ELT, DL, PartVT, Val,
531 DAG.getConstant(0, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
529532
530533 bool Smaller = ValueVT.bitsLE(PartVT);
531534 Val = DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND),
553556 SmallVector Ops(NumIntermediates);
554557 for (unsigned i = 0; i != NumIntermediates; ++i) {
555558 if (IntermediateVT.isVector())
556 Ops[i] = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL,
557 IntermediateVT, Val,
558 DAG.getConstant(i * (NumElements / NumIntermediates), DL,
559 TLI.getVectorIdxTy()));
559 Ops[i] =
560 DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, IntermediateVT, Val,
561 DAG.getConstant(i * (NumElements / NumIntermediates), DL,
562 TLI.getVectorIdxTy(DAG.getDataLayout())));
560563 else
561 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL,
562 IntermediateVT, Val,
563 DAG.getConstant(i, DL, TLI.getVectorIdxTy()));
564 Ops[i] = DAG.getNode(
565 ISD::EXTRACT_VECTOR_ELT, DL, IntermediateVT, Val,
566 DAG.getConstant(i, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
564567 }
565568
566569 // Split the intermediate operands into legal parts.
10301033 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
10311034
10321035 if (const Constant *C = dyn_cast(V)) {
1033 EVT VT = TLI.getValueType(V->getType(), true);
1036 EVT VT = TLI.getValueType(DAG.getDataLayout(), V->getType(), true);
10341037
10351038 if (const ConstantInt *CI = dyn_cast(C))
10361039 return DAG.getConstant(*CI, getCurSDLoc(), VT);
10401043
10411044 if (isa(C)) {
10421045 unsigned AS = V->getType()->getPointerAddressSpace();
1043 return DAG.getConstant(0, getCurSDLoc(), TLI.getPointerTy(AS));
1046 return DAG.getConstant(0, getCurSDLoc(),
1047 TLI.getPointerTy(DAG.getDataLayout(), AS));
10441048 }
10451049
10461050 if (const ConstantFP *CFP = dyn_cast(C))
11261130 Ops.push_back(getValue(CV->getOperand(i)));
11271131 } else {
11281132 assert(isa(C) && "Unknown vector constant!");
1129 EVT EltVT = TLI.getValueType(VecTy->getElementType());
1133 EVT EltVT =
1134 TLI.getValueType(DAG.getDataLayout(), VecTy->getElementType());
11301135
11311136 SDValue Op;
11321137 if (EltVT.isFloatingPoint())
11461151 DenseMap::iterator SI =
11471152 FuncInfo.StaticAllocaMap.find(AI);
11481153 if (SI != FuncInfo.StaticAllocaMap.end())
1149 return DAG.getFrameIndex(SI->second, TLI.getPointerTy());
1154 return DAG.getFrameIndex(SI->second,
1155 TLI.getPointerTy(DAG.getDataLayout()));
11501156 }
11511157
11521158 // If this is an instruction which fast-isel has deferred, select it now.
16931699 void SelectionDAGBuilder::visitJumpTable(JumpTable &JT) {
16941700 // Emit the code for the jump table
16951701 assert(JT.Reg != -1U && "Should lower JT Header first!");
1696 EVT PTy = DAG.getTargetLoweringInfo().getPointerTy();
1702 EVT PTy = DAG.getTargetLoweringInfo().getPointerTy(DAG.getDataLayout());
16971703 SDValue Index = DAG.getCopyFromReg(getControlRoot(), getCurSDLoc(),
16981704 JT.Reg, PTy);
16991705 SDValue Table = DAG.getJumpTable(JT.JTI, PTy);
17241730 // This value may be smaller or larger than the target's pointer type, and
17251731 // therefore require extension or truncating.
17261732 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
1727 SwitchOp = DAG.getZExtOrTrunc(Sub, dl, TLI.getPointerTy());
1728
1729 unsigned JumpTableReg = FuncInfo.CreateReg(TLI.getPointerTy());
1733 SwitchOp = DAG.getZExtOrTrunc(Sub, dl, TLI.getPointerTy(DAG.getDataLayout()));
1734
1735 unsigned JumpTableReg =
1736 FuncInfo.CreateReg(TLI.getPointerTy(DAG.getDataLayout()));
17301737 SDValue CopyTo = DAG.getCopyToReg(getControlRoot(), dl,
17311738 JumpTableReg, SwitchOp);
17321739 JT.Reg = JumpTableReg;
17341741 // Emit the range check for the jump table, and branch to the default block
17351742 // for the switch statement if the value being switched on exceeds the largest
17361743 // case in the switch.
1737 SDValue CMP =
1738 DAG.getSetCC(dl, TLI.getSetCCResultType(*DAG.getContext(),
1739 Sub.getValueType()),
1740 Sub, DAG.getConstant(JTH.Last - JTH.First, dl, VT),
1741 ISD::SETUGT);
1744 SDValue CMP = DAG.getSetCC(
1745 dl, TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(),
1746 Sub.getValueType()),
1747 Sub, DAG.getConstant(JTH.Last - JTH.First, dl, VT), ISD::SETUGT);
17421748
17431749 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl,
17441750 MVT::Other, CopyTo, CMP,
17631769
17641770 // First create the loads to the guard/stack slot for the comparison.
17651771 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
1766 EVT PtrTy = TLI.getPointerTy();
1772 EVT PtrTy = TLI.getPointerTy(DAG.getDataLayout());
17671773
17681774 MachineFrameInfo *MFI = ParentBB->getParent()->getFrameInfo();
17691775 int FI = MFI->getStackProtectorIndex();
17991805 EVT VT = Guard.getValueType();
18001806 SDValue Sub = DAG.getNode(ISD::SUB, dl, VT, Guard, StackSlot);
18011807
1802 SDValue Cmp =
1803 DAG.getSetCC(dl, TLI.getSetCCResultType(*DAG.getContext(),
1804 Sub.getValueType()),
1805 Sub, DAG.getConstant(0, dl, VT), ISD::SETNE);
1808 SDValue Cmp = DAG.getSetCC(dl, TLI.getSetCCResultType(DAG.getDataLayout(),
1809 *DAG.getContext(),
1810 Sub.getValueType()),
1811 Sub, DAG.getConstant(0, dl, VT), ISD::SETNE);
18061812
18071813 // If the sub is not 0, then we know the guard/stackslot do not equal, so
18081814 // branch to failure MBB.
18481854
18491855 // Check range
18501856 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
1851 SDValue RangeCmp =
1852 DAG.getSetCC(dl, TLI.getSetCCResultType(*DAG.getContext(),
1853 Sub.getValueType()),
1854 Sub, DAG.getConstant(B.Range, dl, VT), ISD::SETUGT);
1857 SDValue RangeCmp = DAG.getSetCC(
1858 dl, TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(),
1859 Sub.getValueType()),
1860 Sub, DAG.getConstant(B.Range, dl, VT), ISD::SETUGT);
18551861
18561862 // Determine the type of the test operands.
18571863 bool UsePtrType = false;
18671873 }
18681874 }
18691875 if (UsePtrType) {
1870 VT = TLI.getPointerTy();
1876 VT = TLI.getPointerTy(DAG.getDataLayout());
18711877 Sub = DAG.getZExtOrTrunc(Sub, dl, VT);
18721878 }
18731879
19091915 // Testing for a single bit; just compare the shift count with what it
19101916 // would need to be to shift a 1 bit in that position.
19111917 Cmp = DAG.getSetCC(
1912 dl, TLI.getSetCCResultType(*DAG.getContext(), VT), ShiftOp,
1913 DAG.getConstant(countTrailingZeros(B.Mask), dl, VT), ISD::SETEQ);
1918 dl, TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT),
1919 ShiftOp, DAG.getConstant(countTrailingZeros(B.Mask), dl, VT),
1920 ISD::SETEQ);
19141921 } else if (PopCount == BB.Range) {
19151922 // There is only one zero bit in the range, test for it directly.
19161923 Cmp = DAG.getSetCC(
1917 dl, TLI.getSetCCResultType(*DAG.getContext(), VT), ShiftOp,
1918 DAG.getConstant(countTrailingOnes(B.Mask), dl, VT), ISD::SETNE);
1924 dl, TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT),
1925 ShiftOp, DAG.getConstant(countTrailingOnes(B.Mask), dl, VT),
1926 ISD::SETNE);
19191927 } else {
19201928 // Make desired shift
19211929 SDValue SwitchVal = DAG.getNode(ISD::SHL, dl, VT,
19241932 // Emit bit tests and jumps
19251933 SDValue AndOp = DAG.getNode(ISD::AND, dl,
19261934 VT, SwitchVal, DAG.getConstant(B.Mask, dl, VT));
1927 Cmp = DAG.getSetCC(dl, TLI.getSetCCResultType(*DAG.getContext(), VT), AndOp,
1928 DAG.getConstant(0, dl, VT), ISD::SETNE);
1935 Cmp = DAG.getSetCC(
1936 dl, TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT),
1937 AndOp, DAG.getConstant(0, dl, VT), ISD::SETNE);
19291938 }
19301939
19311940 // The branch weight from SwitchBB to B.TargetBB is B.ExtraWeight.
20222031 if (FuncInfo.ExceptionPointerVirtReg) {
20232032 Ops[0] = DAG.getZExtOrTrunc(
20242033 DAG.getCopyFromReg(DAG.getEntryNode(), dl,
2025 FuncInfo.ExceptionPointerVirtReg, TLI.getPointerTy()),
2034 FuncInfo.ExceptionPointerVirtReg,
2035 TLI.getPointerTy(DAG.getDataLayout())),
20262036 dl, ValueVTs[0]);
20272037 } else {
2028 Ops[0] = DAG.getConstant(0, dl, TLI.getPointerTy());
2038 Ops[0] = DAG.getConstant(0, dl, TLI.getPointerTy(DAG.getDataLayout()));
20292039 }
20302040 Ops[1] = DAG.getZExtOrTrunc(
20312041 DAG.getCopyFromReg(DAG.getEntryNode(), dl,
2032 FuncInfo.ExceptionSelectorVirtReg, TLI.getPointerTy()),
2042 FuncInfo.ExceptionSelectorVirtReg,
2043 TLI.getPointerTy(DAG.getDataLayout())),
20332044 dl, ValueVTs[1]);
20342045
20352046 // Merge into one.
20462057
20472058 // Get the typeid that we will dispatch on later.
20482059 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2049 const TargetRegisterClass *RC = TLI.getRegClassFor(TLI.getPointerTy());
2060 const TargetRegisterClass *RC =
2061 TLI.getRegClassFor(TLI.getPointerTy(DAG.getDataLayout()));
20502062 unsigned VReg = FuncInfo.MF->getRegInfo().createVirtualRegister(RC);
20512063 unsigned TypeID = DAG.getMachineFunction().getMMI().getTypeIDFor(ClauseGV);
2052 SDValue Sel = DAG.getConstant(TypeID, dl, TLI.getPointerTy());
2064 SDValue Sel =
2065 DAG.getConstant(TypeID, dl, TLI.getPointerTy(DAG.getDataLayout()));
20532066 Chain = DAG.getCopyToReg(Chain, dl, VReg, Sel);
20542067
20552068 // Branch to the main landing pad block.
22562269 SDValue Op2 = getValue(I.getOperand(1));
22572270 ISD::CondCode Opcode = getICmpCondCode(predicate);
22582271
2259 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(I.getType());
2272 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(),
2273 I.getType());
22602274 setValue(&I, DAG.getSetCC(getCurSDLoc(), DestVT, Op1, Op2, Opcode));
22612275 }
22622276
22712285 ISD::CondCode Condition = getFCmpCondCode(predicate);
22722286 if (TM.Options.NoNaNsFPMath)
22732287 Condition = getFCmpCodeWithoutNaN(Condition);
2274 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(I.getType());
2288 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(),
2289 I.getType());
22752290 setValue(&I, DAG.getSetCC(getCurSDLoc(), DestVT, Op1, Op2, Condition));
22762291 }
22772292
23372352 void SelectionDAGBuilder::visitTrunc(const User &I) {
23382353 // TruncInst cannot be a no-op cast because sizeof(src) > sizeof(dest).
23392354 SDValue N = getValue(I.getOperand(0));
2340 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(I.getType());
2355 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(),
2356 I.getType());
23412357 setValue(&I, DAG.getNode(ISD::TRUNCATE, getCurSDLoc(), DestVT, N));
23422358 }
23432359
23452361 // ZExt cannot be a no-op cast because sizeof(src) < sizeof(dest).
23462362 // ZExt also can't be a cast to bool for same reason. So, nothing much to do
23472363 SDValue N = getValue(I.getOperand(0));
2348 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(I.getType());
2364 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(),
2365 I.getType());
23492366 setValue(&I, DAG.getNode(ISD::ZERO_EXTEND, getCurSDLoc(), DestVT, N));
23502367 }
23512368
23532370 // SExt cannot be a no-op cast because sizeof(src) < sizeof(dest).
23542371 // SExt also can't be a cast to bool for same reason. So, nothing much to do
23552372 SDValue N = getValue(I.getOperand(0));
2356 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(I.getType());
2373 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(),
2374 I.getType());
23572375 setValue(&I, DAG.getNode(ISD::SIGN_EXTEND, getCurSDLoc(), DestVT, N));
23582376 }
23592377
23622380 SDValue N = getValue(I.getOperand(0));
23632381 SDLoc dl = getCurSDLoc();
23642382 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2365 EVT DestVT = TLI.getValueType(I.getType());
2383 EVT DestVT = TLI.getValueType(DAG.getDataLayout(), I.getType());
23662384 setValue(&I, DAG.getNode(ISD::FP_ROUND, dl, DestVT, N,
2367 DAG.getTargetConstant(0, dl, TLI.getPointerTy())));
2385 DAG.getTargetConstant(
2386 0, dl, TLI.getPointerTy(DAG.getDataLayout()))));
23682387 }
23692388
23702389 void SelectionDAGBuilder::visitFPExt(const User &I) {
23712390 // FPExt is never a no-op cast, no need to check
23722391 SDValue N = getValue(I.getOperand(0));
2373 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(I.getType());
2392 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(),
2393 I.getType());
23742394 setValue(&I, DAG.getNode(ISD::FP_EXTEND, getCurSDLoc(), DestVT, N));
23752395 }
23762396
23772397 void SelectionDAGBuilder::visitFPToUI(const User &I) {
23782398 // FPToUI is never a no-op cast, no need to check
23792399 SDValue N = getValue(I.getOperand(0));
2380 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(I.getType());
2400 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(),
2401 I.getType());
23812402 setValue(&I, DAG.getNode(ISD::FP_TO_UINT, getCurSDLoc(), DestVT, N));
23822403 }
23832404
23842405 void SelectionDAGBuilder::visitFPToSI(const User &I) {
23852406 // FPToSI is never a no-op cast, no need to check
23862407 SDValue N = getValue(I.getOperand(0));
2387 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(I.getType());
2408 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(),
2409 I.getType());
23882410 setValue(&I, DAG.getNode(ISD::FP_TO_SINT, getCurSDLoc(), DestVT, N));
23892411 }
23902412
23912413 void SelectionDAGBuilder::visitUIToFP(const User &I) {
23922414 // UIToFP is never a no-op cast, no need to check
23932415 SDValue N = getValue(I.getOperand(0));
2394 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(I.getType());
2416 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(),
2417 I.getType());
23952418 setValue(&I, DAG.getNode(ISD::UINT_TO_FP, getCurSDLoc(), DestVT, N));
23962419 }
23972420
23982421 void SelectionDAGBuilder::visitSIToFP(const User &I) {
23992422 // SIToFP is never a no-op cast, no need to check
24002423 SDValue N = getValue(I.getOperand(0));
2401 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(I.getType());
2424 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(),
2425 I.getType());
24022426 setValue(&I, DAG.getNode(ISD::SINT_TO_FP, getCurSDLoc(), DestVT, N));
24032427 }
24042428
24062430 // What to do depends on the size of the integer and the size of the pointer.
24072431 // We can either truncate, zero extend, or no-op, accordingly.
24082432 SDValue N = getValue(I.getOperand(0));
2409 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(I.getType());
2433 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(),
2434 I.getType());
24102435 setValue(&I, DAG.getZExtOrTrunc(N, getCurSDLoc(), DestVT));
24112436 }
24122437
24142439 // What to do depends on the size of the integer and the size of the pointer.
24152440 // We can either truncate, zero extend, or no-op, accordingly.
24162441 SDValue N = getValue(I.getOperand(0));
2417 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(I.getType());
2442 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(),
2443 I.getType());
24182444 setValue(&I, DAG.getZExtOrTrunc(N, getCurSDLoc(), DestVT));
24192445 }
24202446
24212447 void SelectionDAGBuilder::visitBitCast(const User &I) {
24222448 SDValue N = getValue(I.getOperand(0));
24232449 SDLoc dl = getCurSDLoc();
2424 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(I.getType());
2450 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(),
2451 I.getType());
24252452
24262453 // BitCast assures us that source and destination are the same size so this is
24272454 // either a BITCAST or a no-op.
24432470 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
24442471 const Value *SV = I.getOperand(0);
24452472 SDValue N = getValue(SV);
2446 EVT DestVT = TLI.getValueType(I.getType());
2473 EVT DestVT = TLI.getValueType(DAG.getDataLayout(), I.getType());
24472474
24482475 unsigned SrcAS = SV->getType()->getPointerAddressSpace();
24492476 unsigned DestAS = I.getType()->getPointerAddressSpace();
24582485 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
24592486 SDValue InVec = getValue(I.getOperand(0));
24602487 SDValue InVal = getValue(I.getOperand(1));
2461 SDValue InIdx = DAG.getSExtOrTrunc(getValue(I.getOperand(2)),
2462 getCurSDLoc(), TLI.getVectorIdxTy());
2488 SDValue InIdx = DAG.getSExtOrTrunc(getValue(I.getOperand(2)), getCurSDLoc(),
2489 TLI.getVectorIdxTy(DAG.getDataLayout()));
24632490 setValue(&I, DAG.getNode(ISD::INSERT_VECTOR_ELT, getCurSDLoc(),
2464 TLI.getValueType(I.getType()), InVec, InVal, InIdx));
2491 TLI.getValueType(DAG.getDataLayout(), I.getType()),
2492 InVec, InVal, InIdx));
24652493 }
24662494
24672495 void SelectionDAGBuilder::visitExtractElement(const User &I) {
24682496 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
24692497 SDValue InVec = getValue(I.getOperand(0));
2470 SDValue InIdx = DAG.getSExtOrTrunc(getValue(I.getOperand(1)),
2471 getCurSDLoc(), TLI.getVectorIdxTy());
2498 SDValue InIdx = DAG.getSExtOrTrunc(getValue(I.getOperand(1)), getCurSDLoc(),
2499 TLI.getVectorIdxTy(DAG.getDataLayout()));
24722500 setValue(&I, DAG.getNode(ISD::EXTRACT_VECTOR_ELT, getCurSDLoc(),
2473 TLI.getValueType(I.getType()), InVec, InIdx));
2501 TLI.getValueType(DAG.getDataLayout(), I.getType()),
2502 InVec, InIdx));
24742503 }
24752504
24762505 // Utility for visitShuffleVector - Return true if every element in Mask,
24932522 unsigned MaskNumElts = Mask.size();
24942523
24952524 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2496 EVT VT = TLI.getValueType(I.getType());
2525 EVT VT = TLI.getValueType(DAG.getDataLayout(), I.getType());
24972526 EVT SrcVT = Src1.getValueType();
24982527 unsigned SrcNumElts = SrcVT.getVectorNumElements();
24992528
26152644 SDLoc dl = getCurSDLoc();
26162645 Src = DAG.getNode(
26172646 ISD::EXTRACT_SUBVECTOR, dl, VT, Src,
2618 DAG.getConstant(StartIdx[Input], dl, TLI.getVectorIdxTy()));
2647 DAG.getConstant(StartIdx[Input], dl,
2648 TLI.getVectorIdxTy(DAG.getDataLayout())));
26192649 }
26202650 }
26212651
26422672 // replacing the shuffle with extract and build vector.
26432673 // to insert and build vector.
26442674 EVT EltVT = VT.getVectorElementType();
2645 EVT IdxVT = TLI.getVectorIdxTy();
2675 EVT IdxVT = TLI.getVectorIdxTy(DAG.getDataLayout());
26462676 SDLoc dl = getCurSDLoc();
26472677 SmallVector Ops;
26482678 for (unsigned i = 0; i != MaskNumElts; ++i) {
27712801 Ty = StTy->getElementType(Field);
27722802 } else {
27732803 Ty = cast(Ty)->getElementType();
2774 MVT PtrTy = DAG.getTargetLoweringInfo().getPointerTy(AS);
2804 MVT PtrTy =
2805 DAG.getTargetLoweringInfo().getPointerTy(DAG.getDataLayout(), AS);
27752806 unsigned PtrSize = PtrTy.getSizeInBits();
27762807 APInt ElementSize(PtrSize, DL->getTypeAllocSize(Ty));
27772808
28312862
28322863 SDValue AllocSize = getValue(I.getArraySize());
28332864
2834 EVT IntPtr = TLI.getPointerTy();
2865 EVT IntPtr = TLI.getPointerTy(DAG.getDataLayout());
28352866 if (AllocSize.getValueType() != IntPtr)
28362867 AllocSize = DAG.getZExtOrTrunc(AllocSize, dl, IntPtr);
28372868
30783109 else if (SDB->findValue(ShuffleInst)) {
30793110 SDValue ShuffleNode = SDB->getValue(ShuffleInst);
30803111 SDLoc sdl = ShuffleNode;
3081 Base = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, sdl,
3082 ShuffleNode.getValueType().getScalarType(), ShuffleNode,
3083 DAG.getConstant(0, sdl, TLI.getVectorIdxTy()));
3112 Base = DAG.getNode(
3113 ISD::EXTRACT_VECTOR_ELT, sdl,
3114 ShuffleNode.getValueType().getScalarType(), ShuffleNode,
3115 DAG.getConstant(0, sdl, TLI.getVectorIdxTy(DAG.getDataLayout())));
30843116 SDB->setValue(Ptr, Base);
30853117 }
30863118 else
31273159 MachineMemOperand::MOStore, VT.getStoreSize(),
31283160 Alignment, AAInfo);
31293161 if (!UniformBase) {
3130 Base = DAG.getTargetConstant(0, sdl, TLI.getPointerTy());
3162 Base = DAG.getTargetConstant(0, sdl, TLI.getPointerTy(DAG.getDataLayout()));
31313163 Index = getValue(Ptr);
31323164 }
31333165 SDValue Ops[] = { getRoot(), Src0, Mask, Base, Index };
31473179 SDValue Mask = getValue(I.getArgOperand(2));
31483180
31493181 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3150 EVT VT = TLI.getValueType(I.getType());
3182 EVT VT = TLI.getValueType(DAG.getDataLayout(), I.getType());
31513183 unsigned Alignment = (cast(I.getArgOperand(1)))->getZExtValue();
31523184 if (!Alignment)
31533185 Alignment = DAG.getEVTAlignment(VT);
31853217 SDValue Mask = getValue(I.getArgOperand(2));
31863218
31873219 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3188 EVT VT = TLI.getValueType(I.getType());
3220 EVT VT = TLI.getValueType(DAG.getDataLayout(), I.getType());
31893221 unsigned Alignment = (cast(I.getArgOperand(1)))->getZExtValue();
31903222 if (!Alignment)
31913223 Alignment = DAG.getEVTAlignment(VT);
32153247 Alignment, AAInfo, Ranges);
32163248
32173249 if (!UniformBase) {
3218 Base = DAG.getTargetConstant(0, sdl, TLI.getPointerTy());
3250 Base = DAG.getTargetConstant(0, sdl, TLI.getPointerTy(DAG.getDataLayout()));
32193251 Index = getValue(Ptr);
32203252 }
32213253 SDValue Ops[] = { Root, Src0, Mask, Base, Index };
32923324 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
32933325 SDValue Ops[3];
32943326 Ops[0] = getRoot();
3295 Ops[1] = DAG.getConstant(I.getOrdering(), dl, TLI.getPointerTy());
3296 Ops[2] = DAG.getConstant(I.getSynchScope(), dl, TLI.getPointerTy());
3327 Ops[1] = DAG.getConstant(I.getOrdering(), dl,
3328 TLI.getPointerTy(DAG.getDataLayout()));
3329 Ops[2] = DAG.getConstant(I.getSynchScope(), dl,
3330 TLI.getPointerTy(DAG.getDataLayout()));
32973331 DAG.setRoot(DAG.getNode(ISD::ATOMIC_FENCE, dl, MVT::Other, Ops));
32983332 }
32993333
33053339 SDValue InChain = getRoot();
33063340
33073341 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3308 EVT VT = TLI.getValueType(I.getType());
3342 EVT VT = TLI.getValueType(DAG.getDataLayout(), I.getType());
33093343
33103344 if (I.getAlignment() < VT.getSizeInBits() / 8)
33113345 report_fatal_error("Cannot generate unaligned atomic load");
33403374 SDValue InChain = getRoot();
33413375
33423376 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3343 EVT VT = TLI.getValueType(I.getValueOperand()->getType());
3377 EVT VT =
3378 TLI.getValueType(DAG.getDataLayout(), I.getValueOperand()->getType());
33443379
33453380 if (I.getAlignment() < VT.getSizeInBits() / 8)
33463381 report_fatal_error("Cannot generate unaligned atomic store");
33833418 if (!IsTgtIntrinsic || Info.opc == ISD::INTRINSIC_VOID ||
33843419 Info.opc == ISD::INTRINSIC_W_CHAIN)
33853420 Ops.push_back(DAG.getTargetConstant(Intrinsic, getCurSDLoc(),
3386 TLI.getPointerTy()));
3421 TLI.getPointerTy(DAG.getDataLayout())));
33873422
33883423 // Add all operands of the call to the operand list.
33893424 for (unsigned i = 0, e = I.getNumArgOperands(); i != e; ++i) {
34263461
34273462 if (!I.getType()->isVoidTy()) {
34283463 if (VectorType *PTy = dyn_cast(I.getType())) {
3429 EVT VT = TLI.getValueType(PTy);
3464 EVT VT = TLI.getValueType(DAG.getDataLayout(), PTy);
34303465 Result = DAG.getNode(ISD::BITCAST, getCurSDLoc(), VT, Result);
34313466 }
34323467
34593494 SDLoc dl) {
34603495 SDValue t0 = DAG.getNode(ISD::AND, dl, MVT::i32, Op,
34613496 DAG.getConstant(0x7f800000, dl, MVT::i32));
3462 SDValue t1 = DAG.getNode(ISD::SRL, dl, MVT::i32, t0,
3463 DAG.getConstant(23, dl, TLI.getPointerTy()));
3497 SDValue t1 = DAG.getNode(
3498 ISD::SRL, dl, MVT::i32, t0,
3499 DAG.getConstant(23, dl, TLI.getPointerTy(DAG.getDataLayout())));
34643500 SDValue t2 = DAG.getNode(ISD::SUB, dl, MVT::i32, t1,
34653501 DAG.getConstant(127, dl, MVT::i32));
34663502 return DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, t2);
34853521 // IntegerPartOfX <<= 23;
34863522 IntegerPartOfX = DAG.getNode(
34873523 ISD::SHL, dl, MVT::i32, IntegerPartOfX,
3488 DAG.getConstant(23, dl, DAG.getTargetLoweringInfo().getPointerTy()));
3524 DAG.getConstant(23, dl, DAG.getTargetLoweringInfo().getPointerTy(
3525 DAG.getDataLayout())));
34893526
34903527 SDValue TwoToFractionalPartOfX;
34913528 if (LimitFloatPrecision <= 6) {
40724109 case Intrinsic::vaend: visitVAEnd(I); return nullptr;
40734110 case Intrinsic::vacopy: visitVACopy(I); return nullptr;
40744111 case Intrinsic::returnaddress:
4075 setValue(&I, DAG.getNode(ISD::RETURNADDR, sdl, TLI.getPointerTy(),
4112 setValue(&I, DAG.getNode(ISD::RETURNADDR, sdl,
4113 TLI.getPointerTy(DAG.getDataLayout()),
40764114 getValue(I.getArgOperand(0))));
40774115 return nullptr;
40784116 case Intrinsic::frameaddress:
4079 setValue(&I, DAG.getNode(ISD::FRAMEADDR, sdl, TLI.getPointerTy(),
4117 setValue(&I, DAG.getNode(ISD::FRAMEADDR, sdl,
4118 TLI.getPointerTy(DAG.getDataLayout()),
40804119 getValue(I.getArgOperand(0))));
40814120 return nullptr;
40824121 case Intrinsic::read_register: {
40844123 SDValue Chain = getRoot();
40854124 SDValue RegName =
40864125 DAG.getMDNode(cast(cast(Reg)->getMetadata()));
4087 EVT VT = TLI.getValueType(I.getType());
4126 EVT VT = TLI.getValueType(DAG.getDataLayout(), I.getType());
40884127 Res = DAG.getNode(ISD::READ_REGISTER, sdl,
40894128 DAG.getVTList(VT, MVT::Other), Chain, RegName);
40904129 setValue(&I, Res);
43364375 return nullptr;
43374376 case Intrinsic::eh_dwarf_cfa: {
43384377 SDValue CfaArg = DAG.getSExtOrTrunc(getValue(I.getArgOperand(0)), sdl,
4339 TLI.getPointerTy());
4378 TLI.getPointerTy(DAG.getDataLayout()));
43404379 SDValue Offset = DAG.getNode(ISD::ADD, sdl,
43414380 CfaArg.getValueType(),
43424381 DAG.getNode(ISD::FRAME_TO_ARGS_OFFSET, sdl,
43434382 CfaArg.getValueType()),
43444383 CfaArg);
4345 SDValue FA = DAG.getNode(ISD::FRAMEADDR, sdl, TLI.getPointerTy(),
4346 DAG.getConstant(0, sdl, TLI.getPointerTy()));
4384 SDValue FA = DAG.getNode(
4385 ISD::FRAMEADDR, sdl, TLI.getPointerTy(DAG.getDataLayout()),
4386 DAG.getConstant(0, sdl, TLI.getPointerTy(DAG.getDataLayout())));
43474387 setValue(&I, DAG.getNode(ISD::ADD, sdl, FA.getValueType(),
43484388 FA, Offset));
43494389 return nullptr;
44454485 ShOps[0] = ShAmt;
44464486 ShOps[1] = DAG.getConstant(0, sdl, MVT::i32);
44474487 ShAmt = DAG.getNode(ISD::BUILD_VECTOR, sdl, ShAmtVT, ShOps);
4448 EVT DestVT = TLI.getValueType(I.getType());
4488 EVT DestVT = TLI.getValueType(DAG.getDataLayout(), I.getType());
44494489 ShAmt = DAG.getNode(ISD::BITCAST, sdl, DestVT, ShAmt);
44504490 Res = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, sdl, DestVT,
44514491 DAG.getConstant(NewIntrinsic, sdl, MVT::i32),
44754515 case Intrinsic::convertus: Code = ISD::CVT_US; break;
44764516 case Intrinsic::convertuu: Code = ISD::CVT_UU; break;
44774517 }
4478 EVT DestVT = TLI.getValueType(I.getType());
4518 EVT DestVT = TLI.getValueType(DAG.getDataLayout(), I.getType());
44794519 const Value *Op1 = I.getArgOperand(0);
44804520 Res = DAG.getConvertRndSat(DestVT, sdl, getValue(Op1),
44814521 DAG.getValueType(DestVT),
45654605 getValue(I.getArgOperand(2))));
45664606 return nullptr;
45674607 case Intrinsic::fmuladd: {
4568 EVT VT = TLI.getValueType(I.getType());
4608 EVT VT = TLI.getValueType(DAG.getDataLayout(), I.getType());
45694609 if (TM.Options.AllowFPOpFusion != FPOpFusion::Strict &&
45704610 TLI.isFMAFasterThanFMulAndFAdd(VT)) {
45714611 setValue(&I, DAG.getNode(ISD::FMA, sdl,
45944634 MVT::i32))));
45954635 return nullptr;
45964636 case Intrinsic::convert_from_fp16:
4597 setValue(&I,
4598 DAG.getNode(ISD::FP_EXTEND, sdl, TLI.getValueType(I.getType()),
4599 DAG.getNode(ISD::BITCAST, sdl, MVT::f16,
4600 getValue(I.getArgOperand(0)))));
4637 setValue(&I, DAG.getNode(ISD::FP_EXTEND, sdl,
4638 TLI.getValueType(DAG.getDataLayout(), I.getType()),
4639 DAG.getNode(ISD::BITCAST, sdl, MVT::f16,
4640 getValue(I.getArgOperand(0)))));
46014641 return nullptr;
46024642 case Intrinsic::pcmarker: {
46034643 SDValue Tmp = getValue(I.getArgOperand(0));
46414681 }
46424682 case Intrinsic::stacksave: {
46434683 SDValue Op = getRoot();
4644 Res = DAG.getNode(ISD::STACKSAVE, sdl,
4645 DAG.getVTList(TLI.getPointerTy(), MVT::Other), Op);
4684 Res = DAG.getNode(
4685 ISD::STACKSAVE, sdl,
4686 DAG.getVTList(TLI.getPointerTy(DAG.getDataLayout()), MVT::Other), Op);
46464687 setValue(&I, Res);
46474688 DAG.setRoot(Res.getValue(1));
46484689 return nullptr;
46564697 // Emit code into the DAG to store the stack guard onto the stack.
46574698 MachineFunction &MF = DAG.getMachineFunction();
46584699 MachineFrameInfo *MFI = MF.getFrameInfo();
4659 EVT PtrTy = TLI.getPointerTy();
4700 EVT PtrTy = TLI.getPointerTy(DAG.getDataLayout());
46604701 SDValue Src, Chain = getRoot();
46614702 const Value *Ptr = cast(I.getArgOperand(0))->getPointerOperand();
46624703 const GlobalVariable *GV = dyn_cast(Ptr);
47544795 }
47554796 case Intrinsic::adjust_trampoline: {
47564797 setValue(&I, DAG.getNode(ISD::ADJUST_TRAMPOLINE, sdl,
4757 TLI.getPointerTy(),
4798 TLI.getPointerTy(DAG.getDataLayout()),
47584799 getValue(I.getArgOperand(0))));
47594800 return nullptr;
47604801 }
47954836 TargetLowering::ArgListTy Args;
47964837
47974838 TargetLowering::CallLoweringInfo CLI(DAG);
4798 CLI.setDebugLoc(sdl).setChain(getRoot())
4799 .setCallee(CallingConv::C, I.getType(),
4800 DAG.getExternalSymbol(TrapFuncName.data(), TLI.getPointerTy()),
4801 std::move(Args), 0);
4839 CLI.setDebugLoc(sdl).setChain(getRoot()).setCallee(
4840 CallingConv::C, I.getType(),
4841 DAG.getExternalSymbol(TrapFuncName.data(),
4842 TLI.getPointerTy(DAG.getDataLayout())),
4843 std::move(Args), 0);
48024844
48034845 std::pair Result = TLI.LowerCallTo(CLI);
48044846 DAG.setRoot(Result.second);
48744916
48754917 SDValue Ops[2];
48764918 Ops[0] = getRoot();
4877 Ops[1] = DAG.getFrameIndex(FI, TLI.getPointerTy(), true);
4919 Ops[1] =
4920 DAG.getFrameIndex(FI, TLI.getPointerTy(DAG.getDataLayout()), true);
48784921 unsigned Opcode = (IsStart ? ISD::LIFETIME_START : ISD::LIFETIME_END);
48794922
48804923 Res = DAG.getNode(Opcode, sdl, MVT::Other, Ops);
48844927 }
48854928 case Intrinsic::invariant_start:
48864929 // Discard region information.
4887 setValue(&I, DAG.getUNDEF(TLI.getPointerTy()));
4930 setValue(&I, DAG.getUNDEF(TLI.getPointerTy(DAG.getDataLayout())));
48884931 return nullptr;
48894932 case Intrinsic::invariant_end:
48904933 // Discard region information.
49044947 case Intrinsic::clear_cache:
49054948 return TLI.getClearCacheBuiltinName();
49064949 case Intrinsic::eh_actions:
4907 setValue(&I, DAG.getUNDEF(TLI.getPointerTy()));
4950 setValue(&I, DAG.getUNDEF(TLI.getPointerTy(DAG.getDataLayout())));
49084951 return nullptr;
49094952 case Intrinsic::donothing:
49104953 // ignore
49655008 case Intrinsic::localrecover: {
49665009 // i8* @llvm.localrecover(i8* %fn, i8* %fp, i32 %idx)
49675010 MachineFunction &MF = DAG.getMachineFunction();
4968 MVT PtrVT = TLI.getPointerTy(0);
5011 MVT PtrVT = TLI.getPointerTy(DAG.getDataLayout(), 0);
49695012
49705013 // Get the symbol that defines the frame offset.
49715014 auto *Fn = cast(I.getArgOperand(0)->stripPointerCasts());
49955038 case Intrinsic::eh_exceptioncode: {
49965039 unsigned Reg = TLI.getExceptionPointerRegister();
49975040 assert(Reg && "cannot get exception code on this platform");
4998 MVT PtrVT = TLI.getPointerTy();
5041 MVT PtrVT = TLI.getPointerTy(DAG.getDataLayout());
49995042 const TargetRegisterClass *PtrRC = TLI.getRegClassFor(PtrVT);
50005043 assert(FuncInfo.MBB->isLandingPad() && "eh.exceptioncode in non-lpad");
50015044 unsigned VReg = FuncInfo.MBB->addLiveIn(Reg, PtrRC);
51795222 void SelectionDAGBuilder::processIntegerCallValue(const Instruction &I,
51805223 SDValue Value,
51815224 bool IsSigned) {
5182 EVT VT = DAG.getTargetLoweringInfo().getValueType(I.getType(), true);
5225 EVT VT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(),
5226 I.getType(), true);
51835227 if (IsSigned)
51845228 Value = DAG.getSExtOrTrunc(Value, getCurSDLoc(), VT);
51855229 else
52045248 const Value *Size = I.getArgOperand(2);
52055249 const ConstantInt *CSize = dyn_cast(Size);
52065250 if (CSize && CSize->getZExtValue() == 0) {
5207 EVT CallVT = DAG.getTargetLoweringInfo().getValueType(I.getType(), true);
5251 EVT CallVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(),
5252 I.getType(), true);
52085253 setValue(&I, DAG.getConstant(0, getCurSDLoc(), CallVT));
52095254 return true;
52105255 }
56415686 if (!RenameFn)
56425687 Callee = getValue(I.getCalledValue());
56435688 else
5644 Callee = DAG.getExternalSymbol(RenameFn,
5645 DAG.getTargetLoweringInfo().getPointerTy());
5689 Callee = DAG.getExternalSymbol(
5690 RenameFn,
5691 DAG.getTargetLoweringInfo().getPointerTy(DAG.getDataLayout()));
56465692
56475693 // Check if we can potentially perform a tail call. More detailed checking is
56485694 // be done within LowerCallTo, after more information about the call is known.
56765722 if (!CallOperandVal) return MVT::Other;
56775723
56785724 if (isa(CallOperandVal))
5679 return TLI.getPointerTy();
5725 return TLI.getPointerTy(DL);
56805726
56815727 llvm::Type *OpTy = CallOperandVal->getType();
56825728
57125758 }
57135759 }
57145760
5715 return TLI.getValueType(OpTy, true);
5761 return TLI.getValueType(DL, OpTy, true);
57165762 }
57175763 };
57185764
58645910 // corresponding argument.
58655911 assert(!CS.getType()->isVoidTy() && "Bad inline asm!");
58665912 if (StructType *STy = dyn_cast(CS.getType())) {
5867 OpVT = TLI.getSimpleValueType(STy->getElementType(ResNo));
5913 OpVT = TLI.getSimpleValueType(DAG.getDataLayout(),
5914 STy->getElementType(ResNo));
58685915 } else {
58695916 assert(ResNo == 0 && "Asm only has one result!");
5870 OpVT = TLI.getSimpleValueType(CS.getType());
5917 OpVT = TLI.getSimpleValueType(DAG.getDataLayout(), CS.getType());
58715918 }
58725919 ++ResNo;
58735920 break;
59776024 const Value *OpVal = OpInfo.CallOperandVal;
59786025 if (isa(OpVal) || isa(OpVal) ||
59796026 isa(OpVal) || isa(OpVal)) {
5980 OpInfo.CallOperand = DAG.getConstantPool(cast(OpVal),
5981 TLI.getPointerTy());
6027 OpInfo.CallOperand = DAG.getConstantPool(
6028 cast(OpVal), TLI.getPointerTy(DAG.getDataLayout()));
59826029 } else {
59836030 // Otherwise, create a stack slot and emit a store to it before the
59846031 // asm.
59886035 unsigned Align = DL.getPrefTypeAlignment(Ty);
59896036 MachineFunction &MF = DAG.getMachineFunction();
59906037 int SSFI = MF.getFrameInfo()->CreateStackObject(TySize, Align, false);
5991 SDValue StackSlot = DAG.getFrameIndex(SSFI, TLI.getPointerTy());
6038 SDValue StackSlot =
6039 DAG.getFrameIndex(SSFI, TLI.getPointerTy(DAG.getDataLayout()));
59926040 Chain = DAG.getStore(Chain, getCurSDLoc(),
59936041 OpInfo.CallOperand, StackSlot,
59946042 MachinePointerInfo::getFixedStack(SSFI),
60236071 // AsmNodeOperands - The operands for the ISD::INLINEASM node.
60246072 std::vector AsmNodeOperands;
60256073 AsmNodeOperands.push_back(SDValue()); // reserve space for input chain
6026 AsmNodeOperands.push_back(
6027 DAG.getTargetExternalSymbol(IA->getAsmString().c_str(),
6028 TLI.getPointerTy()));
6074 AsmNodeOperands.push_back(DAG.getTargetExternalSymbol(
6075 IA->getAsmString().c_str(), TLI.getPointerTy(DAG.getDataLayout())));
60296076
60306077 // If we have a !srcloc metadata node associated with it, we want to attach
60316078 // this to the ultimately generated inline asm machineinstr. To do this, we
60656112 }
60666113 }
60676114
6068 AsmNodeOperands.push_back(DAG.getTargetConstant(ExtraInfo, getCurSDLoc(),
6069 TLI.getPointerTy()));
6115 AsmNodeOperands.push_back(DAG.getTargetConstant(
6116 ExtraInfo, getCurSDLoc(), TLI.getPointerTy(DAG.getDataLayout())));
60706117
60716118 // Loop over all of the inputs, copying the operand values into the
60726119 // appropriate registers and processing the output regs.
62026249 OpFlag = InlineAsm::convertMemFlagWordToMatchingFlagWord(OpFlag);
62036250 OpFlag = InlineAsm::getFlagWordForMatchingOp(OpFlag,
62046251 OpInfo.getMatchedOperand());
6205 AsmNodeOperands.push_back(DAG.getTargetConstant(OpFlag, getCurSDLoc(),
6206 TLI.getPointerTy()));
6252 AsmNodeOperands.push_back(DAG.getTargetConstant(
6253 OpFlag, getCurSDLoc(), TLI.getPointerTy(DAG.getDataLayout())));
62076254 AsmNodeOperands.push_back(AsmNodeOperands[CurOp+1]);
62086255 break;
62096256 }
62286275 // Add information to the INLINEASM node to know about this input.
62296276 unsigned ResOpType =
62306277 InlineAsm::getFlagWord(InlineAsm::Kind_Imm, Ops.size());
6231 AsmNodeOperands.push_back(DAG.getTargetConstant(ResOpType,
6232 getCurSDLoc(),
6233 TLI.getPointerTy()));
6278 AsmNodeOperands.push_back(DAG.getTargetConstant(
6279 ResOpType, getCurSDLoc(), TLI.getPointerTy(DAG.getDataLayout())));
62346280 AsmNodeOperands.insert(AsmNodeOperands.end(), Ops.begin(), Ops.end());
62356281 break;
62366282 }
62376283
62386284 if (OpInfo.ConstraintType == TargetLowering::C_Memory) {
62396285 assert(OpInfo.isIndirect && "Operand must be indirect to be a mem!");
6240 assert(InOperandVal.getValueType() == TLI.getPointerTy() &&
6286 assert(InOperandVal.getValueType() ==
6287 TLI.getPointerTy(DAG.getDataLayout()) &&
62416288 "Memory operands expect pointer values");
62426289
62436290 unsigned ConstraintID =
63156362
63166363 // FIXME: Why don't we do this for inline asms with MRVs?
63176364 if (CS.getType()->isSingleValueType() && CS.getType()->isSized()) {
6318 EVT ResultType = TLI.getValueType(CS.getType());
6365 EVT ResultType = TLI.getValueType(DAG.getDataLayout(), CS.getType());
63196366
63206367 // If any of the results of the inline asm is a vector, it may have the
63216368 // wrong width/num elts. This can happen for register classes that can
63826429 void SelectionDAGBuilder::visitVAArg(const VAArgInst &I) {
63836430 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
63846431 const DataLayout &DL = DAG.getDataLayout();
6385 SDValue V = DAG.getVAArg(TLI.getValueType(I.getType()), getCurSDLoc(),
6386 getRoot(), getValue(I.getOperand(0)),
6432 SDValue V = DAG.getVAArg(TLI.getValueType(DAG.getDataLayout(), I.getType()),
6433 getCurSDLoc(), getRoot(), getValue(I.getOperand(0)),
63876434 DAG.getSrcValue(I.getOperand(0)),
63886435 DL.getABITypeAlignment(I.getType()));
63896436 setValue(&I, V);
64746521 Builder.DAG.getTargetConstant(C->getSExtValue(), DL, MVT::i64));
64756522 } else if (FrameIndexSDNode *FI = dyn_cast(OpVal)) {
64766523 const TargetLowering &TLI = Builder.DAG.getTargetLoweringInfo();
6477 Ops.push_back(
6478 Builder.DAG.getTargetFrameIndex(FI->getIndex(), TLI.getPointerTy()));
6524 Ops.push_back(Builder.DAG.getTargetFrameIndex(
6525 FI->getIndex(), TLI.getPointerTy(Builder.DAG.getDataLayout())));
64796526 } else
64806527 Ops.push_back(OpVal);
64816528 }
67416788 DemoteStackIdx = MF.getFrameInfo()->CreateStackObject(TySize, Align, false);
67426789 Type *StackSlotPtrType = PointerType::getUnqual(CLI.RetTy);
67436790
6744 DemoteStackSlot = CLI.DAG.getFrameIndex(DemoteStackIdx, getPointerTy());
6791 DemoteStackSlot = CLI.DAG.getFrameIndex(DemoteStackIdx, getPointerTy(DL));
67456792 ArgListEntry Entry;
67466793 Entry.Node = DemoteStackSlot;
67476794 Entry.Ty = StackSlotPtrType;
76557702 APInt LowBound;
76567703 APInt CmpRange;
76577704
7658 const int BitWidth =
7659 DAG.getTargetLoweringInfo().getPointerTy().getSizeInBits();
7705 const int BitWidth = DAG.getTargetLoweringInfo()
7706 .getPointerTy(DAG.getDataLayout())
7707 .getSizeInBits();
76607708 assert(rangeFitsInWord(Low, High) && "Case range must fit in bit mask!");
76617709
76627710 if (Low.isNonNegative() && High.slt(BitWidth)) {
77367784
77377785 // If target does not have legal shift left, do not emit bit tests at all.
77387786 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
7739 EVT PTy = TLI.getPointerTy();
7787 EVT PTy = TLI.getPointerTy(DAG.getDataLayout());
77407788 if (!TLI.isOperationLegal(ISD::SHL, PTy))
77417789 return;
77427790
920920 bool SelectionDAGISel::PrepareEHLandingPad() {
921921 MachineBasicBlock *MBB = FuncInfo->MBB;
922922
923 const TargetRegisterClass *PtrRC = TLI->getRegClassFor(TLI->getPointerTy());
923 const TargetRegisterClass *PtrRC =
924 TLI->getRegClassFor(TLI->getPointerTy(CurDAG->getDataLayout()));
924925
925926 // Add a label to mark the beginning of the landing pad. Deletion of the
926927 // landing pad can thus be detected via the MachineModuleInfo.
23282329 }
23292330
23302331 LLVM_ATTRIBUTE_ALWAYS_INLINE static bool
2331 CheckType(const unsigned char *MatcherTable, unsigned &MatcherIndex,
2332 SDValue N, const TargetLowering *TLI) {
2332 CheckType(const unsigned char *MatcherTable, unsigned &MatcherIndex, SDValue N,
2333 const TargetLowering *TLI, const DataLayout &DL) {
23332334 MVT::SimpleValueType VT = (MVT::SimpleValueType)MatcherTable[MatcherIndex++];
23342335 if (N.getValueType() == VT) return true;
23352336
23362337 // Handle the case when VT is iPTR.
2337 return VT == MVT::iPTR && N.getValueType() == TLI->getPointerTy();
2338 return VT == MVT::iPTR && N.getValueType() == TLI->getPointerTy(DL);
23382339 }
23392340
23402341 LLVM_ATTRIBUTE_ALWAYS_INLINE static bool
23412342 CheckChildType(const unsigned char *MatcherTable, unsigned &MatcherIndex,
2342 SDValue N, const TargetLowering *TLI, unsigned ChildNo) {
2343 SDValue N, const TargetLowering *TLI, const DataLayout &DL,
2344 unsigned ChildNo) {
23432345 if (ChildNo >= N.getNumOperands())
23442346 return false; // Match fails if out of range child #.
2345 return ::CheckType(MatcherTable, MatcherIndex, N.getOperand(ChildNo), TLI);
2347 return ::CheckType(MatcherTable, MatcherIndex, N.getOperand(ChildNo), TLI,
2348 DL);
23462349 }
23472350
23482351 LLVM_ATTRIBUTE_ALWAYS_INLINE static bool
23542357
23552358 LLVM_ATTRIBUTE_ALWAYS_INLINE static bool
23562359 CheckValueType(const unsigned char *MatcherTable, unsigned &MatcherIndex,
2357 SDValue N, const TargetLowering *TLI) {
2360 SDValue N, const TargetLowering *TLI, const DataLayout &DL) {
23582361 MVT::SimpleValueType VT = (MVT::SimpleValueType)MatcherTable[MatcherIndex++];
23592362 if (cast(N)->getVT() == VT)
23602363 return true;
23612364
23622365 // Handle the case when VT is iPTR.
2363 return VT == MVT::iPTR && cast(N)->getVT() == TLI->getPointerTy();
2366 return VT == MVT::iPTR && cast(N)->getVT() == TLI->getPointerTy(DL);
23642367 }
23652368
23662369 LLVM_ATTRIBUTE_ALWAYS_INLINE static bool
24432446 Result = !::CheckOpcode(Table, Index, N.getNode());
24442447 return Index;
24452448 case SelectionDAGISel::OPC_CheckType:
2446 Result = !::CheckType(Table, Index, N, SDISel.TLI);
2449 Result = !::CheckType(Table, Index, N, SDISel.TLI,
2450 SDISel.CurDAG->getDataLayout());
24472451 return Index;
24482452 case SelectionDAGISel::OPC_CheckChild0Type:
24492453 case SelectionDAGISel::OPC_CheckChild1Type:
24532457 case SelectionDAGISel::OPC_CheckChild5Type:
24542458 case SelectionDAGISel::OPC_CheckChild6Type:
24552459 case SelectionDAGISel::OPC_CheckChild7Type:
2456 Result = !::CheckChildType(Table, Index, N, SDISel.TLI,
2457 Table[Index - 1] -
2458 SelectionDAGISel::OPC_CheckChild0Type);
2460 Result = !::CheckChildType(
2461 Table, Index, N, SDISel.TLI, SDISel.CurDAG->getDataLayout(),
2462 Table[Index - 1] - SelectionDAGISel::OPC_CheckChild0Type);
24592463 return Index;
24602464 case SelectionDAGISel::OPC_CheckCondCode:
24612465 Result = !::CheckCondCode(Table, Index, N);
24622466 return Index;
24632467 case SelectionDAGISel::OPC_CheckValueType:
2464 Result = !::CheckValueType(Table, Index, N, SDISel.TLI);
2468 Result = !::CheckValueType(Table, Index, N, SDISel.TLI,
2469 SDISel.CurDAG->getDataLayout());
24652470 return Index;
24662471 case SelectionDAGISel::OPC_CheckInteger:
24672472 Result = !::CheckInteger(Table, Index, N);
28152820 continue;
28162821
28172822 case OPC_CheckType:
2818 if (!::CheckType(MatcherTable, MatcherIndex, N, TLI))
2823 if (!::CheckType(MatcherTable, MatcherIndex, N, TLI,
2824 CurDAG->getDataLayout()))
28192825 break;
28202826 continue;
28212827
28632869
28642870 MVT CaseVT = (MVT::SimpleValueType)MatcherTable[MatcherIndex++];
28652871 if (CaseVT == MVT::iPTR)
2866 CaseVT = TLI->getPointerTy();
2872 CaseVT = TLI->getPointerTy(CurDAG->getDataLayout());
28672873
28682874 // If the VT matches, then we will execute this case.
28692875 if (CurNodeVT == CaseVT)
28862892 case OPC_CheckChild4Type: case OPC_CheckChild5Type:
28872893 case OPC_CheckChild6Type: case OPC_CheckChild7Type:
28882894 if (!::CheckChildType(MatcherTable, MatcherIndex, N, TLI,
2889 Opcode-OPC_CheckChild0Type))
2895 CurDAG->getDataLayout(),
2896 Opcode - OPC_CheckChild0Type))
28902897 break;
28912898 continue;
28922899 case OPC_CheckCondCode:
28932900 if (!::CheckCondCode(MatcherTable, MatcherIndex, N)) break;
28942901 continue;
28952902 case OPC_CheckValueType:
2896 if (!::CheckValueType(MatcherTable, MatcherIndex, N, TLI))
2903 if (!::CheckValueType(MatcherTable, MatcherIndex, N, TLI,
2904 CurDAG->getDataLayout()))
28972905 break;
28982906 continue;
28992907 case OPC_CheckInteger:
30963104 MVT::SimpleValueType VT =
30973105 (MVT::SimpleValueType)MatcherTable[MatcherIndex++];
30983106 if (VT == MVT::iPTR)
3099 VT = TLI->getPointerTy().SimpleTy;
3107 VT = TLI->getPointerTy(CurDAG->getDataLayout()).SimpleTy;
31003108 VTs.push_back(VT);
31013109 }
31023110
101101 }
102102 if (LC == RTLIB::UNKNOWN_LIBCALL)
103103 report_fatal_error("Unsupported library call operation!");
104 SDValue Callee = DAG.getExternalSymbol(getLibcallName(LC), getPointerTy());
104 SDValue Callee = DAG.getExternalSymbol(getLibcallName(LC),
105 getPointerTy(DAG.getDataLayout()));
105106
106107 Type *RetTy = RetVT.getTypeForEVT(*DAG.getContext());
107108 TargetLowering::CallLoweringInfo CLI(DAG);
205206 NewRHS = DAG.getConstant(0, dl, RetVT);
206207 CCCode = getCmpLibcallCC(LC1);
207208 if (LC2 != RTLIB::UNKNOWN_LIBCALL) {
208 SDValue Tmp = DAG.getNode(ISD::SETCC, dl,
209 getSetCCResultType(*DAG.getContext(), RetVT),
210 NewLHS, NewRHS, DAG.getCondCode(CCCode));
209 SDValue Tmp = DAG.getNode(
210 ISD::SETCC, dl,
211 getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), RetVT),
212 NewLHS, NewRHS, DAG.getCondCode(CCCode));
211213 NewLHS = makeLibCall(DAG, LC2, RetVT, Ops, 2, false/*sign irrelevant*/,
212214 dl).first;
213 NewLHS = DAG.getNode(ISD::SETCC, dl,
214 getSetCCResultType(*DAG.getContext(), RetVT), NewLHS,
215 NewRHS, DAG.getCondCode(getCmpLibcallCC(LC2)));
215 NewLHS = DAG.getNode(
216 ISD::SETCC, dl,
217 getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), RetVT),
218 NewLHS, NewRHS, DAG.getCondCode(getCmpLibcallCC(LC2)));
216219 NewLHS = DAG.getNode(ISD::OR, dl, Tmp.getValueType(), Tmp, NewLHS);
217220 NewRHS = SDValue();
218221 }
241244
242245 if ((JTEncoding == MachineJumpTableInfo::EK_GPRel64BlockAddress) ||
243246 (JTEncoding == MachineJumpTableInfo::EK_GPRel32BlockAddress))
244 return DAG.getGLOBAL_OFFSET_TABLE(getPointerTy(0));
247 return DAG.getGLOBAL_OFFSET_TABLE(getPointerTy(DAG.getDataLayout()));
245248
246249 return Table;
247250 }
14701473 if (DCI.isBeforeLegalizeOps() ||
14711474 (isOperationLegal(ISD::SETCC, newVT) &&
14721475 getCondCodeAction(Cond, newVT.getSimpleVT()) == Legal)) {
1473 EVT NewSetCCVT = getSetCCResultType(*DAG.getContext(), newVT);
1476 EVT NewSetCCVT =
1477 getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), newVT);
14741478 SDValue NewConst = DAG.getConstant(C1.trunc(InSize), dl, newVT);
14751479
14761480 SDValue NewSetCC = DAG.getSetCC(dl, NewSetCCVT, N0.getOperand(0),
16891693 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
16901694 (VT == N0.getValueType() ||
16911695 (isTypeLegal(VT) && VT.bitsLE(N0.getValueType()))) &&
1692 N0.getOpcode() == ISD::AND)
1696 N0.getOpcode() == ISD::AND) {
1697 auto &DL = DAG.getDataLayout();
16931698 if (ConstantSDNode *AndRHS =
16941699 dyn_cast(N0.getOperand(1))) {
1695 EVT ShiftTy = DCI.isBeforeLegalize() ?
1696 getPointerTy() : getShiftAmountTy(N0.getValueType());
1700 EVT ShiftTy = DCI.isBeforeLegalize()
1701 ? getPointerTy(DL)
1702 : getShiftAmountTy(N0.getValueType());
16971703 if (Cond == ISD::SETNE && C1 == 0) {// (X & 8) != 0 --> (X & 8) >> 3
16981704 // Perform the xform if the AND RHS is a single bit.
16991705 if (AndRHS->getAPIntValue().isPowerOf2()) {
17131719 }
17141720 }
17151721 }
1722 }
17161723
17171724 if (C1.getMinSignedBits() <= 64 &&
17181725 !isLegalICmpImmediate(C1.getSExtValue())) {
17241731 const APInt &AndRHSC = AndRHS->getAPIntValue();
17251732 if ((-AndRHSC).isPowerOf2() && (AndRHSC & C1) == C1) {
17261733 unsigned ShiftBits = AndRHSC.countTrailingZeros();
1727 EVT ShiftTy = DCI.isBeforeLegalize() ?
1728 getPointerTy() : getShiftAmountTy(N0.getValueType());
1734 auto &DL = DAG.getDataLayout();
1735 EVT ShiftTy = DCI.isBeforeLegalize()
1736 ? getPointerTy(DL)
1737 : getShiftAmountTy(N0.getValueType());
17291738 EVT CmpTy = N0.getValueType();
17301739 SDValue Shift = DAG.getNode(ISD::SRL, dl, CmpTy, N0.getOperand(0),
17311740 DAG.getConstant(ShiftBits, dl,
17541763 NewC = NewC.lshr(ShiftBits);
17551764 if (ShiftBits && NewC.getMinSignedBits() <= 64 &&
17561765 isLegalICmpImmediate(NewC.getSExtValue())) {
1757 EVT ShiftTy = DCI.isBeforeLegalize() ?
1758 getPointerTy() : getShiftAmountTy(N0.getValueType());
1766 auto &DL = DAG.getDataLayout();
1767 EVT ShiftTy = DCI.isBeforeLegalize()
1768 ? getPointerTy(DL)
1769 : getShiftAmountTy(N0.getValueType());
17591770 EVT CmpTy = N0.getValueType();
17601771 SDValue Shift = DAG.getNode(ISD::SRL, dl, CmpTy, N0,
17611772 DAG.getConstant(ShiftBits, dl, ShiftTy));
23262337 assert(!CS.getType()->isVoidTy() &&
23272338 "Bad inline asm!");
23282339 if (StructType *STy = dyn_cast(CS.getType())) {
2329 OpInfo.ConstraintVT = getSimpleValueType(STy->getElementType(ResNo));
2340 OpInfo.ConstraintVT =
2341 getSimpleValueType(DL, STy->getElementType(ResNo));
23302342 } else {
23312343 assert(ResNo == 0 && "Asm only has one result!");
2332 OpInfo.ConstraintVT = getSimpleValueType(CS.getType());
2344 OpInfo.ConstraintVT = getSimpleValueType(DL, CS.getType());
23332345 }
23342346 ++ResNo;
23352347 break;
877877 setOperationAction(ISD::DEBUGTRAP, MVT::Other, Expand);
878878 }
879879
880 MVT TargetLoweringBase::getPointerTy(uint32_t AS) const {
881 return MVT::getIntegerVT(getPointerSizeInBits(AS));
882 }
883
884 unsigned TargetLoweringBase::getPointerSizeInBits(uint32_t AS) const {
885 return getDataLayout()->getPointerSizeInBits(AS);
886 }
887
888 unsigned TargetLoweringBase::getPointerTypeSizeInBits(Type *Ty) const {
889 assert(Ty->isPointerTy());
890 return getPointerSizeInBits(Ty->getPointerAddressSpace());
891 }
892
893880 MVT TargetLoweringBase::getScalarShiftAmountTy(EVT LHSTy) const {
894881 return MVT::getIntegerVT(8 * getDataLayout()->getPointerSize(0));
895882 }
13961383 }
13971384 }
13981385
1399 EVT TargetLoweringBase::getSetCCResultType(LLVMContext &, EVT VT) const {
1386 EVT TargetLoweringBase::getSetCCResultType(const DataLayout &DL, LLVMContext &,
1387 EVT VT) const {
14001388 assert(!VT.isVector() && "No default SetCC type for vectors!");
1401 return getPointerTy(0).SimpleTy;
1389 return getPointerTy(DL).SimpleTy;
14021390 }
14031391
14041392 MVT::SimpleValueType TargetLoweringBase::getCmpLibcallReturnType() const {
16121600 }
16131601
16141602 std::pair
1615 TargetLoweringBase::getTypeLegalizationCost(Type *Ty) const {
1603 TargetLoweringBase::getTypeLegalizationCost(const DataLayout &DL,
1604 Type *Ty) const {
16161605 LLVMContext &C = Ty->getContext();
1617 EVT MTy = getValueType(Ty);
1606 EVT MTy = getValueType(DL, Ty);
16181607
16191608 unsigned Cost = 1;
16201609 // We keep legalizing the type until we find a legal kind. We assume that
309309 }
310310
311311 unsigned AArch64FastISel::fastMaterializeAlloca(const AllocaInst *AI) {
312 assert(TLI.getValueType(AI->getType(), true) == MVT::i64 &&
312 assert(TLI.getValueType(DL, AI->getType(), true) == MVT::i64 &&
313313 "Alloca should always return a pointer.");
314314
315315 // Don't handle dynamic allocas.
419419
420420 unsigned char OpFlags = Subtarget->ClassifyGlobalReference(GV, TM);
421421
422 EVT DestEVT = TLI.getValueType(GV->getType(), true);
422 EVT DestEVT = TLI.getValueType(DL, GV->getType(), true);
423423 if (!DestEVT.isSimple())
424424 return 0;
425425
458458 }
459459
460460 unsigned AArch64FastISel::fastMaterializeConstant(const Constant *C) {
461 EVT CEVT = TLI.getValueType(C->getType(), true);
461 EVT CEVT = TLI.getValueType(DL, C->getType(), true);
462462
463463 // Only handle simple types.
464464 if (!CEVT.isSimple())
537537 }
538538 case Instruction::IntToPtr: {
539539 // Look past no-op inttoptrs.
540 if (TLI.getValueType(U->getOperand(0)->getType()) == TLI.getPointerTy())
540 if (TLI.getValueType(DL, U->getOperand(0)->getType()) ==
541 TLI.getPointerTy(DL))
541542 return computeAddress(U->getOperand(0), Addr, Ty);
542543 break;
543544 }
544545 case Instruction::PtrToInt: {
545546 // Look past no-op ptrtoints.
546 if (TLI.getValueType(U->getType()) == TLI.getPointerTy())
547 if (TLI.getValueType(DL, U->getType()) == TLI.getPointerTy(DL))
547548 return computeAddress(U->getOperand(0), Addr, Ty);
548549 break;
549550 }
878879 case Instruction::IntToPtr:
879880 // Look past no-op inttoptrs if its operand is in the same BB.
880881 if (InMBB &&
881 TLI.getValueType(U->getOperand(0)->getType()) == TLI.getPointerTy())
882 TLI.getValueType(DL, U->getOperand(0)->getType()) ==
883 TLI.getPointerTy(DL))
882884 return computeCallAddress(U->getOperand(0), Addr);
883885 break;
884886 case Instruction::PtrToInt:
885887 // Look past no-op ptrtoints if its operand is in the same BB.
886 if (InMBB &&
887 TLI.getValueType(U->getType()) == TLI.getPointerTy())
888 if (InMBB && TLI.getValueType(DL, U->getType()) == TLI.getPointerTy(DL))
888889 return computeCallAddress(U->getOperand(0), Addr);
889890 break;
890891 }
905906
906907
907908 bool AArch64FastISel::isTypeLegal(Type *Ty, MVT &VT) {
908 EVT evt = TLI.getValueType(Ty, true);
909 EVT evt = TLI.getValueType(DL, Ty, true);
909910
910911 // Only handle simple types.
911912 if (evt == MVT::Other || !evt.isSimple())
13891390
13901391 bool AArch64FastISel::emitCmp(const Value *LHS, const Value *RHS, bool IsZExt) {
13911392 Type *Ty = LHS->getType();
1392 EVT EVT = TLI.getValueType(Ty, true);
1393 EVT EVT = TLI.getValueType(DL, Ty, true);
13931394 if (!EVT.isSimple())
13941395 return false;
13951396 MVT VT = EVT.getSimpleVT();
27602761 if (SrcReg == 0)
27612762 return false;
27622763
2763 EVT SrcVT = TLI.getValueType(I->getOperand(0)->getType(), true);
2764 EVT SrcVT = TLI.getValueType(DL, I->getOperand(0)->getType(), true);
27642765 if (SrcVT == MVT::f128)
27652766 return false;
27662767
27962797 return false;
27972798 bool SrcIsKill = hasTrivialKill(I->getOperand(0));
27982799
2799 EVT SrcVT = TLI.getValueType(I->getOperand(0)->getType(), true);
2800 EVT SrcVT = TLI.getValueType(DL, I->getOperand(0)->getType(), true);
28002801
28012802 // Handle sign-extension.
28022803 if (SrcVT == MVT::i16 || SrcVT == MVT::i8 || SrcVT == MVT::i1) {
28552856 if (ArgTy->isStructTy() || ArgTy->isArrayTy())
28562857 return false;
28572858
2858 EVT ArgVT = TLI.getValueType(ArgTy);
2859 EVT ArgVT = TLI.getValueType(DL, ArgTy);
28592860 if (!ArgVT.isSimple())
28602861 return false;
28612862
28972898 unsigned GPRIdx = 0;
28982899 unsigned FPRIdx = 0;
28992900 for (auto const &Arg : F->args()) {
2900 MVT VT = TLI.getSimpleValueType(Arg.getType());
2901 MVT VT = TLI.getSimpleValueType(DL, Arg.getType());
29012902 unsigned SrcReg;
29022903 const TargetRegisterClass *RC;
29032904 if (VT >= MVT::i1 && VT <= MVT::i32) {
37233724 if (!MRI.getRegClass(SrcReg)->contains(DestReg))
37243725 return false;
37253726
3726 EVT RVEVT = TLI.getValueType(RV->getType());
3727 EVT RVEVT = TLI.getValueType(DL, RV->getType());
37273728 if (!RVEVT.isSimple())
37283729 return false;
37293730
37713772 Value *Op = I->getOperand(0);
37723773 Type *SrcTy = Op->getType();
37733774
3774 EVT SrcEVT = TLI.getValueType(SrcTy, true);
3775 EVT DestEVT = TLI.getValueType(DestTy, true);
3775 EVT SrcEVT = TLI.getValueType(DL, SrcTy, true);
3776 EVT DestEVT = TLI.getValueType(DL, DestTy, true);
37763777 if (!SrcEVT.isSimple())
37773778 return false;
37783779 if (!DestEVT.isSimple())
44584459 }
44594460
44604461 bool AArch64FastISel::selectRem(const Instruction *I, unsigned ISDOpcode) {
4461 EVT DestEVT = TLI.getValueType(I->getType(), true);
4462 EVT DestEVT = TLI.getValueType(DL, I->getType(), true);
44624463 if (!DestEVT.isSimple())
44634464 return false;
44644465
48244825 bool IdxNIsKill = hasTrivialKill(Idx);
48254826
48264827 // If the index is smaller or larger than intptr_t, truncate or extend it.
4827 MVT PtrVT = TLI.getPointerTy();
4828 MVT PtrVT = TLI.getPointerTy(DL);
48284829 EVT IdxVT = EVT::getEVT(Idx->getType(), /*HandleUnknown=*/false);
48294830 if (IdxVT.bitsLT(PtrVT)) {
48304831 IdxN = emitIntExt(IdxVT.getSimpleVT(), IdxN, PtrVT, /*IsZExt=*/false);
48484849 // into a single N = N + TotalOffset.
48494850 uint64_t TotalOffs = 0;
48504851 Type *Ty = I->getOperand(0)->getType();
4851 MVT VT = TLI.getPointerTy();
4852 MVT VT = TLI.getPointerTy(DL);
48524853 for (auto OI = std::next(I->op_begin()), E = I->op_end(); OI != E; ++OI) {
48534854 const Value *Idx = *OI;
48544855 if (auto *StTy = dyn_cast(Ty)) {
609609 bool AArch64DAGToDAGISel::SelectAddrModeIndexed(SDValue N, unsigned Size,
610610 SDValue &Base, SDValue &OffImm) {
611611 SDLoc dl(N);
612 const DataLayout &DL = CurDAG->getDataLayout();
612613 const TargetLowering *TLI = getTargetLowering();
613614 if (N.getOpcode() == ISD::FrameIndex) {
614615 int FI = cast(N)->getIndex();
615 Base = CurDAG->getTargetFrameIndex(FI, TLI->getPointerTy());
616 Base = CurDAG->getTargetFrameIndex(FI, TLI->getPointerTy(DL));
616617 OffImm = CurDAG->getTargetConstant(0, dl, MVT::i64);
617618 return true;
618619 }
627628
628629