llvm.org GIT mirror llvm / f295ff3
[AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description. Summary of changes: - added description of GFX10; - added description of operands sccz, vccz, lds_direct, etc; - minor bugfixing and improvements. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365347 91177308-0d34-0410-b5e6-96231b3b80d8 Dmitry Preobrazhensky a month ago
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0 ..
1 **************************************************
2 * *
3 * Automatically generated file, do not edit! *
4 * *
5 **************************************************
6
7 ============================
8 Syntax of GFX10 Instructions
9 ============================
10
11 .. contents::
12 :local:
13
14 Notation
15 ========
16
17 Notation used in this document is explained :ref:`here`.
18
19 Introduction
20 ============
21
22 An overview of generic syntax and other features of AMDGPU instructions may be found :ref:`in this document`.
23
24 Instructions
25 ============
26
27
28 DPP16
29 -----------------------
30
31 .. parsed-literal::
32
33 **INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS**
34 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
35 v_add_co_ci_u32_dpp :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`, :ref:`vsrc1`, :ref:`vcc` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
36 v_add_f16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
37 v_add_f32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
38 v_add_nc_u32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
39 v_and_b32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
40 v_ashrrev_i32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`u32`, :ref:`vsrc1` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
41 v_bfrev_b32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
42 v_ceil_f16_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
43 v_ceil_f32_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
44 v_cos_f16_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
45 v_cos_f32_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
46 v_cvt_f16_f32_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
47 v_cvt_f16_i16_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
48 v_cvt_f16_u16_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
49 v_cvt_f32_f16_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
50 v_cvt_f32_i32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
51 v_cvt_f32_u32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
52 v_cvt_f32_ubyte0_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
53 v_cvt_f32_ubyte1_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
54 v_cvt_f32_ubyte2_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
55 v_cvt_f32_ubyte3_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
56 v_cvt_flr_i32_f32_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
57 v_cvt_i16_f16_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
58 v_cvt_i32_f32_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
59 v_cvt_norm_i16_f16_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
60 v_cvt_norm_u16_f16_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
61 v_cvt_off_f32_i4_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
62 v_cvt_rpi_i32_f32_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
63 v_cvt_u16_f16_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
64 v_cvt_u32_f32_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
65 v_exp_f16_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
66 v_exp_f32_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
67 v_ffbh_i32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
68 v_ffbh_u32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
69 v_ffbl_b32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
70 v_floor_f16_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
71 v_floor_f32_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
72 v_fmac_f16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
73 v_fmac_f32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
74 v_fract_f16_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
75 v_fract_f32_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
76 v_frexp_exp_i16_f16_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
77 v_frexp_exp_i32_f32_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
78 v_frexp_mant_f16_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
79 v_frexp_mant_f32_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
80 v_ldexp_f16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`i16` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
81 v_log_f16_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
82 v_log_f32_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
83 v_lshlrev_b32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`u32`, :ref:`vsrc1` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
84 v_lshrrev_b32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`u32`, :ref:`vsrc1` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
85 v_mac_f32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
86 v_max_f16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
87 v_max_f32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
88 v_max_i32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
89 v_max_u32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
90 v_min_f16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
91 v_min_f32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
92 v_min_i32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
93 v_min_u32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
94 v_mov_b32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
95 v_mul_f16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
96 v_mul_f32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
97 v_mul_hi_i32_i24_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
98 v_mul_hi_u32_u24_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
99 v_mul_i32_i24_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
100 v_mul_legacy_f32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
101 v_mul_u32_u24_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
102 v_not_b32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
103 v_or_b32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
104 v_rcp_f16_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
105 v_rcp_f32_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
106 v_rcp_iflag_f32_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
107 v_rndne_f16_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
108 v_rndne_f32_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
109 v_rsq_f16_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
110 v_rsq_f32_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
111 v_sat_pk_u8_i16_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
112 v_sin_f16_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
113 v_sin_f32_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
114 v_sqrt_f16_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
115 v_sqrt_f32_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
116 v_sub_co_ci_u32_dpp :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`, :ref:`vsrc1`, :ref:`vcc` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
117 v_sub_f16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
118 v_sub_f32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
119 v_sub_nc_u32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
120 v_subrev_co_ci_u32_dpp :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`, :ref:`vsrc1`, :ref:`vcc` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
121 v_subrev_f16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
122 v_subrev_f32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
123 v_subrev_nc_u32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
124 v_trunc_f16_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
125 v_trunc_f32_dpp :ref:`vdst`, :ref:`vsrc`::ref:`m` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
126 v_xnor_b32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
127 v_xor_b32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp16_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl` :ref:`fi`
128
129 DPP8
130 -----------------------
131
132 .. parsed-literal::
133
134 **INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS**
135 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
136 v_add_co_ci_u32_dpp :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`, :ref:`vsrc1`, :ref:`vcc` :ref:`dpp8_sel` :ref:`fi`
137 v_add_f16_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
138 v_add_f32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
139 v_add_nc_u32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
140 v_and_b32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
141 v_ashrrev_i32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`u32`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
142 v_bfrev_b32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
143 v_ceil_f16_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
144 v_ceil_f32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
145 v_cos_f16_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
146 v_cos_f32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
147 v_cvt_f16_f32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
148 v_cvt_f16_i16_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
149 v_cvt_f16_u16_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
150 v_cvt_f32_f16_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
151 v_cvt_f32_i32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
152 v_cvt_f32_u32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
153 v_cvt_f32_ubyte0_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
154 v_cvt_f32_ubyte1_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
155 v_cvt_f32_ubyte2_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
156 v_cvt_f32_ubyte3_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
157 v_cvt_flr_i32_f32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
158 v_cvt_i16_f16_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
159 v_cvt_i32_f32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
160 v_cvt_norm_i16_f16_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
161 v_cvt_norm_u16_f16_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
162 v_cvt_off_f32_i4_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
163 v_cvt_rpi_i32_f32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
164 v_cvt_u16_f16_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
165 v_cvt_u32_f32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
166 v_exp_f16_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
167 v_exp_f32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
168 v_ffbh_i32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
169 v_ffbh_u32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
170 v_ffbl_b32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
171 v_floor_f16_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
172 v_floor_f32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
173 v_fmac_f16_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
174 v_fmac_f32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
175 v_fract_f16_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
176 v_fract_f32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
177 v_frexp_exp_i16_f16_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
178 v_frexp_exp_i32_f32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
179 v_frexp_mant_f16_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
180 v_frexp_mant_f32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
181 v_ldexp_f16_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1`::ref:`i16` :ref:`dpp8_sel` :ref:`fi`
182 v_log_f16_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
183 v_log_f32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
184 v_lshlrev_b32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`u32`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
185 v_lshrrev_b32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`u32`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
186 v_mac_f32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
187 v_max_f16_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
188 v_max_f32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
189 v_max_i32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
190 v_max_u32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
191 v_min_f16_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
192 v_min_f32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
193 v_min_i32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
194 v_min_u32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
195 v_mov_b32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
196 v_mul_f16_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
197 v_mul_f32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
198 v_mul_hi_i32_i24_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
199 v_mul_hi_u32_u24_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
200 v_mul_i32_i24_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
201 v_mul_legacy_f32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
202 v_mul_u32_u24_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
203 v_not_b32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
204 v_or_b32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
205 v_rcp_f16_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
206 v_rcp_f32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
207 v_rcp_iflag_f32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
208 v_rndne_f16_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
209 v_rndne_f32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
210 v_rsq_f16_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
211 v_rsq_f32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
212 v_sat_pk_u8_i16_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
213 v_sin_f16_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
214 v_sin_f32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
215 v_sqrt_f16_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
216 v_sqrt_f32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
217 v_sub_co_ci_u32_dpp :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`, :ref:`vsrc1`, :ref:`vcc` :ref:`dpp8_sel` :ref:`fi`
218 v_sub_f16_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
219 v_sub_f32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
220 v_sub_nc_u32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
221 v_subrev_co_ci_u32_dpp :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`, :ref:`vsrc1`, :ref:`vcc` :ref:`dpp8_sel` :ref:`fi`
222 v_subrev_f16_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
223 v_subrev_f32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
224 v_subrev_nc_u32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
225 v_trunc_f16_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
226 v_trunc_f32_dpp :ref:`vdst`, :ref:`vsrc` :ref:`dpp8_sel` :ref:`fi`
227 v_xnor_b32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
228 v_xor_b32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp8_sel` :ref:`fi`
229
230 DS
231 -----------------------
232
233 .. parsed-literal::
234
235 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
236 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
237 ds_add_f32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
238 ds_add_rtn_f32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
239 ds_add_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
240 ds_add_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
241 ds_add_src2_f32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
242 ds_add_src2_u32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
243 ds_add_src2_u64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
244 ds_add_u32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
245 ds_add_u64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
246 ds_and_b32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
247 ds_and_b64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
248 ds_and_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
249 ds_and_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
250 ds_and_src2_b32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
251 ds_and_src2_b64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
252 ds_append :ref:`vdst` :ref:`offset16` :ref:`gds`
253 ds_bpermute_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16`
254 ds_cmpst_b32 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
255 ds_cmpst_b64 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
256 ds_cmpst_f32 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
257 ds_cmpst_f64 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
258 ds_cmpst_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
259 ds_cmpst_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
260 ds_cmpst_rtn_f32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
261 ds_cmpst_rtn_f64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
262 ds_condxchg32_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
263 ds_consume :ref:`vdst` :ref:`offset16` :ref:`gds`
264 ds_dec_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
265 ds_dec_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
266 ds_dec_src2_u32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
267 ds_dec_src2_u64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
268 ds_dec_u32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
269 ds_dec_u64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
270 ds_gws_barrier :ref:`vdata` :ref:`offset16` :ref:`gds`
271 ds_gws_init :ref:`vdata` :ref:`offset16` :ref:`gds`
272 ds_gws_sema_br :ref:`vdata` :ref:`offset16` :ref:`gds`
273 ds_gws_sema_p :ref:`offset16` :ref:`gds`
274 ds_gws_sema_release_all :ref:`offset16` :ref:`gds`
275 ds_gws_sema_v :ref:`offset16` :ref:`gds`
276 ds_inc_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
277 ds_inc_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
278 ds_inc_src2_u32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
279 ds_inc_src2_u64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
280 ds_inc_u32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
281 ds_inc_u64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
282 ds_max_f32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
283 ds_max_f64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
284 ds_max_i32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
285 ds_max_i64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
286 ds_max_rtn_f32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
287 ds_max_rtn_f64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
288 ds_max_rtn_i32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
289 ds_max_rtn_i64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
290 ds_max_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
291 ds_max_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
292 ds_max_src2_f32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
293 ds_max_src2_f64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
294 ds_max_src2_i32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
295 ds_max_src2_i64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
296 ds_max_src2_u32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
297 ds_max_src2_u64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
298 ds_max_u32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
299 ds_max_u64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
300 ds_min_f32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
301 ds_min_f64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
302 ds_min_i32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
303 ds_min_i64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
304 ds_min_rtn_f32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
305 ds_min_rtn_f64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
306 ds_min_rtn_i32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
307 ds_min_rtn_i64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
308 ds_min_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
309 ds_min_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
310 ds_min_src2_f32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
311 ds_min_src2_f64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
312 ds_min_src2_i32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
313 ds_min_src2_i64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
314 ds_min_src2_u32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
315 ds_min_src2_u64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
316 ds_min_u32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
317 ds_min_u64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
318 ds_mskor_b32 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
319 ds_mskor_b64 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
320 ds_mskor_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
321 ds_mskor_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
322 ds_nop
323 ds_or_b32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
324 ds_or_b64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
325 ds_or_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
326 ds_or_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
327 ds_or_src2_b32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
328 ds_or_src2_b64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
329 ds_ordered_count :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
330 ds_permute_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16`
331 ds_read2_b32 :ref:`vdst`::ref:`b32x2`, :ref:`vaddr` :ref:`offset8` :ref:`offset8` :ref:`gds`
332 ds_read2_b64 :ref:`vdst`::ref:`b64x2`, :ref:`vaddr` :ref:`offset8` :ref:`offset8` :ref:`gds`
333 ds_read2st64_b32 :ref:`vdst`::ref:`b32x2`, :ref:`vaddr` :ref:`offset8` :ref:`offset8` :ref:`gds`
334 ds_read2st64_b64 :ref:`vdst`::ref:`b64x2`, :ref:`vaddr` :ref:`offset8` :ref:`offset8` :ref:`gds`
335 ds_read_b128 :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
336 ds_read_b32 :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
337 ds_read_b64 :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
338 ds_read_b96 :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
339 ds_read_i16 :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
340 ds_read_i8 :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
341 ds_read_i8_d16 :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
342 ds_read_i8_d16_hi :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
343 ds_read_u16 :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
344 ds_read_u16_d16 :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
345 ds_read_u16_d16_hi :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
346 ds_read_u8 :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
347 ds_read_u8_d16 :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
348 ds_read_u8_d16_hi :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
349 ds_rsub_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
350 ds_rsub_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
351 ds_rsub_src2_u32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
352 ds_rsub_src2_u64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
353 ds_rsub_u32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
354 ds_rsub_u64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
355 ds_sub_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
356 ds_sub_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
357 ds_sub_src2_u32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
358 ds_sub_src2_u64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
359 ds_sub_u32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
360 ds_sub_u64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
361 ds_swizzle_b32 :ref:`vdst`, :ref:`vaddr` :ref:`pattern` :ref:`gds`
362 ds_wrap_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
363 ds_write2_b32 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset8` :ref:`offset8` :ref:`gds`
364 ds_write2_b64 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset8` :ref:`offset8` :ref:`gds`
365 ds_write2st64_b32 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset8` :ref:`offset8` :ref:`gds`
366 ds_write2st64_b64 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset8` :ref:`offset8` :ref:`gds`
367 ds_write_b128 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
368 ds_write_b16 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
369 ds_write_b16_d16_hi :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
370 ds_write_b32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
371 ds_write_b64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
372 ds_write_b8 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
373 ds_write_b8_d16_hi :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
374 ds_write_b96 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
375 ds_write_src2_b32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
376 ds_write_src2_b64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
377 ds_wrxchg2_rtn_b32 :ref:`vdst`::ref:`b32x2`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset8` :ref:`offset8` :ref:`gds`
378 ds_wrxchg2_rtn_b64 :ref:`vdst`::ref:`b64x2`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset8` :ref:`offset8` :ref:`gds`
379 ds_wrxchg2st64_rtn_b32 :ref:`vdst`::ref:`b32x2`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset8` :ref:`offset8` :ref:`gds`
380 ds_wrxchg2st64_rtn_b64 :ref:`vdst`::ref:`b64x2`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset8` :ref:`offset8` :ref:`gds`
381 ds_wrxchg_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
382 ds_wrxchg_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
383 ds_xor_b32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
384 ds_xor_b64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
385 ds_xor_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
386 ds_xor_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
387 ds_xor_src2_b32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
388 ds_xor_src2_b64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
389
390 EXP
391 -----------------------
392
393 .. parsed-literal::
394
395 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **SRC3** **MODIFIERS**
396 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
397 exp :ref:`tgt`, :ref:`vsrc0`, :ref:`vsrc1`, :ref:`vsrc2`, :ref:`vsrc3` :ref:`done` :ref:`compr` :ref:`vm`
398
399 FLAT
400 -----------------------
401
402 .. parsed-literal::
403
404 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
405 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
406 flat_atomic_add :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata` :ref:`offset11` :ref:`glc` :ref:`slc`
407 flat_atomic_add_x2 :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata` :ref:`offset11` :ref:`glc` :ref:`slc`
408 flat_atomic_and :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata` :ref:`offset11` :ref:`glc` :ref:`slc`
409 flat_atomic_and_x2 :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata` :ref:`offset11` :ref:`glc` :ref:`slc`
410 flat_atomic_cmpswap :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata`::ref:`b32x2` :ref:`offset11` :ref:`glc` :ref:`slc`
411 flat_atomic_cmpswap_x2 :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata`::ref:`b64x2` :ref:`offset11` :ref:`glc` :ref:`slc`
412 flat_atomic_dec :ref:`vdst`::ref:`opt`::ref:`u32`, :ref:`vaddr`, :ref:`vdata`::ref:`u32` :ref:`offset11` :ref:`glc` :ref:`slc`
413 flat_atomic_dec_x2 :ref:`vdst`::ref:`opt`::ref:`u64`, :ref:`vaddr`, :ref:`vdata`::ref:`u64` :ref:`offset11` :ref:`glc` :ref:`slc`
414 flat_atomic_fcmpswap :ref:`vdst`::ref:`opt`::ref:`f32`, :ref:`vaddr`, :ref:`vdata`::ref:`f32x2` :ref:`offset11` :ref:`glc` :ref:`slc`
415 flat_atomic_fcmpswap_x2 :ref:`vdst`::ref:`opt`::ref:`f64`, :ref:`vaddr`, :ref:`vdata`::ref:`f64x2` :ref:`offset11` :ref:`glc` :ref:`slc`
416 flat_atomic_fmax :ref:`vdst`::ref:`opt`::ref:`f32`, :ref:`vaddr`, :ref:`vdata`::ref:`f32` :ref:`offset11` :ref:`glc` :ref:`slc`
417 flat_atomic_fmax_x2 :ref:`vdst`::ref:`opt`::ref:`f64`, :ref:`vaddr`, :ref:`vdata`::ref:`f64` :ref:`offset11` :ref:`glc` :ref:`slc`
418 flat_atomic_fmin :ref:`vdst`::ref:`opt`::ref:`f32`, :ref:`vaddr`, :ref:`vdata`::ref:`f32` :ref:`offset11` :ref:`glc` :ref:`slc`
419 flat_atomic_fmin_x2 :ref:`vdst`::ref:`opt`::ref:`f64`, :ref:`vaddr`, :ref:`vdata`::ref:`f64` :ref:`offset11` :ref:`glc` :ref:`slc`
420 flat_atomic_inc :ref:`vdst`::ref:`opt`::ref:`u32`, :ref:`vaddr`, :ref:`vdata`::ref:`u32` :ref:`offset11` :ref:`glc` :ref:`slc`
421 flat_atomic_inc_x2 :ref:`vdst`::ref:`opt`::ref:`u64`, :ref:`vaddr`, :ref:`vdata`::ref:`u64` :ref:`offset11` :ref:`glc` :ref:`slc`
422 flat_atomic_or :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata` :ref:`offset11` :ref:`glc` :ref:`slc`
423 flat_atomic_or_x2 :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata` :ref:`offset11` :ref:`glc` :ref:`slc`
424 flat_atomic_smax :ref:`vdst`::ref:`opt`::ref:`s32`, :ref:`vaddr`, :ref:`vdata`::ref:`s32` :ref:`offset11` :ref:`glc` :ref:`slc`
425 flat_atomic_smax_x2 :ref:`vdst`::ref:`opt`::ref:`s64`, :ref:`vaddr`, :ref:`vdata`::ref:`s64` :ref:`offset11` :ref:`glc` :ref:`slc`
426 flat_atomic_smin :ref:`vdst`::ref:`opt`::ref:`s32`, :ref:`vaddr`, :ref:`vdata`::ref:`s32` :ref:`offset11` :ref:`glc` :ref:`slc`
427 flat_atomic_smin_x2 :ref:`vdst`::ref:`opt`::ref:`s64`, :ref:`vaddr`, :ref:`vdata`::ref:`s64` :ref:`offset11` :ref:`glc` :ref:`slc`
428 flat_atomic_sub :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata` :ref:`offset11` :ref:`glc` :ref:`slc`
429 flat_atomic_sub_x2 :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata` :ref:`offset11` :ref:`glc` :ref:`slc`
430 flat_atomic_swap :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata` :ref:`offset11` :ref:`glc` :ref:`slc`
431 flat_atomic_swap_x2 :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata` :ref:`offset11` :ref:`glc` :ref:`slc`
432 flat_atomic_umax :ref:`vdst`::ref:`opt`::ref:`u32`, :ref:`vaddr`, :ref:`vdata`::ref:`u32` :ref:`offset11` :ref:`glc` :ref:`slc`
433 flat_atomic_umax_x2 :ref:`vdst`::ref:`opt`::ref:`u64`, :ref:`vaddr`, :ref:`vdata`::ref:`u64` :ref:`offset11` :ref:`glc` :ref:`slc`
434 flat_atomic_umin :ref:`vdst`::ref:`opt`::ref:`u32`, :ref:`vaddr`, :ref:`vdata`::ref:`u32` :ref:`offset11` :ref:`glc` :ref:`slc`
435 flat_atomic_umin_x2 :ref:`vdst`::ref:`opt`::ref:`u64`, :ref:`vaddr`, :ref:`vdata`::ref:`u64` :ref:`offset11` :ref:`glc` :ref:`slc`
436 flat_atomic_xor :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata` :ref:`offset11` :ref:`glc` :ref:`slc`
437 flat_atomic_xor_x2 :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata` :ref:`offset11` :ref:`glc` :ref:`slc`
438 flat_load_dword :ref:`vdst`, :ref:`vaddr` :ref:`offset11` :ref:`glc` :ref:`slc` :ref:`dlc`
439 flat_load_dwordx2 :ref:`vdst`, :ref:`vaddr` :ref:`offset11` :ref:`glc` :ref:`slc` :ref:`dlc`
440 flat_load_dwordx3 :ref:`vdst`, :ref:`vaddr` :ref:`offset11` :ref:`glc` :ref:`slc` :ref:`dlc`
441 flat_load_dwordx4 :ref:`vdst`, :ref:`vaddr` :ref:`offset11` :ref:`glc` :ref:`slc` :ref:`dlc`
442 flat_load_sbyte :ref:`vdst`, :ref:`vaddr` :ref:`offset11` :ref:`glc` :ref:`slc` :ref:`dlc`
443 flat_load_sbyte_d16 :ref:`vdst`, :ref:`vaddr` :ref:`offset11` :ref:`glc` :ref:`slc` :ref:`dlc`
444 flat_load_sbyte_d16_hi :ref:`vdst`, :ref:`vaddr` :ref:`offset11` :ref:`glc` :ref:`slc` :ref:`dlc`
445 flat_load_short_d16 :ref:`vdst`, :ref:`vaddr` :ref:`offset11` :ref:`glc` :ref:`slc` :ref:`dlc`
446 flat_load_short_d16_hi :ref:`vdst`, :ref:`vaddr` :ref:`offset11` :ref:`glc` :ref:`slc` :ref:`dlc`
447 flat_load_sshort :ref:`vdst`, :ref:`vaddr` :ref:`offset11` :ref:`glc` :ref:`slc` :ref:`dlc`
448 flat_load_ubyte :ref:`vdst`, :ref:`vaddr` :ref:`offset11` :ref:`glc` :ref:`slc` :ref:`dlc`
449 flat_load_ubyte_d16 :ref:`vdst`, :ref:`vaddr` :ref:`offset11` :ref:`glc` :ref:`slc` :ref:`dlc`
450 flat_load_ubyte_d16_hi :ref:`vdst`, :ref:`vaddr` :ref:`offset11` :ref:`glc` :ref:`slc` :ref:`dlc`
451 flat_load_ushort :ref:`vdst`, :ref:`vaddr` :ref:`offset11` :ref:`glc` :ref:`slc` :ref:`dlc`
452 flat_store_byte :ref:`vaddr`, :ref:`vdata` :ref:`offset11` :ref:`glc` :ref:`slc` :ref:`dlc`
453 flat_store_byte_d16_hi :ref:`vaddr`, :ref:`vdata` :ref:`offset11` :ref:`glc` :ref:`slc` :ref:`dlc`
454 flat_store_dword :ref:`vaddr`, :ref:`vdata` :ref:`offset11` :ref:`glc` :ref:`slc` :ref:`dlc`
455 flat_store_dwordx2 :ref:`vaddr`, :ref:`vdata` :ref:`offset11` :ref:`glc` :ref:`slc` :ref:`dlc`
456 flat_store_dwordx3 :ref:`vaddr`, :ref:`vdata` :ref:`offset11` :ref:`glc` :ref:`slc` :ref:`dlc`
457 flat_store_dwordx4 :ref:`vaddr`, :ref:`vdata` :ref:`offset11` :ref:`glc` :ref:`slc` :ref:`dlc`
458 flat_store_short :ref:`vaddr`, :ref:`vdata` :ref:`offset11` :ref:`glc` :ref:`slc` :ref:`dlc`
459 flat_store_short_d16_hi :ref:`vaddr`, :ref:`vdata` :ref:`offset11` :ref:`glc` :ref:`slc` :ref:`dlc`
460 global_atomic_add :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
461 global_atomic_add_x2 :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
462 global_atomic_and :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
463 global_atomic_and_x2 :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
464 global_atomic_cmpswap :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata`::ref:`b32x2`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
465 global_atomic_cmpswap_x2 :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata`::ref:`b64x2`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
466 global_atomic_dec :ref:`vdst`::ref:`opt`::ref:`u32`, :ref:`vaddr`, :ref:`vdata`::ref:`u32`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
467 global_atomic_dec_x2 :ref:`vdst`::ref:`opt`::ref:`u64`, :ref:`vaddr`, :ref:`vdata`::ref:`u64`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
468 global_atomic_fmax :ref:`vdst`::ref:`opt`::ref:`f32`, :ref:`vaddr`, :ref:`vdata`::ref:`f32`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
469 global_atomic_fmax_x2 :ref:`vdst`::ref:`opt`::ref:`f64`, :ref:`vaddr`, :ref:`vdata`::ref:`f64`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
470 global_atomic_fmin :ref:`vdst`::ref:`opt`::ref:`f32`, :ref:`vaddr`, :ref:`vdata`::ref:`f32`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
471 global_atomic_fmin_x2 :ref:`vdst`::ref:`opt`::ref:`f64`, :ref:`vaddr`, :ref:`vdata`::ref:`f64`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
472 global_atomic_inc :ref:`vdst`::ref:`opt`::ref:`u32`, :ref:`vaddr`, :ref:`vdata`::ref:`u32`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
473 global_atomic_inc_x2 :ref:`vdst`::ref:`opt`::ref:`u64`, :ref:`vaddr`, :ref:`vdata`::ref:`u64`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
474 global_atomic_or :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
475 global_atomic_or_x2 :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
476 global_atomic_smax :ref:`vdst`::ref:`opt`::ref:`s32`, :ref:`vaddr`, :ref:`vdata`::ref:`s32`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
477 global_atomic_smax_x2 :ref:`vdst`::ref:`opt`::ref:`s64`, :ref:`vaddr`, :ref:`vdata`::ref:`s64`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
478 global_atomic_smin :ref:`vdst`::ref:`opt`::ref:`s32`, :ref:`vaddr`, :ref:`vdata`::ref:`s32`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
479 global_atomic_smin_x2 :ref:`vdst`::ref:`opt`::ref:`s64`, :ref:`vaddr`, :ref:`vdata`::ref:`s64`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
480 global_atomic_sub :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
481 global_atomic_sub_x2 :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
482 global_atomic_swap :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
483 global_atomic_swap_x2 :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
484 global_atomic_umax :ref:`vdst`::ref:`opt`::ref:`u32`, :ref:`vaddr`, :ref:`vdata`::ref:`u32`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
485 global_atomic_umax_x2 :ref:`vdst`::ref:`opt`::ref:`u64`, :ref:`vaddr`, :ref:`vdata`::ref:`u64`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
486 global_atomic_umin :ref:`vdst`::ref:`opt`::ref:`u32`, :ref:`vaddr`, :ref:`vdata`::ref:`u32`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
487 global_atomic_umin_x2 :ref:`vdst`::ref:`opt`::ref:`u64`, :ref:`vaddr`, :ref:`vdata`::ref:`u64`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
488 global_atomic_xor :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
489 global_atomic_xor_x2 :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
490 global_load_dword :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
491 global_load_dwordx2 :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
492 global_load_dwordx3 :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
493 global_load_dwordx4 :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
494 global_load_sbyte :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
495 global_load_sbyte_d16 :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
496 global_load_sbyte_d16_hi :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
497 global_load_short_d16 :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
498 global_load_short_d16_hi :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
499 global_load_sshort :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
500 global_load_ubyte :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
501 global_load_ubyte_d16 :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
502 global_load_ubyte_d16_hi :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
503 global_load_ushort :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
504 global_store_byte :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
505 global_store_byte_d16_hi :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
506 global_store_dword :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
507 global_store_dwordx2 :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
508 global_store_dwordx3 :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
509 global_store_dwordx4 :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
510 global_store_short :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
511 global_store_short_d16_hi :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc`
512 scratch_load_dword :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc` :ref:`slc` :ref:`dlc`
513 scratch_load_dwordx2 :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc` :ref:`slc` :ref:`dlc`
514 scratch_load_dwordx3 :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc` :ref:`slc` :ref:`dlc`
515 scratch_load_dwordx4 :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc` :ref:`slc` :ref:`dlc`
516 scratch_load_sbyte :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc` :ref:`slc` :ref:`dlc`
517 scratch_load_sbyte_d16 :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc` :ref:`slc` :ref:`dlc`
518 scratch_load_sbyte_d16_hi :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc` :ref:`slc` :ref:`dlc`
519 scratch_load_short_d16 :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc` :ref:`slc` :ref:`dlc`
520 scratch_load_short_d16_hi :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc` :ref:`slc` :ref:`dlc`
521 scratch_load_sshort :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc` :ref:`slc` :ref:`dlc`
522 scratch_load_ubyte :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc` :ref:`slc` :ref:`dlc`
523 scratch_load_ubyte_d16 :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc` :ref:`slc` :ref:`dlc`
524 scratch_load_ubyte_d16_hi :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc` :ref:`slc` :ref:`dlc`
525 scratch_load_ushort :ref:`vdst`, :ref:`vaddr`, :ref:`saddr` :ref:`offset12s` :ref:`glc` :ref:`slc` :ref:`dlc`
526 scratch_store_byte :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc` :ref:`slc` :ref:`dlc`
527 scratch_store_byte_d16_hi :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc` :ref:`slc` :ref:`dlc`
528 scratch_store_dword :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc` :ref:`slc` :ref:`dlc`
529 scratch_store_dwordx2 :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc` :ref:`slc` :ref:`dlc`
530 scratch_store_dwordx3 :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc` :ref:`slc` :ref:`dlc`
531 scratch_store_dwordx4 :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc` :ref:`slc` :ref:`dlc`
532 scratch_store_short :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc` :ref:`slc` :ref:`dlc`
533 scratch_store_short_d16_hi :ref:`vaddr`, :ref:`vdata`, :ref:`saddr` :ref:`offset12s` :ref:`glc` :ref:`slc` :ref:`dlc`
534
535 MIMG
536 -----------------------
537
538 .. parsed-literal::
539
540 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
541 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
542 image_atomic_add :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe`
543 image_atomic_and :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe`
544 image_atomic_cmpswap :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe`
545 image_atomic_dec :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe`
546 image_atomic_inc :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe`
547 image_atomic_or :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe`
548 image_atomic_smax :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe`
549 image_atomic_smin :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe`
550 image_atomic_sub :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe`
551 image_atomic_swap :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe`
552 image_atomic_umax :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe`
553 image_atomic_umin :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe`
554 image_atomic_xor :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe`
555 image_gather4 :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
556 image_gather4_b :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
557 image_gather4_b_cl :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
558 image_gather4_b_cl_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
559 image_gather4_b_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
560 image_gather4_c :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
561 image_gather4_c_b :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
562 image_gather4_c_b_cl :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
563 image_gather4_c_b_cl_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
564 image_gather4_c_b_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
565 image_gather4_c_cl :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
566 image_gather4_c_cl_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
567 image_gather4_c_l :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
568 image_gather4_c_l_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
569 image_gather4_c_lz :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
570 image_gather4_c_lz_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
571 image_gather4_c_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
572 image_gather4_cl :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
573 image_gather4_cl_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
574 image_gather4_l :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
575 image_gather4_l_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
576 image_gather4_lz :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
577 image_gather4_lz_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
578 image_gather4_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
579 image_get_lod :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe`
580 image_get_resinfo :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe`
581 image_load :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
582 image_load_mip :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
583 image_load_mip_pck :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe`
584 image_load_mip_pck_sgn :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe`
585 image_load_pck :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe`
586 image_load_pck_sgn :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe`
587 image_sample :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
588 image_sample_b :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
589 image_sample_b_cl :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
590 image_sample_b_cl_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
591 image_sample_b_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
592 image_sample_c :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
593 image_sample_c_b :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
594 image_sample_c_b_cl :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
595 image_sample_c_b_cl_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
596 image_sample_c_b_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
597 image_sample_c_cd :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
598 image_sample_c_cd_cl :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
599 image_sample_c_cd_cl_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
600 image_sample_c_cd_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
601 image_sample_c_cl :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
602 image_sample_c_cl_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
603 image_sample_c_d :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
604 image_sample_c_d_cl :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
605 image_sample_c_d_cl_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
606 image_sample_c_d_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
607 image_sample_c_l :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
608 image_sample_c_l_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
609 image_sample_c_lz :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
610 image_sample_c_lz_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
611 image_sample_c_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
612 image_sample_cd :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
613 image_sample_cd_cl :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
614 image_sample_cd_cl_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
615 image_sample_cd_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
616 image_sample_cl :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
617 image_sample_cl_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
618 image_sample_d :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
619 image_sample_d_cl :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
620 image_sample_d_cl_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
621 image_sample_d_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
622 image_sample_l :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
623 image_sample_l_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
624 image_sample_lz :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
625 image_sample_lz_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
626 image_sample_o :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`ssamp` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
627 image_store :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
628 image_store_mip :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe` :ref:`d16`
629 image_store_mip_pck :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe`
630 image_store_pck :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc` :ref:`dmask` :ref:`dim` :ref:`unorm` :ref:`dlc` :ref:`glc` :ref:`slc` :ref:`lwe`
631
632 MUBUF
633 -----------------------
634
635 .. parsed-literal::
636
637 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **SRC3** **MODIFIERS**
638 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
639 buffer_atomic_add :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
640 buffer_atomic_add_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
641 buffer_atomic_and :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
642 buffer_atomic_and_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
643 buffer_atomic_cmpswap :ref:`vdata`::ref:`dst`::ref:`b32x2`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
644 buffer_atomic_cmpswap_x2 :ref:`vdata`::ref:`dst`::ref:`b64x2`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
645 buffer_atomic_dec :ref:`vdata`::ref:`dst`::ref:`u32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
646 buffer_atomic_dec_x2 :ref:`vdata`::ref:`dst`::ref:`u64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
647 buffer_atomic_inc :ref:`vdata`::ref:`dst`::ref:`u32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
648 buffer_atomic_inc_x2 :ref:`vdata`::ref:`dst`::ref:`u64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
649 buffer_atomic_or :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
650 buffer_atomic_or_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
651 buffer_atomic_smax :ref:`vdata`::ref:`dst`::ref:`s32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
652 buffer_atomic_smax_x2 :ref:`vdata`::ref:`dst`::ref:`s64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
653 buffer_atomic_smin :ref:`vdata`::ref:`dst`::ref:`s32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
654 buffer_atomic_smin_x2 :ref:`vdata`::ref:`dst`::ref:`s64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
655 buffer_atomic_sub :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
656 buffer_atomic_sub_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
657 buffer_atomic_swap :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
658 buffer_atomic_swap_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
659 buffer_atomic_umax :ref:`vdata`::ref:`dst`::ref:`u32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
660 buffer_atomic_umax_x2 :ref:`vdata`::ref:`dst`::ref:`u64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
661 buffer_atomic_umin :ref:`vdata`::ref:`dst`::ref:`u32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
662 buffer_atomic_umin_x2 :ref:`vdata`::ref:`dst`::ref:`u64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
663 buffer_atomic_xor :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
664 buffer_atomic_xor_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
665 buffer_gl0_inv
666 buffer_gl1_inv
667 buffer_load_dword :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`lds` :ref:`dlc`
668 buffer_load_dwordx2 :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`dlc`
669 buffer_load_dwordx3 :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`dlc`
670 buffer_load_dwordx4 :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`dlc`
671 buffer_load_format_d16_x :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`dlc`
672 buffer_load_format_d16_xy :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`dlc`
673 buffer_load_format_d16_xyz :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`dlc`
674 buffer_load_format_d16_xyzw :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`dlc`
675 buffer_load_format_x :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`lds` :ref:`dlc`
676 buffer_load_format_xy :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`dlc`
677 buffer_load_format_xyz :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`dlc`
678 buffer_load_format_xyzw :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`dlc`
679 buffer_load_sbyte :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`lds` :ref:`dlc`
680 buffer_load_sbyte_d16 :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`dlc`
681 buffer_load_sbyte_d16_hi :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`dlc`
682 buffer_load_short_d16 :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`dlc`
683 buffer_load_short_d16_hi :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`dlc`
684 buffer_load_sshort :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`lds` :ref:`dlc`
685 buffer_load_ubyte :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`lds` :ref:`dlc`
686 buffer_load_ubyte_d16 :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`dlc`
687 buffer_load_ubyte_d16_hi :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`dlc`
688 buffer_load_ushort :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`lds` :ref:`dlc`
689 buffer_store_byte :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
690 buffer_store_byte_d16_hi :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
691 buffer_store_dword :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
692 buffer_store_dwordx2 :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
693 buffer_store_dwordx3 :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
694 buffer_store_dwordx4 :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
695 buffer_store_format_d16_x :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
696 buffer_store_format_d16_xy :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
697 buffer_store_format_d16_xyz :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
698 buffer_store_format_d16_xyzw :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
699 buffer_store_format_x :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
700 buffer_store_format_xy :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
701 buffer_store_format_xyz :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
702 buffer_store_format_xyzw :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
703 buffer_store_short :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
704 buffer_store_short_d16_hi :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
705
706 SDWA
707 -----------------------
708
709 .. parsed-literal::
710
711 **INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS**
712 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
713 v_add_co_ci_u32_sdwa :ref:`vdst`, :ref:`vcc`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`vcc` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
714 v_add_f16_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
715 v_add_f32_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
716 v_add_nc_u32_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
717 v_and_b32_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
718 v_ashrrev_i32_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`::ref:`u32`, :ref:`src1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
719 v_bfrev_b32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
720 v_ceil_f16_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
721 v_ceil_f32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
722 v_cmp_class_f16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`::ref:`b32` :ref:`src0_sel` :ref:`src1_sel`
723 v_cmp_class_f32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`::ref:`b32` :ref:`src0_sel` :ref:`src1_sel`
724 v_cmp_eq_f16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
725 v_cmp_eq_f32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
726 v_cmp_eq_i16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
727 v_cmp_eq_i32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
728 v_cmp_eq_u16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
729 v_cmp_eq_u32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
730 v_cmp_f_f16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
731 v_cmp_f_f32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
732 v_cmp_f_i32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
733 v_cmp_f_u32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
734 v_cmp_ge_f16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
735 v_cmp_ge_f32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
736 v_cmp_ge_i16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
737 v_cmp_ge_i32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
738 v_cmp_ge_u16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
739 v_cmp_ge_u32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
740 v_cmp_gt_f16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
741 v_cmp_gt_f32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
742 v_cmp_gt_i16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
743 v_cmp_gt_i32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
744 v_cmp_gt_u16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
745 v_cmp_gt_u32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
746 v_cmp_le_f16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
747 v_cmp_le_f32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
748 v_cmp_le_i16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
749 v_cmp_le_i32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
750 v_cmp_le_u16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
751 v_cmp_le_u32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
752 v_cmp_lg_f16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
753 v_cmp_lg_f32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
754 v_cmp_lt_f16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
755 v_cmp_lt_f32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
756 v_cmp_lt_i16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
757 v_cmp_lt_i32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
758 v_cmp_lt_u16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
759 v_cmp_lt_u32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
760 v_cmp_ne_i16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
761 v_cmp_ne_i32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
762 v_cmp_ne_u16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
763 v_cmp_ne_u32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
764 v_cmp_neq_f16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
765 v_cmp_neq_f32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
766 v_cmp_nge_f16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
767 v_cmp_nge_f32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
768 v_cmp_ngt_f16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
769 v_cmp_ngt_f32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
770 v_cmp_nle_f16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
771 v_cmp_nle_f32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
772 v_cmp_nlg_f16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
773 v_cmp_nlg_f32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
774 v_cmp_nlt_f16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
775 v_cmp_nlt_f32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
776 v_cmp_o_f16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
777 v_cmp_o_f32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
778 v_cmp_t_i32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
779 v_cmp_t_u32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
780 v_cmp_tru_f16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
781 v_cmp_tru_f32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
782 v_cmp_u_f16_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
783 v_cmp_u_f32_sdwa :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
784 v_cmpx_class_f16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`::ref:`b32` :ref:`src0_sel` :ref:`src1_sel`
785 v_cmpx_class_f32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`::ref:`b32` :ref:`src0_sel` :ref:`src1_sel`
786 v_cmpx_eq_f16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
787 v_cmpx_eq_f32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
788 v_cmpx_eq_i16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
789 v_cmpx_eq_i32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
790 v_cmpx_eq_u16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
791 v_cmpx_eq_u32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
792 v_cmpx_f_f16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
793 v_cmpx_f_f32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
794 v_cmpx_f_i32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
795 v_cmpx_f_u32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
796 v_cmpx_ge_f16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
797 v_cmpx_ge_f32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
798 v_cmpx_ge_i16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
799 v_cmpx_ge_i32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
800 v_cmpx_ge_u16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
801 v_cmpx_ge_u32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
802 v_cmpx_gt_f16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
803 v_cmpx_gt_f32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
804 v_cmpx_gt_i16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
805 v_cmpx_gt_i32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
806 v_cmpx_gt_u16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
807 v_cmpx_gt_u32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
808 v_cmpx_le_f16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
809 v_cmpx_le_f32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
810 v_cmpx_le_i16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
811 v_cmpx_le_i32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
812 v_cmpx_le_u16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
813 v_cmpx_le_u32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
814 v_cmpx_lg_f16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
815 v_cmpx_lg_f32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
816 v_cmpx_lt_f16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
817 v_cmpx_lt_f32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
818 v_cmpx_lt_i16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
819 v_cmpx_lt_i32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
820 v_cmpx_lt_u16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
821 v_cmpx_lt_u32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
822 v_cmpx_ne_i16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
823 v_cmpx_ne_i32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
824 v_cmpx_ne_u16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
825 v_cmpx_ne_u32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
826 v_cmpx_neq_f16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
827 v_cmpx_neq_f32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
828 v_cmpx_nge_f16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
829 v_cmpx_nge_f32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
830 v_cmpx_ngt_f16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
831 v_cmpx_ngt_f32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
832 v_cmpx_nle_f16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
833 v_cmpx_nle_f32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
834 v_cmpx_nlg_f16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
835 v_cmpx_nlg_f32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
836 v_cmpx_nlt_f16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
837 v_cmpx_nlt_f32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
838 v_cmpx_o_f16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
839 v_cmpx_o_f32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
840 v_cmpx_t_i32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
841 v_cmpx_t_u32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
842 v_cmpx_tru_f16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
843 v_cmpx_tru_f32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
844 v_cmpx_u_f16_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
845 v_cmpx_u_f32_sdwa :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`src0_sel` :ref:`src1_sel`
846 v_cos_f16_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
847 v_cos_f32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
848 v_cvt_f16_f32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
849 v_cvt_f16_i16_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
850 v_cvt_f16_u16_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
851 v_cvt_f32_f16_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
852 v_cvt_f32_i32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
853 v_cvt_f32_u32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
854 v_cvt_f32_ubyte0_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
855 v_cvt_f32_ubyte1_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
856 v_cvt_f32_ubyte2_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
857 v_cvt_f32_ubyte3_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
858 v_cvt_flr_i32_f32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
859 v_cvt_i16_f16_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
860 v_cvt_i32_f32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
861 v_cvt_norm_i16_f16_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
862 v_cvt_norm_u16_f16_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
863 v_cvt_off_f32_i4_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
864 v_cvt_rpi_i32_f32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
865 v_cvt_u16_f16_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
866 v_cvt_u32_f32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
867 v_exp_f16_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
868 v_exp_f32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
869 v_ffbh_i32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
870 v_ffbh_u32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
871 v_ffbl_b32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
872 v_floor_f16_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
873 v_floor_f32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
874 v_fract_f16_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
875 v_fract_f32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
876 v_frexp_exp_i16_f16_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
877 v_frexp_exp_i32_f32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
878 v_frexp_mant_f16_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
879 v_frexp_mant_f32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
880 v_ldexp_f16_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`::ref:`i16` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
881 v_log_f16_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
882 v_log_f32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
883 v_lshlrev_b32_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`::ref:`u32`, :ref:`src1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
884 v_lshrrev_b32_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`::ref:`u32`, :ref:`src1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
885 v_max_f16_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
886 v_max_f32_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
887 v_max_i32_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
888 v_max_u32_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
889 v_min_f16_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
890 v_min_f32_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
891 v_min_i32_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
892 v_min_u32_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
893 v_mov_b32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
894 v_mul_f16_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
895 v_mul_f32_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
896 v_mul_hi_i32_i24_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
897 v_mul_hi_u32_u24_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
898 v_mul_i32_i24_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
899 v_mul_legacy_f32_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
900 v_mul_u32_u24_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
901 v_not_b32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
902 v_or_b32_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
903 v_rcp_f16_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
904 v_rcp_f32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
905 v_rcp_iflag_f32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
906 v_rndne_f16_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
907 v_rndne_f32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
908 v_rsq_f16_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
909 v_rsq_f32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
910 v_sat_pk_u8_i16_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
911 v_sin_f16_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
912 v_sin_f32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
913 v_sqrt_f16_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
914 v_sqrt_f32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
915 v_sub_co_ci_u32_sdwa :ref:`vdst`, :ref:`vcc`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`vcc` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
916 v_sub_f16_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
917 v_sub_f32_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
918 v_sub_nc_u32_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
919 v_subrev_co_ci_u32_sdwa :ref:`vdst`, :ref:`vcc`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`vcc` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
920 v_subrev_f16_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
921 v_subrev_f32_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
922 v_subrev_nc_u32_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
923 v_trunc_f16_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
924 v_trunc_f32_sdwa :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel`
925 v_xnor_b32_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
926 v_xor_b32_sdwa :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
927
928 SMEM
929 -----------------------
930
931 .. parsed-literal::
932
933 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
934 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
935 s_atc_probe :ref:`imm3`, :ref:`sbase`, :ref:`soffset`
936 s_atc_probe_buffer :ref:`imm3`, :ref:`sbase`, :ref:`soffset`
937 s_atomic_add :ref:`sdata`::ref:`dst`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
938 s_atomic_add_x2 :ref:`sdata`::ref:`dst`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
939 s_atomic_and :ref:`sdata`::ref:`dst`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
940 s_atomic_and_x2 :ref:`sdata`::ref:`dst`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
941 s_atomic_cmpswap :ref:`sdata`::ref:`dst`::ref:`b32x2`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
942 s_atomic_cmpswap_x2 :ref:`sdata`::ref:`dst`::ref:`b64x2`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
943 s_atomic_dec :ref:`sdata`::ref:`dst`::ref:`u32`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
944 s_atomic_dec_x2 :ref:`sdata`::ref:`dst`::ref:`u64`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
945 s_atomic_inc :ref:`sdata`::ref:`dst`::ref:`u32`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
946 s_atomic_inc_x2 :ref:`sdata`::ref:`dst`::ref:`u64`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
947 s_atomic_or :ref:`sdata`::ref:`dst`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
948 s_atomic_or_x2 :ref:`sdata`::ref:`dst`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
949 s_atomic_smax :ref:`sdata`::ref:`dst`::ref:`s32`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
950 s_atomic_smax_x2 :ref:`sdata`::ref:`dst`::ref:`s64`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
951 s_atomic_smin :ref:`sdata`::ref:`dst`::ref:`s32`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
952 s_atomic_smin_x2 :ref:`sdata`::ref:`dst`::ref:`s64`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
953 s_atomic_sub :ref:`sdata`::ref:`dst`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
954 s_atomic_sub_x2 :ref:`sdata`::ref:`dst`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
955 s_atomic_swap :ref:`sdata`::ref:`dst`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
956 s_atomic_swap_x2 :ref:`sdata`::ref:`dst`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
957 s_atomic_umax :ref:`sdata`::ref:`dst`::ref:`u32`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
958 s_atomic_umax_x2 :ref:`sdata`::ref:`dst`::ref:`u64`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
959 s_atomic_umin :ref:`sdata`::ref:`dst`::ref:`u32`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
960 s_atomic_umin_x2 :ref:`sdata`::ref:`dst`::ref:`u64`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
961 s_atomic_xor :ref:`sdata`::ref:`dst`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
962 s_atomic_xor_x2 :ref:`sdata`::ref:`dst`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
963 s_buffer_atomic_add :ref:`sdata`::ref:`dst`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
964 s_buffer_atomic_add_x2 :ref:`sdata`::ref:`dst`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
965 s_buffer_atomic_and :ref:`sdata`::ref:`dst`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
966 s_buffer_atomic_and_x2 :ref:`sdata`::ref:`dst`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
967 s_buffer_atomic_cmpswap :ref:`sdata`::ref:`dst`::ref:`b32x2`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
968 s_buffer_atomic_cmpswap_x2 :ref:`sdata`::ref:`dst`::ref:`b64x2`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
969 s_buffer_atomic_dec :ref:`sdata`::ref:`dst`::ref:`u32`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
970 s_buffer_atomic_dec_x2 :ref:`sdata`::ref:`dst`::ref:`u64`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
971 s_buffer_atomic_inc :ref:`sdata`::ref:`dst`::ref:`u32`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
972 s_buffer_atomic_inc_x2 :ref:`sdata`::ref:`dst`::ref:`u64`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
973 s_buffer_atomic_or :ref:`sdata`::ref:`dst`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
974 s_buffer_atomic_or_x2 :ref:`sdata`::ref:`dst`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
975 s_buffer_atomic_smax :ref:`sdata`::ref:`dst`::ref:`s32`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
976 s_buffer_atomic_smax_x2 :ref:`sdata`::ref:`dst`::ref:`s64`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
977 s_buffer_atomic_smin :ref:`sdata`::ref:`dst`::ref:`s32`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
978 s_buffer_atomic_smin_x2 :ref:`sdata`::ref:`dst`::ref:`s64`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
979 s_buffer_atomic_sub :ref:`sdata`::ref:`dst`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
980 s_buffer_atomic_sub_x2 :ref:`sdata`::ref:`dst`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
981 s_buffer_atomic_swap :ref:`sdata`::ref:`dst`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
982 s_buffer_atomic_swap_x2 :ref:`sdata`::ref:`dst`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
983 s_buffer_atomic_umax :ref:`sdata`::ref:`dst`::ref:`u32`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
984 s_buffer_atomic_umax_x2 :ref:`sdata`::ref:`dst`::ref:`u64`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
985 s_buffer_atomic_umin :ref:`sdata`::ref:`dst`::ref:`u32`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
986 s_buffer_atomic_umin_x2 :ref:`sdata`::ref:`dst`::ref:`u64`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
987 s_buffer_atomic_xor :ref:`sdata`::ref:`dst`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
988 s_buffer_atomic_xor_x2 :ref:`sdata`::ref:`dst`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
989 s_buffer_load_dword :ref:`sdst`, :ref:`sbase`, :ref:`soffset` :ref:`glc` :ref:`dlc`
990 s_buffer_load_dwordx16 :ref:`sdst`, :ref:`sbase`, :ref:`soffset` :ref:`glc` :ref:`dlc`
991 s_buffer_load_dwordx2 :ref:`sdst`, :ref:`sbase`, :ref:`soffset` :ref:`glc` :ref:`dlc`
992 s_buffer_load_dwordx4 :ref:`sdst`, :ref:`sbase`, :ref:`soffset` :ref:`glc` :ref:`dlc`
993 s_buffer_load_dwordx8 :ref:`sdst`, :ref:`sbase`, :ref:`soffset` :ref:`glc` :ref:`dlc`
994 s_buffer_store_dword :ref:`sdata`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
995 s_buffer_store_dwordx2 :ref:`sdata`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
996 s_buffer_store_dwordx4 :ref:`sdata`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
997 s_dcache_discard :ref:`sbase`, :ref:`soffset`
998 s_dcache_discard_x2 :ref:`sbase`, :ref:`soffset`
999 s_dcache_inv
1000 s_dcache_wb
1001 s_get_waveid_in_workgroup :ref:`sdst`
1002 s_gl1_inv
1003 s_load_dword :ref:`sdst`, :ref:`sbase`, :ref:`soffset` :ref:`glc` :ref:`dlc`
1004 s_load_dwordx16 :ref:`sdst`, :ref:`sbase`, :ref:`soffset` :ref:`glc` :ref:`dlc`
1005 s_load_dwordx2 :ref:`sdst`, :ref:`sbase`, :ref:`soffset` :ref:`glc` :ref:`dlc`
1006 s_load_dwordx4 :ref:`sdst`, :ref:`sbase`, :ref:`soffset` :ref:`glc` :ref:`dlc`
1007 s_load_dwordx8 :ref:`sdst`, :ref:`sbase`, :ref:`soffset` :ref:`glc` :ref:`dlc`
1008 s_memrealtime :ref:`sdst`
1009 s_memtime :ref:`sdst`
1010 s_scratch_load_dword :ref:`sdst`, :ref:`sbase`, :ref:`soffset` :ref:`glc` :ref:`dlc`
1011 s_scratch_load_dwordx2 :ref:`sdst`, :ref:`sbase`, :ref:`soffset` :ref:`glc` :ref:`dlc`
1012 s_scratch_load_dwordx4 :ref:`sdst`, :ref:`sbase`, :ref:`soffset` :ref:`glc` :ref:`dlc`
1013 s_scratch_store_dword :ref:`sdata`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
1014 s_scratch_store_dwordx2 :ref:`sdata`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
1015 s_scratch_store_dwordx4 :ref:`sdata`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
1016 s_store_dword :ref:`sdata`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
1017 s_store_dwordx2 :ref:`sdata`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
1018 s_store_dwordx4 :ref:`sdata`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
1019
1020 SOP1
1021 -----------------------
1022
1023 .. parsed-literal::
1024
1025 **INSTRUCTION** **DST** **SRC**
1026 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
1027 s_abs_i32 :ref:`sdst`, :ref:`ssrc`
1028 s_and_saveexec_b32 :ref:`sdst`, :ref:`ssrc`
1029 s_and_saveexec_b64 :ref:`sdst`, :ref:`ssrc`
1030 s_andn1_saveexec_b32 :ref:`sdst`, :ref:`ssrc`
1031 s_andn1_saveexec_b64 :ref:`sdst`, :ref:`ssrc`
1032 s_andn1_wrexec_b32 :ref:`sdst`, :ref:`ssrc`
1033 s_andn1_wrexec_b64 :ref:`sdst`, :ref:`ssrc`
1034 s_andn2_saveexec_b32 :ref:`sdst`, :ref:`ssrc`
1035 s_andn2_saveexec_b64 :ref:`sdst`, :ref:`ssrc`
1036 s_andn2_wrexec_b32 :ref:`sdst`, :ref:`ssrc`
1037 s_andn2_wrexec_b64 :ref:`sdst`, :ref:`ssrc`
1038 s_bcnt0_i32_b32 :ref:`sdst`, :ref:`ssrc`
1039 s_bcnt0_i32_b64 :ref:`sdst`, :ref:`ssrc`
1040 s_bcnt1_i32_b32 :ref:`sdst`, :ref:`ssrc`
1041 s_bcnt1_i32_b64 :ref:`sdst`, :ref:`ssrc`
1042 s_bitreplicate_b64_b32 :ref:`sdst`, :ref:`ssrc`
1043 s_bitset0_b32 :ref:`sdst`, :ref:`ssrc`
1044 s_bitset0_b64 :ref:`sdst`, :ref:`ssrc`::ref:`b32`
1045 s_bitset1_b32 :ref:`sdst`, :ref:`ssrc`
1046 s_bitset1_b64 :ref:`sdst`, :ref:`ssrc`::ref:`b32`
1047 s_brev_b32 :ref:`sdst`, :ref:`ssrc`
1048 s_brev_b64 :ref:`sdst`, :ref:`ssrc`
1049 s_cmov_b32 :ref:`sdst`, :ref:`ssrc`
1050 s_cmov_b64 :ref:`sdst`, :ref:`ssrc`
1051 s_ff0_i32_b32 :ref:`sdst`, :ref:`ssrc`
1052 s_ff0_i32_b64 :ref:`sdst`, :ref:`ssrc`
1053 s_ff1_i32_b32 :ref:`sdst`, :ref:`ssrc`
1054 s_ff1_i32_b64 :ref:`sdst`, :ref:`ssrc`
1055 s_flbit_i32 :ref:`sdst`, :ref:`ssrc`
1056 s_flbit_i32_b32 :ref:`sdst`, :ref:`ssrc`
1057 s_flbit_i32_b64 :ref:`sdst`, :ref:`ssrc`
1058 s_flbit_i32_i64 :ref:`sdst`, :ref:`ssrc`
1059 s_getpc_b64 :ref:`sdst`
1060 s_mov_b32 :ref:`sdst`, :ref:`ssrc`
1061 s_mov_b64 :ref:`sdst`, :ref:`ssrc`
1062 s_movreld_b32 :ref:`sdst`, :ref:`ssrc`
1063 s_movreld_b64 :ref:`sdst`, :ref:`ssrc`
1064 s_movrels_b32 :ref:`sdst`, :ref:`ssrc`
1065 s_movrels_b64 :ref:`sdst`, :ref:`ssrc`
1066 s_movrelsd_2_b32 :ref:`sdst`, :ref:`ssrc`
1067 s_nand_saveexec_b32 :ref:`sdst`, :ref:`ssrc`
1068 s_nand_saveexec_b64 :ref:`sdst`, :ref:`ssrc`
1069 s_nor_saveexec_b32 :ref:`sdst`, :ref:`ssrc`
1070 s_nor_saveexec_b64 :ref:`sdst`, :ref:`ssrc`
1071 s_not_b32 :ref:`sdst`, :ref:`ssrc`
1072 s_not_b64 :ref:`sdst`, :ref:`ssrc`
1073 s_or_saveexec_b32 :ref:`sdst`, :ref:`ssrc`
1074 s_or_saveexec_b64 :ref:`sdst`, :ref:`ssrc`
1075 s_orn1_saveexec_b32 :ref:`sdst`, :ref:`ssrc`
1076 s_orn1_saveexec_b64 :ref:`sdst`, :ref:`ssrc`
1077 s_orn2_saveexec_b32 :ref:`sdst`, :ref:`ssrc`
1078 s_orn2_saveexec_b64 :ref:`sdst`, :ref:`ssrc`
1079 s_quadmask_b32 :ref:`sdst`, :ref:`ssrc`
1080 s_quadmask_b64 :ref:`sdst`, :ref:`ssrc`
1081 s_rfe_b64 :ref:`ssrc`
1082 s_setpc_b64 :ref:`ssrc`
1083 s_sext_i32_i16 :ref:`sdst`, :ref:`ssrc`
1084 s_sext_i32_i8 :ref:`sdst`, :ref:`ssrc`
1085 s_swappc_b64 :ref:`sdst`, :ref:`ssrc`
1086 s_wqm_b32 :ref:`sdst`, :ref:`ssrc`
1087 s_wqm_b64 :ref:`sdst`, :ref:`ssrc`
1088 s_xnor_saveexec_b32 :ref:`sdst`, :ref:`ssrc`
1089 s_xnor_saveexec_b64 :ref:`sdst`, :ref:`ssrc`
1090 s_xor_saveexec_b32 :ref:`sdst`, :ref:`ssrc`
1091 s_xor_saveexec_b64 :ref:`sdst`, :ref:`ssrc`
1092
1093 SOP2
1094 -----------------------
1095
1096 .. parsed-literal::
1097
1098 **INSTRUCTION** **DST** **SRC0** **SRC1**
1099 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
1100 s_absdiff_i32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1101 s_add_i32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1102 s_add_u32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1103 s_addc_u32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1104 s_and_b32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1105 s_and_b64 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1106 s_andn2_b32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1107 s_andn2_b64 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1108 s_ashr_i32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`::ref:`u32`
1109 s_ashr_i64 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`::ref:`u32`
1110 s_bfe_i32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`::ref:`u32`
1111 s_bfe_i64 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`::ref:`u32`
1112 s_bfe_u32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1113 s_bfe_u64 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`::ref:`u32`
1114 s_bfm_b32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1115 s_bfm_b64 :ref:`sdst`, :ref:`ssrc0`::ref:`b32`, :ref:`ssrc1`::ref:`b32`
1116 s_cselect_b32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1117 s_cselect_b64 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1118 s_lshl1_add_u32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1119 s_lshl2_add_u32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1120 s_lshl3_add_u32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1121 s_lshl4_add_u32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1122 s_lshl_b32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`::ref:`u32`
1123 s_lshl_b64 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`::ref:`u32`
1124 s_lshr_b32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`::ref:`u32`
1125 s_lshr_b64 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`::ref:`u32`
1126 s_max_i32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1127 s_max_u32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1128 s_min_i32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1129 s_min_u32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1130 s_mul_hi_i32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1131 s_mul_hi_u32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1132 s_mul_i32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1133 s_nand_b32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1134 s_nand_b64 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1135 s_nor_b32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1136 s_nor_b64 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1137 s_or_b32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1138 s_or_b64 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1139 s_orn2_b32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1140 s_orn2_b64 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1141 s_pack_hh_b32_b16 :ref:`sdst`, :ref:`ssrc0`::ref:`b16x2`, :ref:`ssrc1`::ref:`b16x2`
1142 s_pack_lh_b32_b16 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`::ref:`b16x2`
1143 s_pack_ll_b32_b16 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1144 s_sub_i32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1145 s_sub_u32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1146 s_subb_u32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1147 s_xnor_b32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1148 s_xnor_b64 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1149 s_xor_b32 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1150 s_xor_b64 :ref:`sdst`, :ref:`ssrc0`, :ref:`ssrc1`
1151
1152 SOPC
1153 -----------------------
1154
1155 .. parsed-literal::
1156
1157 **INSTRUCTION** **SRC0** **SRC1**
1158 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
1159 s_bitcmp0_b32 :ref:`ssrc0`, :ref:`ssrc1`
1160 s_bitcmp0_b64 :ref:`ssrc0`, :ref:`ssrc1`::ref:`u32`
1161 s_bitcmp1_b32 :ref:`ssrc0`, :ref:`ssrc1`
1162 s_bitcmp1_b64 :ref:`ssrc0`, :ref:`ssrc1`::ref:`u32`
1163 s_cmp_eq_i32 :ref:`ssrc0`, :ref:`ssrc1`
1164 s_cmp_eq_u32 :ref:`ssrc0`, :ref:`ssrc1`
1165 s_cmp_eq_u64 :ref:`ssrc0`, :ref:`ssrc1`
1166 s_cmp_ge_i32 :ref:`ssrc0`, :ref:`ssrc1`
1167 s_cmp_ge_u32 :ref:`ssrc0`, :ref:`ssrc1`
1168 s_cmp_gt_i32 :ref:`ssrc0`, :ref:`ssrc1`
1169 s_cmp_gt_u32 :ref:`ssrc0`, :ref:`ssrc1`
1170 s_cmp_le_i32 :ref:`ssrc0`, :ref:`ssrc1`
1171 s_cmp_le_u32 :ref:`ssrc0`, :ref:`ssrc1`
1172 s_cmp_lg_i32 :ref:`ssrc0`, :ref:`ssrc1`
1173 s_cmp_lg_u32 :ref:`ssrc0`, :ref:`ssrc1`
1174 s_cmp_lg_u64 :ref:`ssrc0`, :ref:`ssrc1`
1175 s_cmp_lt_i32 :ref:`ssrc0`, :ref:`ssrc1`
1176 s_cmp_lt_u32 :ref:`ssrc0`, :ref:`ssrc1`
1177
1178 SOPK
1179 -----------------------
1180
1181 .. parsed-literal::
1182
1183 **INSTRUCTION** **DST** **SRC0** **SRC1**
1184 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
1185 s_addk_i32 :ref:`sdst`, :ref:`imm16`
1186 s_call_b64 :ref:`sdst`, :ref:`label`
1187 s_cmovk_i32 :ref:`sdst`, :ref:`imm16`
1188 s_cmpk_eq_i32 :ref:`ssrc`, :ref:`imm16`
1189 s_cmpk_eq_u32 :ref:`ssrc`, :ref:`imm16`
1190 s_cmpk_ge_i32 :ref:`ssrc`, :ref:`imm16`
1191 s_cmpk_ge_u32 :ref:`ssrc`, :ref:`imm16`
1192 s_cmpk_gt_i32 :ref:`ssrc`, :ref:`imm16`
1193 s_cmpk_gt_u32 :ref:`ssrc`, :ref:`imm16`
1194 s_cmpk_le_i32 :ref:`ssrc`, :ref:`imm16`
1195 s_cmpk_le_u32 :ref:`ssrc`, :ref:`imm16`
1196 s_cmpk_lg_i32 :ref:`ssrc`, :ref:`imm16`
1197 s_cmpk_lg_u32 :ref:`ssrc`, :ref:`imm16`
1198 s_cmpk_lt_i32 :ref:`ssrc`, :ref:`imm16`
1199 s_cmpk_lt_u32 :ref:`ssrc`, :ref:`imm16`
1200 s_getreg_b32 :ref:`sdst`, :ref:`hwreg`
1201 s_movk_i32 :ref:`sdst`, :ref:`imm16`
1202 s_mulk_i32 :ref:`sdst`, :ref:`imm16`
1203 s_setreg_b32 :ref:`hwreg`, :ref:`ssrc`
1204 s_setreg_imm32_b32 :ref:`hwreg`, :ref:`imm32`
1205 s_subvector_loop_begin :ref:`sdst`, :ref:`label`
1206 s_subvector_loop_end :ref:`sdst`, :ref:`label`
1207 s_version :ref:`imm16`
1208 s_waitcnt_expcnt :ref:`ssrc`, :ref:`imm16`
1209 s_waitcnt_lgkmcnt :ref:`ssrc`, :ref:`imm16`
1210 s_waitcnt_vmcnt :ref:`ssrc`, :ref:`imm16`
1211 s_waitcnt_vscnt :ref:`ssrc`, :ref:`imm16`
1212
1213 SOPP
1214 -----------------------
1215
1216 .. parsed-literal::
1217
1218 **INSTRUCTION** **SRC**
1219 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
1220 s_barrier
1221 s_branch :ref:`label`
1222 s_cbranch_cdbgsys :ref:`label`
1223 s_cbranch_cdbgsys_and_user :ref:`label`
1224 s_cbranch_cdbgsys_or_user :ref:`label`
1225 s_cbranch_cdbguser :ref:`label`
1226 s_cbranch_execnz :ref:`label`
1227 s_cbranch_execz :ref:`label`
1228 s_cbranch_scc0 :ref:`label`
1229 s_cbranch_scc1 :ref:`label`
1230 s_cbranch_vccnz :ref:`label`
1231 s_cbranch_vccz :ref:`label`
1232 s_clause :ref:`imm16`
1233 s_code_end
1234 s_decperflevel :ref:`imm16`
1235 s_denorm_mode :ref:`imm16`
1236 s_endpgm
1237 s_endpgm_ordered_ps_done
1238 s_endpgm_saved
1239 s_icache_inv
1240 s_incperflevel :ref:`imm16`
1241 s_inst_prefetch :ref:`imm16`
1242 s_nop :ref:`imm16`
1243 s_round_mode :ref:`imm16`
1244 s_sendmsg :ref:`msg`
1245 s_sendmsghalt :ref:`msg`
1246 s_sethalt :ref:`imm16`
1247 s_setkill :ref:`imm16`
1248 s_setprio :ref:`imm16`
1249 s_sleep :ref:`imm16`
1250 s_trap :ref:`imm16`
1251 s_ttracedata
1252 s_ttracedata_imm :ref:`imm16`
1253 s_waitcnt :ref:`waitcnt`
1254 s_wakeup
1255
1256 VINTRP
1257 -----------------------
1258
1259 .. parsed-literal::
1260
1261 **INSTRUCTION** **DST** **SRC0** **SRC1**
1262 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
1263 v_interp_mov_f32 :ref:`vdst`, :ref:`param`::ref:`b32`, :ref:`attr`::ref:`b32`
1264 v_interp_p1_f32 :ref:`vdst`, :ref:`vsrc`, :ref:`attr`::ref:`b32`
1265 v_interp_p2_f32 :ref:`vdst`, :ref:`vsrc`, :ref:`attr`::ref:`b32`
1266
1267 VOP1
1268 -----------------------
1269
1270 .. parsed-literal::
1271
1272 **INSTRUCTION** **DST** **SRC**
1273 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
1274 v_bfrev_b32 :ref:`vdst`, :ref:`src`
1275 v_ceil_f16 :ref:`vdst`, :ref:`src`
1276 v_ceil_f32 :ref:`vdst`, :ref:`src`
1277 v_ceil_f64 :ref:`vdst`, :ref:`src`
1278 v_clrexcp
1279 v_cos_f16 :ref:`vdst`, :ref:`src`
1280 v_cos_f32 :ref:`vdst`, :ref:`src`
1281 v_cvt_f16_f32 :ref:`vdst`, :ref:`src`
1282 v_cvt_f16_i16 :ref:`vdst`, :ref:`src`
1283 v_cvt_f16_u16 :ref:`vdst`, :ref:`src`
1284 v_cvt_f32_f16 :ref:`vdst`, :ref:`src`
1285 v_cvt_f32_f64 :ref:`vdst`, :ref:`src`
1286 v_cvt_f32_i32 :ref:`vdst`, :ref:`src`
1287 v_cvt_f32_u32 :ref:`vdst`, :ref:`src`
1288 v_cvt_f32_ubyte0 :ref:`vdst`, :ref:`src`
1289 v_cvt_f32_ubyte1 :ref:`vdst`, :ref:`src`
1290 v_cvt_f32_ubyte2 :ref:`vdst`, :ref:`src`
1291 v_cvt_f32_ubyte3 :ref:`vdst`, :ref:`src`
1292 v_cvt_f64_f32 :ref:`vdst`, :ref:`src`
1293 v_cvt_f64_i32 :ref:`vdst`, :ref:`src`
1294 v_cvt_f64_u32 :ref:`vdst`, :ref:`src`
1295 v_cvt_flr_i32_f32 :ref:`vdst`, :ref:`src`
1296 v_cvt_i16_f16 :ref:`vdst`, :ref:`src`
1297 v_cvt_i32_f32 :ref:`vdst`, :ref:`src`
1298 v_cvt_i32_f64 :ref:`vdst`, :ref:`src`
1299 v_cvt_norm_i16_f16 :ref:`vdst`, :ref:`src`
1300 v_cvt_norm_u16_f16 :ref:`vdst`, :ref:`src`
1301 v_cvt_off_f32_i4 :ref:`vdst`, :ref:`src`
1302 v_cvt_rpi_i32_f32 :ref:`vdst`, :ref:`src`
1303 v_cvt_u16_f16 :ref:`vdst`, :ref:`src`
1304 v_cvt_u32_f32 :ref:`vdst`, :ref:`src`
1305 v_cvt_u32_f64 :ref:`vdst`, :ref:`src`
1306 v_exp_f16 :ref:`vdst`, :ref:`src`
1307 v_exp_f32 :ref:`vdst`, :ref:`src`
1308 v_ffbh_i32 :ref:`vdst`, :ref:`src`
1309 v_ffbh_u32 :ref:`vdst`, :ref:`src`
1310 v_ffbl_b32 :ref:`vdst`, :ref:`src`
1311 v_floor_f16 :ref:`vdst`, :ref:`src`
1312 v_floor_f32 :ref:`vdst`, :ref:`src`
1313 v_floor_f64 :ref:`vdst`, :ref:`src`
1314 v_fract_f16 :ref:`vdst`, :ref:`src`
1315 v_fract_f32 :ref:`vdst`, :ref:`src`
1316 v_fract_f64 :ref:`vdst`, :ref:`src`
1317 v_frexp_exp_i16_f16 :ref:`vdst`, :ref:`src`
1318 v_frexp_exp_i32_f32 :ref:`vdst`, :ref:`src`
1319 v_frexp_exp_i32_f64 :ref:`vdst`, :ref:`src`
1320 v_frexp_mant_f16 :ref:`vdst`, :ref:`src`
1321 v_frexp_mant_f32 :ref:`vdst`, :ref:`src`
1322 v_frexp_mant_f64 :ref:`vdst`, :ref:`src`
1323 v_log_f16 :ref:`vdst`, :ref:`src`
1324 v_log_f32 :ref:`vdst`, :ref:`src`
1325 v_mov_b32 :ref:`vdst`, :ref:`src`
1326 v_movreld_b32 :ref:`vdst`, :ref:`src`
1327 v_movrels_b32 :ref:`vdst`, :ref:`vsrc`
1328 v_movrelsd_2_b32 :ref:`vdst`, :ref:`vsrc`
1329 v_movrelsd_b32 :ref:`vdst`, :ref:`vsrc`
1330 v_nop
1331 v_not_b32 :ref:`vdst`, :ref:`src`
1332 v_pipeflush
1333 v_rcp_f16 :ref:`vdst`, :ref:`src`
1334 v_rcp_f32 :ref:`vdst`, :ref:`src`
1335 v_rcp_f64 :ref:`vdst`, :ref:`src`
1336 v_rcp_iflag_f32 :ref:`vdst`, :ref:`src`
1337 v_readfirstlane_b32 :ref:`sdst`, :ref:`vsrc`
1338 v_rndne_f16 :ref:`vdst`, :ref:`src`
1339 v_rndne_f32 :ref:`vdst`, :ref:`src`
1340 v_rndne_f64 :ref:`vdst`, :ref:`src`
1341 v_rsq_f16 :ref:`vdst`, :ref:`src`
1342 v_rsq_f32 :ref:`vdst`, :ref:`src`
1343 v_rsq_f64 :ref:`vdst`, :ref:`src`
1344 v_sat_pk_u8_i16 :ref:`vdst`, :ref:`src`
1345 v_sin_f16 :ref:`vdst`, :ref:`src`
1346 v_sin_f32 :ref:`vdst`, :ref:`src`
1347 v_sqrt_f16 :ref:`vdst`, :ref:`src`
1348 v_sqrt_f32 :ref:`vdst`, :ref:`src`
1349 v_sqrt_f64 :ref:`vdst`, :ref:`src`
1350 v_swap_b32 :ref:`vdst`, :ref:`vsrc`
1351 v_swaprel_b32 :ref:`vdst`, :ref:`vsrc`
1352 v_trunc_f16 :ref:`vdst`, :ref:`src`
1353 v_trunc_f32 :ref:`vdst`, :ref:`src`
1354 v_trunc_f64 :ref:`vdst`, :ref:`src`
1355
1356 VOP2
1357 -----------------------
1358
1359 .. parsed-literal::
1360
1361 **INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2**
1362 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
1363 v_add_co_ci_u32 :ref:`vdst`, :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`, :ref:`vcc`
1364 v_add_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1365 v_add_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1366 v_add_nc_u32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1367 v_and_b32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1368 v_ashrrev_i32 :ref:`vdst`, :ref:`src0`::ref:`u32`, :ref:`vsrc1`
1369 v_cndmask_b32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`, :ref:`vcc`
1370 v_cvt_pkrtz_f16_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1371 v_fmaak_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`, :ref:`imm32`
1372 v_fmaak_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`, :ref:`imm32`
1373 v_fmac_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1374 v_fmac_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1375 v_fmamk_f16 :ref:`vdst`, :ref:`src0`, :ref:`imm32`, :ref:`vsrc2`
1376 v_fmamk_f32 :ref:`vdst`, :ref:`src0`, :ref:`imm32`, :ref:`vsrc2`
1377 v_ldexp_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`::ref:`i16`
1378 v_lshlrev_b32 :ref:`vdst`, :ref:`src0`::ref:`u32`, :ref:`vsrc1`
1379 v_lshrrev_b32 :ref:`vdst`, :ref:`src0`::ref:`u32`, :ref:`vsrc1`
1380 v_mac_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1381 v_mac_legacy_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1382 v_madak_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`, :ref:`imm32`
1383 v_madmk_f32 :ref:`vdst`, :ref:`src0`, :ref:`imm32`, :ref:`vsrc2`
1384 v_max_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1385 v_max_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1386 v_max_i32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1387 v_max_u32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1388 v_min_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1389 v_min_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1390 v_min_i32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1391 v_min_u32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1392 v_mul_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1393 v_mul_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1394 v_mul_hi_i32_i24 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1395 v_mul_hi_u32_u24 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1396 v_mul_i32_i24 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1397 v_mul_legacy_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1398 v_mul_u32_u24 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1399 v_or_b32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1400 v_pk_fmac_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1401 v_sub_co_ci_u32 :ref:`vdst`, :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`, :ref:`vcc`
1402 v_sub_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1403 v_sub_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1404 v_sub_nc_u32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1405 v_subrev_co_ci_u32 :ref:`vdst`, :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`, :ref:`vcc`
1406 v_subrev_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1407 v_subrev_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1408 v_subrev_nc_u32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1409 v_xnor_b32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1410 v_xor_b32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
1411
1412 VOP3
1413 -----------------------
1414
1415 .. parsed-literal::
1416
1417 **INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS**
1418 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
1419 v_add3_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1420 v_add_co_ci_u32_e64 :ref:`vdst`, :ref:`sdst`, :ref:`src0`, :ref:`src1`, :ref:`ssrc2` :ref:`clamp`
1421 v_add_co_u32 :ref:`vdst`, :ref:`sdst`, :ref:`src0`, :ref:`src1` :ref:`clamp`
1422 v_add_f16_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1423 v_add_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1424 v_add_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1425 v_add_lshl_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1426 v_add_nc_i16 :ref:`vdst`, :ref:`src0`, :ref:`src1` :ref:`op_sel` :ref:`clamp`
1427 v_add_nc_i32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1428 v_add_nc_u16 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1429 v_add_nc_u32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1` :ref:`clamp`
1430 v_alignbit_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1431 v_alignbyte_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1432 v_and_b32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1433 v_and_or_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1434 v_ashrrev_i16 :ref:`vdst`, :ref:`src0`::ref:`u16`, :ref:`src1`
1435 v_ashrrev_i32_e64 :ref:`vdst`, :ref:`src0`::ref:`u32`, :ref:`src1`
1436 v_ashrrev_i64 :ref:`vdst`, :ref:`src0`::ref:`u32`, :ref:`src1`
1437 v_bcnt_u32_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1438 v_bfe_i32 :ref:`vdst`, :ref:`src0`, :ref:`src1`::ref:`u32`, :ref:`src2`::ref:`u32`
1439 v_bfe_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1440 v_bfi_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1441 v_bfm_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1442 v_bfrev_b32_e64 :ref:`vdst`, :ref:`src`
1443 v_ceil_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1444 v_ceil_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1445 v_ceil_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1446 v_clrexcp_e64
1447 v_cmp_class_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`b32`
1448 v_cmp_class_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`b32`
1449 v_cmp_class_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`b32`
1450 v_cmp_eq_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1451 v_cmp_eq_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1452 v_cmp_eq_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1453 v_cmp_eq_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1454 v_cmp_eq_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1455 v_cmp_eq_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1456 v_cmp_eq_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1457 v_cmp_eq_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1458 v_cmp_eq_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1459 v_cmp_f_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1460 v_cmp_f_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1461 v_cmp_f_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1462 v_cmp_f_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1463 v_cmp_f_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1464 v_cmp_f_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1465 v_cmp_f_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1466 v_cmp_ge_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1467 v_cmp_ge_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1468 v_cmp_ge_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1469 v_cmp_ge_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1470 v_cmp_ge_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1471 v_cmp_ge_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1472 v_cmp_ge_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1473 v_cmp_ge_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1474 v_cmp_ge_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1475 v_cmp_gt_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1476 v_cmp_gt_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1477 v_cmp_gt_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1478 v_cmp_gt_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1479 v_cmp_gt_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1480 v_cmp_gt_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1481 v_cmp_gt_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1482 v_cmp_gt_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1483 v_cmp_gt_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1484 v_cmp_le_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1485 v_cmp_le_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1486 v_cmp_le_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1487 v_cmp_le_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1488 v_cmp_le_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1489 v_cmp_le_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1490 v_cmp_le_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1491 v_cmp_le_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1492 v_cmp_le_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1493 v_cmp_lg_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1494 v_cmp_lg_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1495 v_cmp_lg_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1496 v_cmp_lt_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1497 v_cmp_lt_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1498 v_cmp_lt_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1499 v_cmp_lt_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1500 v_cmp_lt_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1501 v_cmp_lt_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1502 v_cmp_lt_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1503 v_cmp_lt_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1504 v_cmp_lt_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1505 v_cmp_ne_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1506 v_cmp_ne_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1507 v_cmp_ne_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1508 v_cmp_ne_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1509 v_cmp_ne_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1510 v_cmp_ne_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1511 v_cmp_neq_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1512 v_cmp_neq_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1513 v_cmp_neq_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1514 v_cmp_nge_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1515 v_cmp_nge_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1516 v_cmp_nge_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1517 v_cmp_ngt_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1518 v_cmp_ngt_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1519 v_cmp_ngt_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1520 v_cmp_nle_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1521 v_cmp_nle_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1522 v_cmp_nle_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1523 v_cmp_nlg_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1524 v_cmp_nlg_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1525 v_cmp_nlg_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1526 v_cmp_nlt_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1527 v_cmp_nlt_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1528 v_cmp_nlt_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1529 v_cmp_o_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1530 v_cmp_o_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1531 v_cmp_o_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1532 v_cmp_t_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1533 v_cmp_t_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1534 v_cmp_t_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1535 v_cmp_t_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1536 v_cmp_tru_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1537 v_cmp_tru_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1538 v_cmp_tru_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1539 v_cmp_u_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1540 v_cmp_u_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1541 v_cmp_u_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1542 v_cmpx_class_f16_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`b32`
1543 v_cmpx_class_f32_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`b32`
1544 v_cmpx_class_f64_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`b32`
1545 v_cmpx_eq_f16_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1546 v_cmpx_eq_f32_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1547 v_cmpx_eq_f64_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1548 v_cmpx_eq_i16_e64 :ref:`src0`, :ref:`src1`
1549 v_cmpx_eq_i32_e64 :ref:`src0`, :ref:`src1`
1550 v_cmpx_eq_i64_e64 :ref:`src0`, :ref:`src1`
1551 v_cmpx_eq_u16_e64 :ref:`src0`, :ref:`src1`
1552 v_cmpx_eq_u32_e64 :ref:`src0`, :ref:`src1`
1553 v_cmpx_eq_u64_e64 :ref:`src0`, :ref:`src1`
1554 v_cmpx_f_f16_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1555 v_cmpx_f_f32_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1556 v_cmpx_f_f64_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1557 v_cmpx_f_i32_e64 :ref:`src0`, :ref:`src1`
1558 v_cmpx_f_i64_e64 :ref:`src0`, :ref:`src1`
1559 v_cmpx_f_u32_e64 :ref:`src0`, :ref:`src1`
1560 v_cmpx_f_u64_e64 :ref:`src0`, :ref:`src1`
1561 v_cmpx_ge_f16_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1562 v_cmpx_ge_f32_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1563 v_cmpx_ge_f64_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1564 v_cmpx_ge_i16_e64 :ref:`src0`, :ref:`src1`
1565 v_cmpx_ge_i32_e64 :ref:`src0`, :ref:`src1`
1566 v_cmpx_ge_i64_e64 :ref:`src0`, :ref:`src1`
1567 v_cmpx_ge_u16_e64 :ref:`src0`, :ref:`src1`
1568 v_cmpx_ge_u32_e64 :ref:`src0`, :ref:`src1`
1569 v_cmpx_ge_u64_e64 :ref:`src0`, :ref:`src1`
1570 v_cmpx_gt_f16_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1571 v_cmpx_gt_f32_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1572 v_cmpx_gt_f64_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1573 v_cmpx_gt_i16_e64 :ref:`src0`, :ref:`src1`
1574 v_cmpx_gt_i32_e64 :ref:`src0`, :ref:`src1`
1575 v_cmpx_gt_i64_e64 :ref:`src0`, :ref:`src1`
1576 v_cmpx_gt_u16_e64 :ref:`src0`, :ref:`src1`
1577 v_cmpx_gt_u32_e64 :ref:`src0`, :ref:`src1`
1578 v_cmpx_gt_u64_e64 :ref:`src0`, :ref:`src1`
1579 v_cmpx_le_f16_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1580 v_cmpx_le_f32_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1581 v_cmpx_le_f64_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1582 v_cmpx_le_i16_e64 :ref:`src0`, :ref:`src1`
1583 v_cmpx_le_i32_e64 :ref:`src0`, :ref:`src1`
1584 v_cmpx_le_i64_e64 :ref:`src0`, :ref:`src1`
1585 v_cmpx_le_u16_e64 :ref:`src0`, :ref:`src1`
1586 v_cmpx_le_u32_e64 :ref:`src0`, :ref:`src1`
1587 v_cmpx_le_u64_e64 :ref:`src0`, :ref:`src1`
1588 v_cmpx_lg_f16_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1589 v_cmpx_lg_f32_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1590 v_cmpx_lg_f64_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1591 v_cmpx_lt_f16_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1592 v_cmpx_lt_f32_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1593 v_cmpx_lt_f64_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1594 v_cmpx_lt_i16_e64 :ref:`src0`, :ref:`src1`
1595 v_cmpx_lt_i32_e64 :ref:`src0`, :ref:`src1`
1596 v_cmpx_lt_i64_e64 :ref:`src0`, :ref:`src1`
1597 v_cmpx_lt_u16_e64 :ref:`src0`, :ref:`src1`
1598 v_cmpx_lt_u32_e64 :ref:`src0`, :ref:`src1`
1599 v_cmpx_lt_u64_e64 :ref:`src0`, :ref:`src1`
1600 v_cmpx_ne_i16_e64 :ref:`src0`, :ref:`src1`
1601 v_cmpx_ne_i32_e64 :ref:`src0`, :ref:`src1`
1602 v_cmpx_ne_i64_e64 :ref:`src0`, :ref:`src1`
1603 v_cmpx_ne_u16_e64 :ref:`src0`, :ref:`src1`
1604 v_cmpx_ne_u32_e64 :ref:`src0`, :ref:`src1`
1605 v_cmpx_ne_u64_e64 :ref:`src0`, :ref:`src1`
1606 v_cmpx_neq_f16_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1607 v_cmpx_neq_f32_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1608 v_cmpx_neq_f64_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1609 v_cmpx_nge_f16_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1610 v_cmpx_nge_f32_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1611 v_cmpx_nge_f64_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1612 v_cmpx_ngt_f16_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1613 v_cmpx_ngt_f32_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1614 v_cmpx_ngt_f64_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1615 v_cmpx_nle_f16_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1616 v_cmpx_nle_f32_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1617 v_cmpx_nle_f64_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1618 v_cmpx_nlg_f16_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1619 v_cmpx_nlg_f32_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1620 v_cmpx_nlg_f64_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1621 v_cmpx_nlt_f16_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1622 v_cmpx_nlt_f32_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1623 v_cmpx_nlt_f64_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1624 v_cmpx_o_f16_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1625 v_cmpx_o_f32_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1626 v_cmpx_o_f64_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1627 v_cmpx_t_i32_e64 :ref:`src0`, :ref:`src1`
1628 v_cmpx_t_i64_e64 :ref:`src0`, :ref:`src1`
1629 v_cmpx_t_u32_e64 :ref:`src0`, :ref:`src1`
1630 v_cmpx_t_u64_e64 :ref:`src0`, :ref:`src1`
1631 v_cmpx_tru_f16_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1632 v_cmpx_tru_f32_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1633 v_cmpx_tru_f64_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1634 v_cmpx_u_f16_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1635 v_cmpx_u_f32_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1636 v_cmpx_u_f64_e64 :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1637 v_cndmask_b32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`ssrc2`
1638 v_cos_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1639 v_cos_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1640 v_cubeid_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1641 v_cubema_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1642 v_cubesc_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1643 v_cubetc_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1644 v_cvt_f16_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1645 v_cvt_f16_i16_e64 :ref:`vdst`, :ref:`src` :ref:`clamp`
1646 v_cvt_f16_u16_e64 :ref:`vdst`, :ref:`src` :ref:`clamp`
1647 v_cvt_f32_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1648 v_cvt_f32_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1649 v_cvt_f32_i32_e64 :ref:`vdst`, :ref:`src` :ref:`clamp` :ref:`omod`
1650 v_cvt_f32_u32_e64 :ref:`vdst`, :ref:`src` :ref:`clamp` :ref:`omod`
1651 v_cvt_f32_ubyte0_e64 :ref:`vdst`, :ref:`src` :ref:`clamp` :ref:`omod`
1652 v_cvt_f32_ubyte1_e64 :ref:`vdst`, :ref:`src` :ref:`clamp` :ref:`omod`
1653 v_cvt_f32_ubyte2_e64 :ref:`vdst`, :ref:`src` :ref:`clamp` :ref:`omod`
1654 v_cvt_f32_ubyte3_e64 :ref:`vdst`, :ref:`src` :ref:`clamp` :ref:`omod`
1655 v_cvt_f64_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1656 v_cvt_f64_i32_e64 :ref:`vdst`, :ref:`src` :ref:`clamp` :ref:`omod`
1657 v_cvt_f64_u32_e64 :ref:`vdst`, :ref:`src` :ref:`clamp` :ref:`omod`
1658 v_cvt_flr_i32_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1659 v_cvt_i16_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1660 v_cvt_i32_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1661 v_cvt_i32_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1662 v_cvt_norm_i16_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1663 v_cvt_norm_u16_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1664 v_cvt_off_f32_i4_e64 :ref:`vdst`, :ref:`src` :ref:`clamp` :ref:`omod`
1665 v_cvt_pk_i16_i32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1666 v_cvt_pk_u16_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1667 v_cvt_pk_u8_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`u32`, :ref:`src2`::ref:`u32`
1668 v_cvt_pknorm_i16_f16 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`op_sel`
1669 v_cvt_pknorm_i16_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`
1670 v_cvt_pknorm_u16_f16 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`op_sel`
1671 v_cvt_pknorm_u16_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`
1672 v_cvt_pkrtz_f16_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1673 v_cvt_rpi_i32_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1674 v_cvt_u16_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1675 v_cvt_u32_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1676 v_cvt_u32_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1677 v_div_fixup_f16 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`op_sel` :ref:`clamp`
1678 v_div_fixup_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1679 v_div_fixup_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1680 v_div_fmas_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1681 v_div_fmas_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1682 v_div_scale_f32 :ref:`vdst`, :ref:`vcc`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1683 v_div_scale_f64 :ref:`vdst`, :ref:`vcc`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1684 v_exp_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1685 v_exp_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1686 v_ffbh_i32_e64 :ref:`vdst`, :ref:`src`
1687 v_ffbh_u32_e64 :ref:`vdst`, :ref:`src`
1688 v_ffbl_b32_e64 :ref:`vdst`, :ref:`src`
1689 v_floor_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1690 v_floor_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1691 v_floor_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1692 v_fma_f16 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`op_sel` :ref:`clamp`
1693 v_fma_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1694 v_fma_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1695 v_fmac_f16_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1696 v_fmac_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1697 v_fract_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1698 v_fract_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1699 v_fract_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1700 v_frexp_exp_i16_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1701 v_frexp_exp_i32_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1702 v_frexp_exp_i32_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1703 v_frexp_mant_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1704 v_frexp_mant_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1705 v_frexp_mant_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1706 v_interp_p1ll_f16 :ref:`vdst`::ref:`f32`, :ref:`vsrc`::ref:`m`::ref:`f32`, :ref:`attr`::ref:`b32` :ref:`high` :ref:`clamp` :ref:`omod`
1707 v_interp_p1lv_f16 :ref:`vdst`::ref:`f32`, :ref:`vsrc0`::ref:`m`::ref:`f32`, :ref:`attr`::ref:`b32`, :ref:`vsrc2`::ref:`m`::ref:`f16x2` :ref:`high` :ref:`clamp` :ref:`omod`
1708 v_interp_p2_f16 :ref:`vdst`, :ref:`vsrc0`::ref:`m`::ref:`f32`, :ref:`attr`::ref:`b32`, :ref:`vsrc2`::ref:`m`::ref:`f32` :ref:`high` :ref:`clamp`
1709 v_ldexp_f16_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`i16` :ref:`clamp`
1710 v_ldexp_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`i32` :ref:`clamp` :ref:`omod`
1711 v_ldexp_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`i32` :ref:`clamp` :ref:`omod`
1712 v_lerp_u8 :ref:`vdst`::ref:`u32`, :ref:`src0`::ref:`b32`, :ref:`src1`::ref:`b32`, :ref:`src2`::ref:`b32`
1713 v_log_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1714 v_log_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1715 v_lshl_add_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1716 v_lshl_or_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`::ref:`u32`, :ref:`src2`
1717 v_lshlrev_b16 :ref:`vdst`, :ref:`src0`::ref:`u16`, :ref:`src1`
1718 v_lshlrev_b32_e64 :ref:`vdst`, :ref:`src0`::ref:`u32`, :ref:`src1`
1719 v_lshlrev_b64 :ref:`vdst`, :ref:`src0`::ref:`u32`, :ref:`src1`
1720 v_lshrrev_b16 :ref:`vdst`, :ref:`src0`::ref:`u16`, :ref:`src1`
1721 v_lshrrev_b32_e64 :ref:`vdst`, :ref:`src0`::ref:`u32`, :ref:`src1`
1722 v_lshrrev_b64 :ref:`vdst`, :ref:`src0`::ref:`u32`, :ref:`src1`
1723 v_mac_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1724 v_mac_legacy_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1725 v_mad_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1726 v_mad_i16 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2` :ref:`op_sel` :ref:`clamp`
1727 v_mad_i32_i16 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`::ref:`i32` :ref:`op_sel` :ref:`clamp`
1728 v_mad_i32_i24 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`::ref:`i32` :ref:`clamp`
1729 v_mad_i64_i32 :ref:`vdst`, :ref:`sdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`::ref:`i64` :ref:`clamp`
1730 v_mad_legacy_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1731 v_mad_u16 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2` :ref:`op_sel` :ref:`clamp`
1732 v_mad_u32_u16 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`::ref:`u32` :ref:`op_sel` :ref:`clamp`
1733 v_mad_u32_u24 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`::ref:`u32` :ref:`clamp`
1734 v_mad_u64_u32 :ref:`vdst`, :ref:`sdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`::ref:`u64` :ref:`clamp`
1735 v_max3_f16 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`op_sel` :ref:`clamp`
1736 v_max3_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1737 v_max3_i16 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2` :ref:`op_sel`
1738 v_max3_i32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1739 v_max3_u16 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2` :ref:`op_sel`
1740 v_max3_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1741 v_max_f16_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1742 v_max_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1743 v_max_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1744 v_max_i16 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1745 v_max_i32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1746 v_max_u16 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1747 v_max_u32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1748 v_mbcnt_hi_u32_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1749 v_mbcnt_lo_u32_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1750 v_med3_f16 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`op_sel` :ref:`clamp`
1751 v_med3_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1752 v_med3_i16 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2` :ref:`op_sel`
1753 v_med3_i32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1754 v_med3_u16 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2` :ref:`op_sel`
1755 v_med3_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1756 v_min3_f16 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`op_sel` :ref:`clamp`
1757 v_min3_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1758 v_min3_i16 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2` :ref:`op_sel`
1759 v_min3_i32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1760 v_min3_u16 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2` :ref:`op_sel`
1761 v_min3_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1762 v_min_f16_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1763 v_min_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1764 v_min_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1765 v_min_i16 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1766 v_min_i32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1767 v_min_u16 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1768 v_min_u32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1769 v_mov_b32_e64 :ref:`vdst`, :ref:`src`
1770 v_movreld_b32_e64 :ref:`vdst`, :ref:`src`
1771 v_movrels_b32_e64 :ref:`vdst`, :ref:`vsrc`
1772 v_movrelsd_2_b32_e64 :ref:`vdst`, :ref:`vsrc`
1773 v_movrelsd_b32_e64 :ref:`vdst`, :ref:`vsrc`
1774 v_mqsad_pk_u16_u8 :ref:`vdst`::ref:`b64`, :ref:`src0`::ref:`b64`, :ref:`src1`::ref:`b32`, :ref:`src2`::ref:`b64` :ref:`clamp`
1775 v_mqsad_u32_u8 :ref:`vdst`::ref:`b128`, :ref:`src0`::ref:`b64`, :ref:`src1`::ref:`b32`, :ref:`vsrc2`::ref:`b128` :ref:`clamp`
1776 v_msad_u8 :ref:`vdst`::ref:`u32`, :ref:`src0`::ref:`b32`, :ref:`src1`::ref:`b32`, :ref:`src2`::ref:`b32` :ref:`clamp`
1777 v_mul_f16_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1778 v_mul_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1779 v_mul_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1780 v_mul_hi_i32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1781 v_mul_hi_i32_i24_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1782 v_mul_hi_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1783 v_mul_hi_u32_u24_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1784 v_mul_i32_i24_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1785 v_mul_legacy_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1786 v_mul_lo_u16 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1787 v_mul_lo_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1788 v_mul_u32_u24_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1789 v_mullit_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1790 v_nop_e64
1791 v_not_b32_e64 :ref:`vdst`, :ref:`src`
1792 v_or3_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1793 v_or_b32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1794 v_pack_b32_f16 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`op_sel`
1795 v_perm_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1796 v_permlane16_b32 :ref:`vdst`, :ref:`vdata`, :ref:`ssrc1`, :ref:`ssrc2` :ref:`op_sel`
1797 v_permlanex16_b32 :ref:`vdst`, :ref:`vdata`, :ref:`ssrc1`, :ref:`ssrc2` :ref:`op_sel`
1798 v_pipeflush_e64
1799 v_qsad_pk_u16_u8 :ref:`vdst`::ref:`b64`, :ref:`src0`::ref:`b64`, :ref:`src1`::ref:`b32`, :ref:`src2`::ref:`b64` :ref:`clamp`
1800 v_rcp_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1801 v_rcp_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1802 v_rcp_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1803 v_rcp_iflag_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1804 v_readlane_b32 :ref:`sdst`, :ref:`vsrc0`, :ref:`ssrc1`
1805 v_rndne_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1806 v_rndne_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1807 v_rndne_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1808 v_rsq_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1809 v_rsq_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1810 v_rsq_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1811 v_sad_hi_u8 :ref:`vdst`::ref:`u32`, :ref:`src0`::ref:`u8x4`, :ref:`src1`::ref:`u8x4`, :ref:`src2`::ref:`u32` :ref:`clamp`
1812 v_sad_u16 :ref:`vdst`::ref:`u32`, :ref:`src0`::ref:`u16x2`, :ref:`src1`::ref:`u16x2`, :ref:`src2`::ref:`u32` :ref:`clamp`
1813 v_sad_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2` :ref:`clamp`
1814 v_sad_u8 :ref:`vdst`::ref:`u32`, :ref:`src0`::ref:`u8x4`, :ref:`src1`::ref:`u8x4`, :ref:`src2`::ref:`u32` :ref:`clamp`
1815 v_sat_pk_u8_i16_e64 :ref:`vdst`, :ref:`src`
1816 v_sin_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1817 v_sin_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1818 v_sqrt_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1819 v_sqrt_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1820 v_sqrt_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1821 v_sub_co_ci_u32_e64 :ref:`vdst`, :ref:`sdst`, :ref:`src0`, :ref:`src1`, :ref:`ssrc2` :ref:`clamp`
1822 v_sub_co_u32 :ref:`vdst`, :ref:`sdst`, :ref:`src0`, :ref:`src1` :ref:`clamp`
1823 v_sub_f16_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1824 v_sub_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1825 v_sub_nc_i16 :ref:`vdst`, :ref:`src0`, :ref:`src1` :ref:`op_sel` :ref:`clamp`
1826 v_sub_nc_i32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1827 v_sub_nc_u16 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1828 v_sub_nc_u32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1` :ref:`clamp`
1829 v_subrev_co_ci_u32_e64 :ref:`vdst`, :ref:`sdst`, :ref:`src0`, :ref:`src1`, :ref:`ssrc2` :ref:`clamp`
1830 v_subrev_co_u32 :ref:`vdst`, :ref:`sdst`, :ref:`src0`, :ref:`src1` :ref:`clamp`
1831 v_subrev_f16_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1832 v_subrev_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1833 v_subrev_nc_u32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1` :ref:`clamp`
1834 v_trig_preop_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`u32` :ref:`clamp` :ref:`omod`
1835 v_trunc_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1836 v_trunc_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1837 v_trunc_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1838 v_writelane_b32 :ref:`vdst`, :ref:`ssrc0`, :ref:`ssrc1`
1839 v_xad_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1840 v_xnor_b32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1841 v_xor3_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1842 v_xor_b32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1843
1844 VOP3P
1845 -----------------------
1846
1847 .. parsed-literal::
1848
1849 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
1850 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
1851 v_fma_mix_f32 :ref:`vdst`, :ref:`src0`::ref:`fx`, :ref:`src1`::ref:`fx`, :ref:`src2`::ref:`fx` :ref:`m_op_sel` :ref:`m_op_sel_hi` :ref:`clamp`
1852 v_fma_mixhi_f16 :ref:`vdst`, :ref:`src0`::ref:`fx`, :ref:`src1`::ref:`fx`, :ref:`src2`::ref:`fx` :ref:`m_op_sel` :ref:`m_op_sel_hi` :ref:`clamp`
1853 v_fma_mixlo_f16 :ref:`vdst`, :ref:`src0`::ref:`fx`, :ref:`src1`::ref:`fx`, :ref:`src2`::ref:`fx` :ref:`m_op_sel` :ref:`m_op_sel_hi` :ref:`clamp`
1854 v_pk_add_f16 :ref:`vdst`, :ref:`src0`, :ref:`src1` :ref:`op_sel` :ref:`op_sel_hi` :ref:`neg_lo` :ref:`neg_hi` :ref:`clamp`
1855 v_pk_add_i16 :ref:`vdst`, :ref:`src0`, :ref:`src1` :ref:`op_sel` :ref:`op_sel_hi` :ref:`clamp`
1856 v_pk_add_u16 :ref:`vdst`, :ref:`src0`, :ref:`src1` :ref:`op_sel` :ref:`op_sel_hi` :ref:`clamp`
1857 v_pk_ashrrev_i16 :ref:`vdst`, :ref:`src0`::ref:`u16x2`, :ref:`src1` :ref:`op_sel` :ref:`op_sel_hi`
1858 v_pk_fma_f16 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2` :ref:`op_sel` :ref:`op_sel_hi` :ref:`neg_lo` :ref:`neg_hi` :ref:`clamp`
1859 v_pk_lshlrev_b16 :ref:`vdst`, :ref:`src0`::ref:`u16x2`, :ref:`src1` :ref:`op_sel` :ref:`op_sel_hi`
1860 v_pk_lshrrev_b16 :ref:`vdst`, :ref:`src0`::ref:`u16x2`, :ref:`src1` :ref:`op_sel` :ref:`op_sel_hi`
1861 v_pk_mad_i16 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2` :ref:`op_sel` :ref:`op_sel_hi` :ref:`clamp`
1862 v_pk_mad_u16 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2` :ref:`op_sel` :ref:`op_sel_hi` :ref:`clamp`
1863 v_pk_max_f16 :ref:`vdst`, :ref:`src0`, :ref:`src1` :ref:`op_sel` :ref:`op_sel_hi` :ref:`neg_lo` :ref:`neg_hi` :ref:`clamp`
1864 v_pk_max_i16 :ref:`vdst`, :ref:`src0`, :ref:`src1` :ref:`op_sel` :ref:`op_sel_hi`
1865 v_pk_max_u16 :ref:`vdst`, :ref:`src0`, :ref:`src1` :ref:`op_sel` :ref:`op_sel_hi`
1866 v_pk_min_f16 :ref:`vdst`, :ref:`src0`, :ref:`src1` :ref:`op_sel` :ref:`op_sel_hi` :ref:`neg_lo` :ref:`neg_hi` :ref:`clamp`
1867 v_pk_min_i16 :ref:`vdst`, :ref:`src0`, :ref:`src1` :ref:`op_sel` :ref:`op_sel_hi`
1868 v_pk_min_u16 :ref:`vdst`, :ref:`src0`, :ref:`src1` :ref:`op_sel` :ref:`op_sel_hi`
1869 v_pk_mul_f16 :ref:`vdst`, :ref:`src0`, :ref:`src1` :ref:`op_sel` :ref:`op_sel_hi` :ref:`neg_lo` :ref:`neg_hi` :ref:`clamp`
1870 v_pk_mul_lo_u16 :ref:`vdst`, :ref:`src0`, :ref:`src1` :ref:`op_sel` :ref:`op_sel_hi`
1871 v_pk_sub_i16 :ref:`vdst`, :ref:`src0`, :ref:`src1` :ref:`op_sel` :ref:`op_sel_hi` :ref:`clamp`
1872 v_pk_sub_u16 :ref:`vdst`, :ref:`src0`, :ref:`src1` :ref:`op_sel` :ref:`op_sel_hi` :ref:`clamp`
1873
1874 VOPC
1875 -----------------------
1876
1877 .. parsed-literal::
1878
1879 **INSTRUCTION** **DST** **SRC0** **SRC1**
1880 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
1881 v_cmp_class_f16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`::ref:`b32`
1882 v_cmp_class_f32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`::ref:`b32`
1883 v_cmp_class_f64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`::ref:`b32`
1884 v_cmp_eq_f16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1885 v_cmp_eq_f32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1886 v_cmp_eq_f64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1887 v_cmp_eq_i16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1888 v_cmp_eq_i32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1889 v_cmp_eq_i64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1890 v_cmp_eq_u16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1891 v_cmp_eq_u32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1892 v_cmp_eq_u64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1893 v_cmp_f_f16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1894 v_cmp_f_f32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1895 v_cmp_f_f64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1896 v_cmp_f_i32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1897 v_cmp_f_i64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1898 v_cmp_f_u32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1899 v_cmp_f_u64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1900 v_cmp_ge_f16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1901 v_cmp_ge_f32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1902 v_cmp_ge_f64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1903 v_cmp_ge_i16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1904 v_cmp_ge_i32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1905 v_cmp_ge_i64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1906 v_cmp_ge_u16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1907 v_cmp_ge_u32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1908 v_cmp_ge_u64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1909 v_cmp_gt_f16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1910 v_cmp_gt_f32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1911 v_cmp_gt_f64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1912 v_cmp_gt_i16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1913 v_cmp_gt_i32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1914 v_cmp_gt_i64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1915 v_cmp_gt_u16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1916 v_cmp_gt_u32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1917 v_cmp_gt_u64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1918 v_cmp_le_f16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1919 v_cmp_le_f32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1920 v_cmp_le_f64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1921 v_cmp_le_i16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1922 v_cmp_le_i32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1923 v_cmp_le_i64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1924 v_cmp_le_u16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1925 v_cmp_le_u32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1926 v_cmp_le_u64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1927 v_cmp_lg_f16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1928 v_cmp_lg_f32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1929 v_cmp_lg_f64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1930 v_cmp_lt_f16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1931 v_cmp_lt_f32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1932 v_cmp_lt_f64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1933 v_cmp_lt_i16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1934 v_cmp_lt_i32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1935 v_cmp_lt_i64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1936 v_cmp_lt_u16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1937 v_cmp_lt_u32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1938 v_cmp_lt_u64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1939 v_cmp_ne_i16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1940 v_cmp_ne_i32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1941 v_cmp_ne_i64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1942 v_cmp_ne_u16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1943 v_cmp_ne_u32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1944 v_cmp_ne_u64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1945 v_cmp_neq_f16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1946 v_cmp_neq_f32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1947 v_cmp_neq_f64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1948 v_cmp_nge_f16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1949 v_cmp_nge_f32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1950 v_cmp_nge_f64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1951 v_cmp_ngt_f16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1952 v_cmp_ngt_f32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1953 v_cmp_ngt_f64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1954 v_cmp_nle_f16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1955 v_cmp_nle_f32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1956 v_cmp_nle_f64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1957 v_cmp_nlg_f16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1958 v_cmp_nlg_f32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1959 v_cmp_nlg_f64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1960 v_cmp_nlt_f16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1961 v_cmp_nlt_f32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1962 v_cmp_nlt_f64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1963 v_cmp_o_f16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1964 v_cmp_o_f32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1965 v_cmp_o_f64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1966 v_cmp_t_i32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1967 v_cmp_t_i64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1968 v_cmp_t_u32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1969 v_cmp_t_u64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1970 v_cmp_tru_f16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1971 v_cmp_tru_f32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1972 v_cmp_tru_f64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1973 v_cmp_u_f16 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1974 v_cmp_u_f32 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1975 v_cmp_u_f64 :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
1976 v_cmpx_class_f16 :ref:`src0`, :ref:`vsrc1`::ref:`b32`
1977 v_cmpx_class_f32 :ref:`src0`, :ref:`vsrc1`::ref:`b32`
1978 v_cmpx_class_f64 :ref:`src0`, :ref:`vsrc1`::ref:`b32`
1979 v_cmpx_eq_f16 :ref:`src0`, :ref:`vsrc1`
1980 v_cmpx_eq_f32 :ref:`src0`, :ref:`vsrc1`
1981 v_cmpx_eq_f64 :ref:`src0`, :ref:`vsrc1`
1982 v_cmpx_eq_i16 :ref:`src0`, :ref:`vsrc1`
1983 v_cmpx_eq_i32 :ref:`src0`, :ref:`vsrc1`
1984 v_cmpx_eq_i64 :ref:`src0`, :ref:`vsrc1`
1985 v_cmpx_eq_u16 :ref:`src0`, :ref:`vsrc1`
1986 v_cmpx_eq_u32 :ref:`src0`, :ref:`vsrc1`
1987 v_cmpx_eq_u64 :ref:`src0`, :ref:`vsrc1`
1988 v_cmpx_f_f16 :ref:`src0`, :ref:`vsrc1`
1989 v_cmpx_f_f32 :ref:`src0`, :ref:`vsrc1`
1990 v_cmpx_f_f64 :ref:`src0`, :ref:`vsrc1`
1991 v_cmpx_f_i32 :ref:`src0`, :ref:`vsrc1`
1992 v_cmpx_f_i64 :ref:`src0`, :ref:`vsrc1`
1993 v_cmpx_f_u32 :ref:`src0`, :ref:`vsrc1`
1994 v_cmpx_f_u64 :ref:`src0`, :ref:`vsrc1`
1995 v_cmpx_ge_f16 :ref:`src0`, :ref:`vsrc1`
1996 v_cmpx_ge_f32 :ref:`src0`, :ref:`vsrc1`
1997 v_cmpx_ge_f64 :ref:`src0`, :ref:`vsrc1`
1998 v_cmpx_ge_i16 :ref:`src0`, :ref:`vsrc1`
1999 v_cmpx_ge_i32 :ref:`src0`, :ref:`vsrc1`
2000 v_cmpx_ge_i64 :ref:`src0`, :ref:`vsrc1`
2001 v_cmpx_ge_u16 :ref:`src0`, :ref:`vsrc1`
2002 v_cmpx_ge_u32 :ref:`src0`, :ref:`vsrc1`
2003 v_cmpx_ge_u64 :ref:`src0`, :ref:`vsrc1`
2004 v_cmpx_gt_f16 :ref:`src0`, :ref:`vsrc1`
2005 v_cmpx_gt_f32 :ref:`src0`, :ref:`vsrc1`
2006 v_cmpx_gt_f64 :ref:`src0`, :ref:`vsrc1`
2007 v_cmpx_gt_i16 :ref:`src0`, :ref:`vsrc1`
2008 v_cmpx_gt_i32 :ref:`src0`, :ref:`vsrc1`
2009 v_cmpx_gt_i64 :ref:`src0`, :ref:`vsrc1`
2010 v_cmpx_gt_u16 :ref:`src0`, :ref:`vsrc1`
2011 v_cmpx_gt_u32 :ref:`src0`, :ref:`vsrc1`
2012 v_cmpx_gt_u64 :ref:`src0`, :ref:`vsrc1`
2013 v_cmpx_le_f16 :ref:`src0`, :ref:`vsrc1`
2014 v_cmpx_le_f32 :ref:`src0`, :ref:`vsrc1`
2015 v_cmpx_le_f64 :ref:`src0`, :ref:`vsrc1`
2016 v_cmpx_le_i16 :ref:`src0`, :ref:`vsrc1`
2017 v_cmpx_le_i32 :ref:`src0`, :ref:`vsrc1`
2018 v_cmpx_le_i64 :ref:`src0`, :ref:`vsrc1`
2019 v_cmpx_le_u16 :ref:`src0`, :ref:`vsrc1`
2020 v_cmpx_le_u32 :ref:`src0`, :ref:`vsrc1`
2021 v_cmpx_le_u64 :ref:`src0`, :ref:`vsrc1`
2022 v_cmpx_lg_f16 :ref:`src0`, :ref:`vsrc1`
2023 v_cmpx_lg_f32 :ref:`src0`, :ref:`vsrc1`
2024 v_cmpx_lg_f64 :ref:`src0`, :ref:`vsrc1`
2025 v_cmpx_lt_f16 :ref:`src0`, :ref:`vsrc1`
2026 v_cmpx_lt_f32 :ref:`src0`, :ref:`vsrc1`
2027 v_cmpx_lt_f64 :ref:`src0`, :ref:`vsrc1`
2028 v_cmpx_lt_i16 :ref:`src0`, :ref:`vsrc1`
2029 v_cmpx_lt_i32 :ref:`src0`, :ref:`vsrc1`
2030 v_cmpx_lt_i64 :ref:`src0`, :ref:`vsrc1`
2031 v_cmpx_lt_u16 :ref:`src0`, :ref:`vsrc1`
2032 v_cmpx_lt_u32 :ref:`src0`, :ref:`vsrc1`
2033 v_cmpx_lt_u64 :ref:`src0`, :ref:`vsrc1`
2034 v_cmpx_ne_i16 :ref:`src0`, :ref:`vsrc1`
2035 v_cmpx_ne_i32 :ref:`src0`, :ref:`vsrc1`
2036 v_cmpx_ne_i64 :ref:`src0`, :ref:`vsrc1`
2037 v_cmpx_ne_u16 :ref:`src0`, :ref:`vsrc1`
2038 v_cmpx_ne_u32 :ref:`src0`, :ref:`vsrc1`
2039 v_cmpx_ne_u64 :ref:`src0`, :ref:`vsrc1`
2040 v_cmpx_neq_f16 :ref:`src0`, :ref:`vsrc1`
2041 v_cmpx_neq_f32 :ref:`src0`, :ref:`vsrc1`
2042 v_cmpx_neq_f64 :ref:`src0`, :ref:`vsrc1`
2043 v_cmpx_nge_f16 :ref:`src0`, :ref:`vsrc1`
2044 v_cmpx_nge_f32 :ref:`src0`, :ref:`vsrc1`
2045 v_cmpx_nge_f64 :ref:`src0`, :ref:`vsrc1`
2046 v_cmpx_ngt_f16 :ref:`src0`, :ref:`vsrc1`
2047 v_cmpx_ngt_f32 :ref:`src0`, :ref:`vsrc1`
2048 v_cmpx_ngt_f64 :ref:`src0`, :ref:`vsrc1`
2049 v_cmpx_nle_f16 :ref:`src0`, :ref:`vsrc1`
2050 v_cmpx_nle_f32 :ref:`src0`, :ref:`vsrc1`
2051 v_cmpx_nle_f64 :ref:`src0`, :ref:`vsrc1`
2052 v_cmpx_nlg_f16 :ref:`src0`, :ref:`vsrc1`
2053 v_cmpx_nlg_f32 :ref:`src0`, :ref:`vsrc1`
2054 v_cmpx_nlg_f64 :ref:`src0`, :ref:`vsrc1`
2055 v_cmpx_nlt_f16 :ref:`src0`, :ref:`vsrc1`
2056 v_cmpx_nlt_f32 :ref:`src0`, :ref:`vsrc1`
2057 v_cmpx_nlt_f64 :ref:`src0`, :ref:`vsrc1`
2058 v_cmpx_o_f16 :ref:`src0`, :ref:`vsrc1`
2059 v_cmpx_o_f32 :ref:`src0`, :ref:`vsrc1`
2060 v_cmpx_o_f64 :ref:`src0`, :ref:`vsrc1`
2061 v_cmpx_t_i32 :ref:`src0`, :ref:`vsrc1`
2062 v_cmpx_t_i64 :ref:`src0`, :ref:`vsrc1`
2063 v_cmpx_t_u32 :ref:`src0`, :ref:`vsrc1`
2064 v_cmpx_t_u64 :ref:`src0`, :ref:`vsrc1`
2065 v_cmpx_tru_f16 :ref:`src0`, :ref:`vsrc1`
2066 v_cmpx_tru_f32 :ref:`src0`, :ref:`vsrc1`
2067 v_cmpx_tru_f64 :ref:`src0`, :ref:`vsrc1`
2068 v_cmpx_u_f16 :ref:`src0`, :ref:`vsrc1`
2069 v_cmpx_u_f32 :ref:`src0`, :ref:`vsrc1`
2070 v_cmpx_u_f64 :ref:`src0`, :ref:`vsrc1`
2071
2072 .. |---| unicode:: U+02014 .. em dash
2073
2074
2075 .. toctree::
2076 :hidden:
2077
2078 gfx10_attr
2079 gfx10_bimm16
2080 gfx10_bimm32
2081 gfx10_fimm16
2082 gfx10_fimm32
2083 gfx10_hwreg
2084 gfx10_label
2085 gfx10_msg
2086 gfx10_param
2087 gfx10_perm_smem
2088 gfx10_simm16
2089 gfx10_tgt
2090 gfx10_uimm16
2091 gfx10_vcc_32
2092 gfx10_waitcnt
2093 gfx10_addr_buf
2094 gfx10_addr_ds
2095 gfx10_addr_flat
2096 gfx10_addr_mimg
2097 gfx10_base_smem_addr
2098 gfx10_base_smem_buf
2099 gfx10_base_smem_scratch
2100 gfx10_data_buf_atomic128
2101 gfx10_data_buf_atomic32
2102 gfx10_data_buf_atomic64
2103 gfx10_data_mimg_atomic_cmp
2104 gfx10_data_mimg_atomic_reg
2105 gfx10_data_mimg_store
2106 gfx10_data_mimg_store_d16
2107 gfx10_data_smem_atomic128
2108 gfx10_data_smem_atomic32
2109 gfx10_data_smem_atomic64
2110 gfx10_dst_buf_128
2111 gfx10_dst_buf_32
2112 gfx10_dst_buf_64
2113 gfx10_dst_buf_96
2114 gfx10_dst_buf_lds
2115 gfx10_dst_flat_atomic32
2116 gfx10_dst_flat_atomic64
2117 gfx10_dst_mimg_gather4
2118 gfx10_dst_mimg_regular
2119 gfx10_dst_mimg_regular_d16
2120 gfx10_offset_buf
2121 gfx10_offset_smem_buf
2122 gfx10_offset_smem_plain
2123 gfx10_rsrc_buf
2124 gfx10_rsrc_mimg
2125 gfx10_saddr_flat_global
2126 gfx10_saddr_flat_scratch
2127 gfx10_samp_mimg
2128 gfx10_sdata128_0
2129 gfx10_sdata32_0
2130 gfx10_sdata64_0
2131 gfx10_sdst128_0
2132 gfx10_sdst256_0
2133 gfx10_sdst32_0
2134 gfx10_sdst32_1
2135 gfx10_sdst32_2
2136 gfx10_sdst512_0
2137