llvm.org GIT mirror llvm / f2616d2
AMDGPU: Remove llvm.AMDGPU.flbit intrinsic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295754 91177308-0d34-0410-b5e6-96231b3b80d8 Matt Arsenault 3 years ago
3 changed file(s) with 0 addition(s) and 29 deletion(s). Raw diff Collapse all Expand all
1616 def int_AMDGPU_kill : Intrinsic<[], [llvm_float_ty], []>;
1717 def int_AMDGPU_kilp : Intrinsic<[], [], []>;
1818
19 // Deprecated in favor of llvm.amdgcn.sffbh
20 def int_AMDGPU_flbit_i32 : Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>;
21
2219 // Deprecated in favor of expanded bit operations
2320 def int_AMDGPU_bfe_i32 : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
2421 def int_AMDGPU_bfe_u32 : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
28082808 return DAG.getNode(AMDGPUISD::FMUL_LEGACY, DL, VT,
28092809 Op.getOperand(1), Op.getOperand(2));
28102810 case Intrinsic::amdgcn_sffbh:
2811 case AMDGPUIntrinsic::AMDGPU_flbit_i32: // Legacy name.
28122811 return DAG.getNode(AMDGPUISD::FFBH_I32, DL, VT, Op.getOperand(1));
28132812 default:
28142813 return AMDGPUTargetLowering::LowerOperation(Op, DAG);
11 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
22
33 declare i32 @llvm.amdgcn.sffbh.i32(i32) #1
4 declare i32 @llvm.AMDGPU.flbit.i32(i32) #1
54
65 ; FUNC-LABEL: {{^}}s_flbit:
76 ; GCN: s_load_dword [[VAL:s[0-9]+]],
2524 ret void
2625 }
2726
28 ; FUNC-LABEL: {{^}}legacy_s_flbit:
29 ; GCN: s_load_dword [[VAL:s[0-9]+]],
30 ; GCN: s_flbit_i32 [[SRESULT:s[0-9]+]], [[VAL]]
31 ; GCN: v_mov_b32_e32 [[VRESULT:v[0-9]+]], [[SRESULT]]
32 ; GCN: buffer_store_dword [[VRESULT]],
33 ; GCN: s_endpgm
34 define void @legacy_s_flbit(i32 addrspace(1)* noalias %out, i32 %val) nounwind {
35 %r = call i32 @llvm.AMDGPU.flbit.i32(i32 %val) nounwind readnone
36 store i32 %r, i32 addrspace(1)* %out, align 4
37 ret void
38 }
39
40 ; FUNC-LABEL: {{^}}legacy_v_flbit:
41 ; GCN: buffer_load_dword [[VAL:v[0-9]+]],
42 ; GCN: v_ffbh_i32_e32 [[RESULT:v[0-9]+]], [[VAL]]
43 ; GCN: buffer_store_dword [[RESULT]],
44 ; GCN: s_endpgm
45 define void @legacy_v_flbit(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %valptr) nounwind {
46 %val = load i32, i32 addrspace(1)* %valptr, align 4
47 %r = call i32 @llvm.AMDGPU.flbit.i32(i32 %val) nounwind readnone
48 store i32 %r, i32 addrspace(1)* %out, align 4
49 ret void
50 }
51
5227 attributes #0 = { nounwind }
5328 attributes #1 = { nounwind readnone }