llvm.org GIT mirror llvm / f254684
[ARM][v8.5A] Add speculation barriers SSBB and PSSBB This adds two new barrier instructions which can be used to restrict speculative execution of load instructions. Patch by Pablo Barrio! Differential revision: https://reviews.llvm.org/D52484 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343300 91177308-0d34-0410-b5e6-96231b3b80d8 Oliver Stannard 1 year, 10 months ago
12 changed file(s) with 109 addition(s) and 23 deletion(s). Raw diff Collapse all Expand all
59255925 // Memory barriers
59265926 def : InstAlias<"dmb", (DMB 0xf), 0>, Requires<[IsARM, HasDB]>;
59275927 def : InstAlias<"dsb", (DSB 0xf), 0>, Requires<[IsARM, HasDB]>;
5928 def : InstAlias<"ssbb", (DSB 0x0), 1>, Requires<[IsARM, HasDB]>;
5929 def : InstAlias<"pssbb", (DSB 0x4), 1>, Requires<[IsARM, HasDB]>;
59285930 def : InstAlias<"isb", (ISB 0xf), 0>, Requires<[IsARM, HasDB]>;
59295931 // Armv8-R 'Data Full Barrier'
59305932 def : InstAlias<"dfb", (DSB 0xc), 1>, Requires<[IsARM, HasDFB]>;
45534553 def : InstAlias<"dmb${p}", (t2DMB 0xf, pred:$p), 0>, Requires<[HasDB]>;
45544554 def : InstAlias<"dsb${p}", (t2DSB 0xf, pred:$p), 0>, Requires<[HasDB]>;
45554555 def : InstAlias<"isb${p}", (t2ISB 0xf, pred:$p), 0>, Requires<[HasDB]>;
4556
4557 // Non-predicable aliases of a predicable DSB: the predicate is (14, 0) where
4558 // 14 = AL (always execute) and 0 = "instruction doesn't read the CPSR".
4559 def : InstAlias<"ssbb", (t2DSB 0x0, 14, 0), 1>, Requires<[HasDB, IsThumb2]>;
4560 def : InstAlias<"pssbb", (t2DSB 0x4, 14, 0), 1>, Requires<[HasDB, IsThumb2]>;
4561
45564562 // Armv8-R 'Data Full Barrier'
45574563 def : InstAlias<"dfb${p}", (t2DSB 0xc, pred:$p), 1>, Requires<[HasDFB]>;
45584564
57205720 Mnemonic == "vudot" || Mnemonic == "vsdot" ||
57215721 Mnemonic == "vcmla" || Mnemonic == "vcadd" ||
57225722 Mnemonic == "vfmal" || Mnemonic == "vfmsl" ||
5723 Mnemonic == "sb") {
5723 Mnemonic == "sb" || Mnemonic == "ssbb" ||
5724 Mnemonic == "pssbb") {
57245725 // These mnemonics are never predicable
57255726 CanAcceptPredicationCode = false;
57265727 } else if (!isThumb()) {
68216822 return Error(Operands[1]->getStartLoc(), "instruction 'csdb' is not "
68226823 "predicable, but condition "
68236824 "code specified");
6825 break;
6826 }
6827 case ARM::DSB:
6828 case ARM::t2DSB: {
6829
6830 if (Inst.getNumOperands() < 2)
6831 break;
6832
6833 unsigned Option = Inst.getOperand(0).getImm();
6834 unsigned Pred = Inst.getOperand(1).getImm();
6835
6836 // SSBB and PSSBB (DSB #0|#4) are not predicable (pred must be AL).
6837 if (Option == 0 && Pred != ARMCC::AL)
6838 return Error(Operands[1]->getStartLoc(),
6839 "instruction 'ssbb' is not predicable, but condition code "
6840 "specified");
6841 if (Option == 4 && Pred != ARMCC::AL)
6842 return Error(Operands[1]->getStartLoc(),
6843 "instruction 'pssbb' is not predicable, but condition code "
6844 "specified");
68246845 break;
68256846 }
68266847 case ARM::VMOVRRS: {
271271 case ARM::TSB:
272272 case ARM::t2TSB:
273273 O << "\ttsb\tcsync";
274 return;
275 case ARM::t2DSB:
276 switch (MI->getOperand(0).getImm()) {
277 default:
278 if (!printAliasInstr(MI, STI, O))
279 printInstruction(MI, STI, O);
280 break;
281 case 0:
282 O << "\tssbb";
283 break;
284 case 4:
285 O << "\tpssbb";
286 break;
287 }
288 printAnnotation(O, Annot);
274289 return;
275290 }
276291
925925 @ CHECK: dsb nsh @ encoding: [0x47,0xf0,0x7f,0xf5]
926926 @ CHECK: dsb nshst @ encoding: [0x46,0xf0,0x7f,0xf5]
927927 @ CHECK: dsb #0x5 @ encoding: [0x45,0xf0,0x7f,0xf5]
928 @ CHECK: dsb #0x4 @ encoding: [0x44,0xf0,0x7f,0xf5]
928 @ CHECK: pssbb @ encoding: [0x44,0xf0,0x7f,0xf5]
929929 @ CHECK: dsb osh @ encoding: [0x43,0xf0,0x7f,0xf5]
930930 @ CHECK: dsb oshst @ encoding: [0x42,0xf0,0x7f,0xf5]
931931 @ CHECK: dsb #0x1 @ encoding: [0x41,0xf0,0x7f,0xf5]
932 @ CHECK: dsb #0x0 @ encoding: [0x40,0xf0,0x7f,0xf5]
932 @ CHECK: ssbb @ encoding: [0x40,0xf0,0x7f,0xf5]
933933
934934 @ CHECK: dsb #0x8 @ encoding: [0x48,0xf0,0x7f,0xf5]
935935 @ CHECK: dsb nsh @ encoding: [0x47,0xf0,0x7f,0xf5]
656656 @ CHECK: dsb nsh @ encoding: [0xbf,0xf3,0x47,0x8f]
657657 @ CHECK: dsb nshst @ encoding: [0xbf,0xf3,0x46,0x8f]
658658 @ CHECK: dsb #0x5 @ encoding: [0xbf,0xf3,0x45,0x8f]
659 @ CHECK: dsb #0x4 @ encoding: [0xbf,0xf3,0x44,0x8f]
659 @ CHECK: pssbb @ encoding: [0xbf,0xf3,0x44,0x8f]
660660 @ CHECK: dsb osh @ encoding: [0xbf,0xf3,0x43,0x8f]
661661 @ CHECK: dsb oshst @ encoding: [0xbf,0xf3,0x42,0x8f]
662662 @ CHECK: dsb #0x1 @ encoding: [0xbf,0xf3,0x41,0x8f]
663 @ CHECK: dsb #0x0 @ encoding: [0xbf,0xf3,0x40,0x8f]
663 @ CHECK: ssbb @ encoding: [0xbf,0xf3,0x40,0x8f]
664664
665665 @ CHECK: dsb sy @ encoding: [0xbf,0xf3,0x4f,0x8f]
666666 @ CHECK: dsb st @ encoding: [0xbf,0xf3,0x4e,0x8f]
+0
-6
test/MC/ARM/csdb-errors.s less more
None // RUN: not llvm-mc -triple armv8a-none-eabi %s 2>&1 | FileCheck %s
1 // RUN: not llvm-mc -triple thumbv8a-none-eabi %s 2>&1 | FileCheck %s
2
3 it eq
4 csdbeq
5 // CHECK: error: instruction 'csdb' is not predicable, but condition code specified
+0
-8
test/MC/ARM/csdb.s less more
None @ RUN: llvm-mc -triple armv8a-none-eabi -show-encoding %s | FileCheck %s --check-prefix=ARM
1 @ RUN: llvm-mc -triple thumbv8a-none-eabi -show-encoding %s | FileCheck %s --check-prefix=THUMB
2 @ RUN: not llvm-mc -triple thumbv6m-none-eabi -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
3
4 csdb
5 @ ARM: csdb @ encoding: [0x14,0xf0,0x20,0xe3]
6 @ THUMB: csdb @ encoding: [0xaf,0xf3,0x14,0x80]
7 @ ERROR: error: instruction requires: thumb2
0 // RUN: not llvm-mc -triple armv8a-none-eabi %s 2>&1 | FileCheck %s
1 // RUN: not llvm-mc -triple thumbv8a-none-eabi %s 2>&1 | FileCheck %s -check-prefix=THUMB
2
3 it eq
4 csdbeq
5
6 it eq
7 ssbbeq
8
9 it eq
10 pssbbeq
11
12 it eq
13 hinteq #20
14
15 it eq
16 dsbeq #0
17
18 it eq
19 dsbeq #4
20
21 // CHECK: error: instruction 'csdb' is not predicable, but condition code specified
22 // CHECK: error: instruction 'ssbb' is not predicable, but condition code specified
23 // CHECK: error: instruction 'pssbb' is not predicable, but condition code specified
24 // CHECK: error: instruction 'csdb' is not predicable, but condition code specified
25 // CHECK: error: instruction 'dsb' is not predicable, but condition code specified
26 // CHECK: error: instruction 'dsb' is not predicable, but condition code specified
27
28 // THUMB: error: instruction 'csdb' is not predicable, but condition code specified
29 // THUMB: error: instruction 'ssbb' is not predicable, but condition code specified
30 // THUMB: error: instruction 'pssbb' is not predicable, but condition code specified
31 // THUMB: error: instruction 'csdb' is not predicable, but condition code specified
32 // THUMB: error: instruction 'ssbb' is not predicable, but condition code specified
33 // THUMB: error: instruction 'pssbb' is not predicable, but condition code specified
0 @ RUN: llvm-mc -triple armv8a-none-eabi -show-encoding %s | FileCheck %s --check-prefix=ARM
1 @ RUN: llvm-mc -triple thumbv8a-none-eabi -show-encoding %s | FileCheck %s --check-prefix=THUMB
2 @ RUN: not llvm-mc -triple thumbv6m-none-eabi -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
3
4 csdb
5 ssbb
6 pssbb
7
8 @ ARM: csdb @ encoding: [0x14,0xf0,0x20,0xe3]
9 @ ARM: ssbb @ encoding: [0x40,0xf0,0x7f,0xf5]
10 @ ARM: pssbb @ encoding: [0x44,0xf0,0x7f,0xf5]
11
12 @ THUMB: csdb @ encoding: [0xaf,0xf3,0x14,0x80]
13 @ THUMB: ssbb @ encoding: [0xbf,0xf3,0x40,0x8f]
14 @ THUMB: pssbb @ encoding: [0xbf,0xf3,0x44,0x8f]
15
16 @ ERROR: error: instruction requires: thumb2
17 @ ERROR-NEXT: csdb
18 @ ERROR: error: instruction requires: thumb2
19 @ ERROR-NEXT: ssbb
20 @ ERROR: error: instruction requires: thumb2
21 @ ERROR-NEXT: pssbb
552552 # DSB
553553 #------------------------------------------------------------------------------
554554
555 # CHECK: dsb #0x0
555 # CHECK: ssbb
556556 # CHECK: dsb #0x1
557557 # CHECK: dsb oshst
558558 # CHECK: dsb osh
559 # CHECK: dsb #0x4
559 # CHECK: pssbb
560560 # CHECK: dsb #0x5
561561 # CHECK: dsb nshst
562562 # CHECK: dsb nsh
400400 #CHECK: dsb nsh
401401 #CHECK: dsb nshst
402402 #CHECK: dsb #0x5
403 #CHECK: dsb #0x4
403 #CHECK: pssbb
404404 #CHECK: dsb osh
405405 #CHECK: dsb oshst
406406 #CHECK: dsb #0x1
407 #CHECK: dsb #0x0
407 #CHECK: ssbb
408408
409409 0xbf 0xf3 0x4f 0x8f
410410 0xbf 0xf3 0x4e 0x8f