llvm.org GIT mirror llvm / f222e59
Support for byval parameters on ARM. Will be enabled by a forthcoming patch to the front-end. Radar 7662569. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126655 91177308-0d34-0410-b5e6-96231b3b80d8 Stuart Hastings 9 years ago
5 changed file(s) with 55 addition(s) and 11 deletion(s). Raw diff Collapse all Expand all
3838 class AllocaInst;
3939 class APFloat;
4040 class CallInst;
41 class CCState;
4142 class Function;
4243 class FastISel;
4344 class FunctionLoweringInfo;
12571258 return SDValue(); // this is here to silence compiler errors
12581259 }
12591260
1261 /// HandleByVal - Target-specific cleanup for formal ByVal parameters.
1262 virtual void HandleByVal(CCState *) const {};
1263
12601264 /// CanLowerReturn - This hook should be implemented to check whether the
12611265 /// return values described by the Outs array can fit into the return
12621266 /// registers. If false is returned, an sret-demotion is performed.
1818 #include "llvm/Target/TargetRegisterInfo.h"
1919 #include "llvm/Target/TargetData.h"
2020 #include "llvm/Target/TargetMachine.h"
21 #include "llvm/Target/TargetLowering.h"
2122 using namespace llvm;
2223
2324 CCState::CCState(CallingConv::ID CC, bool isVarArg, const TargetMachine &tm,
4647 unsigned Offset = AllocateStack(Size, Align);
4748
4849 addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
50 TM.getTargetLowering()->HandleByVal(const_cast(this));
4951 }
5052
5153 /// MarkAllocated - Mark a register and all of its aliases as allocated.
2121 //===----------------------------------------------------------------------===//
2222 def CC_ARM_APCS : CallingConv<[
2323
24 // Handles byval parameters.
25 CCIfByVal>,
26
2427 CCIfType<[i8, i16], CCPromoteToType>,
2528
2629 // Handle all vector types as either f64 or v2f64.
12521252 CCValAssign &VA = ArgLocs[i];
12531253 SDValue Arg = OutVals[realArgIdx];
12541254 ISD::ArgFlagsTy Flags = Outs[realArgIdx].Flags;
1255 bool isByVal = Flags.isByVal();
12551256
12561257 // Promote the value if needed.
12571258 switch (VA.getLocInfo()) {
12981299 }
12991300 } else if (VA.isRegLoc()) {
13001301 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
1301 } else if (!IsSibCall) {
1302 } else if (!IsSibCall || isByVal) {
13021303 assert(VA.isMemLoc());
13031304
13041305 MemOpChains.push_back(LowerMemOpCallTo(Chain, StackPtr, Arg,
14891490 // return.
14901491 return LowerCallResult(Chain, InFlag, CallConv, isVarArg, Ins,
14911492 dl, DAG, InVals);
1493 }
1494
1495 /// HandleByVal - Every parameter *after* a byval parameter is passed
1496 /// on the stack. Confiscate all the parameter registers to insure
1497 /// this.
1498 void
1499 llvm::ARMTargetLowering::HandleByVal(CCState *State) const {
1500 static const unsigned RegList1[] = {
1501 ARM::R0, ARM::R1, ARM::R2, ARM::R3
1502 };
1503 do {} while (State->AllocateReg(RegList1, 4));
14921504 }
14931505
14941506 /// MatchingStackOffset - Return true if the given stack call argument is
22792291 isVarArg));
22802292
22812293 SmallVector ArgValues;
2282
2294 int lastInsIndex = -1;
2295
2296 SDValue ArgValue;
22832297 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
22842298 CCValAssign &VA = ArgLocs[i];
22852299
22872301 if (VA.isRegLoc()) {
22882302 EVT RegVT = VA.getLocVT();
22892303
2290 SDValue ArgValue;
22912304 if (VA.needsCustom()) {
22922305 // f64 and vector types are split up into multiple registers or
22932306 // combinations of registers and stack slots.
23632376 assert(VA.isMemLoc());
23642377 assert(VA.getValVT() != MVT::i64 && "i64 should already be lowered");
23652378
2366 unsigned ArgSize = VA.getLocVT().getSizeInBits()/8;
2367 int FI = MFI->CreateFixedObject(ArgSize, VA.getLocMemOffset(), true);
2368
2369 // Create load nodes to retrieve arguments from the stack.
2370 SDValue FIN = DAG.getFrameIndex(FI, getPointerTy());
2371 InVals.push_back(DAG.getLoad(VA.getValVT(), dl, Chain, FIN,
2372 MachinePointerInfo::getFixedStack(FI),
2373 false, false, 0));
2379 int index = ArgLocs[i].getValNo();
2380
2381 // Some Ins[] entries become multiple ArgLoc[] entries.
2382 // Process them only once.
2383 if (index != lastInsIndex)
2384 {
2385 ISD::ArgFlagsTy Flags = Ins[index].Flags;
2386 // FIXME: For now, all byval parameter objects are marked mutable. This can be
2387 // changed with more analysis.
2388 // In case of tail call optimization mark all arguments mutable. Since they
2389 // could be overwritten by lowering of arguments in case of a tail call.
2390 if (Flags.isByVal()) {
2391 int FI = MFI->CreateFixedObject(Flags.getByValSize(),
2392 VA.getLocMemOffset(), false);
2393 InVals.push_back(DAG.getFrameIndex(FI, getPointerTy()));
2394 } else {
2395 int FI = MFI->CreateFixedObject(VA.getLocVT().getSizeInBits()/8,
2396 VA.getLocMemOffset(), true);
2397
2398 // Create load nodes to retrieve arguments from the stack.
2399 SDValue FIN = DAG.getFrameIndex(FI, getPointerTy());
2400 InVals.push_back(DAG.getLoad(VA.getValVT(), dl, Chain, FIN,
2401 MachinePointerInfo::getFixedStack(FI),
2402 false, false, 0));
2403 }
2404 lastInsIndex = index;
2405 }
23742406 }
23752407 }
23762408
434434 DebugLoc dl, SelectionDAG &DAG,
435435 SmallVectorImpl &InVals) const;
436436
437 /// HandleByVal - Target-specific cleanup for ByVal support.
438 virtual void HandleByVal(CCState *) const;
439
437440 /// IsEligibleForTailCallOptimization - Check whether the call is eligible
438441 /// for tail call optimization. Targets which want to do tail call
439442 /// optimization should implement this function.