llvm.org GIT mirror llvm / f1083d4
Take the code that was emitted for the llvm.eh.dispatch.setup intrinsic and emit it with the new SjLj emitter stuff. This way there's no need to emit that kind-of-hacky intrinsic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141419 91177308-0d34-0410-b5e6-96231b3b80d8 Bill Wendling 8 years ago
2 changed file(s) with 52 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
54905490 return BB;
54915491 }
54925492
5493 /// EmitBasePointerRecalculation - For functions using a base pointer, we
5494 /// rematerialize it (via the frame pointer).
5495 void ARMTargetLowering::
5496 EmitBasePointerRecalculation(MachineInstr *MI, MachineBasicBlock *MBB,
5497 MachineBasicBlock *DispatchBB) const {
5498 const TargetInstrInfo *TII = getTargetMachine().getInstrInfo();
5499 const ARMBaseInstrInfo *AII = static_cast(TII);
5500 MachineFunction &MF = *MI->getParent()->getParent();
5501 ARMFunctionInfo *AFI = MF.getInfo();
5502 const ARMBaseRegisterInfo &RI = AII->getRegisterInfo();
5503
5504 if (!RI.hasBasePointer(MF)) return;
5505
5506 MachineBasicBlock::iterator MBBI = MI;
5507
5508 int32_t NumBytes = AFI->getFramePtrSpillOffset();
5509 unsigned FramePtr = RI.getFrameRegister(MF);
5510 assert(MF.getTarget().getFrameLowering()->hasFP(MF) &&
5511 "Base pointer without frame pointer?");
5512
5513 if (AFI->isThumb2Function())
5514 llvm::emitT2RegPlusImmediate(*MBB, MBBI, MI->getDebugLoc(), ARM::R6,
5515 FramePtr, -NumBytes, ARMCC::AL, 0, *AII);
5516 else if (AFI->isThumbFunction())
5517 llvm::emitThumbRegPlusImmediate(*MBB, MBBI, MI->getDebugLoc(), ARM::R6,
5518 FramePtr, -NumBytes, *AII, RI);
5519 else
5520 llvm::emitARMRegPlusImmediate(*MBB, MBBI, MI->getDebugLoc(), ARM::R6,
5521 FramePtr, -NumBytes, ARMCC::AL, 0, *AII);
5522
5523 if (!RI.needsStackRealignment(MF)) return;
5524
5525 // If there's dynamic realignment, adjust for it.
5526 MachineFrameInfo *MFI = MF.getFrameInfo();
5527 unsigned MaxAlign = MFI->getMaxAlignment();
5528 assert(!AFI->isThumb1OnlyFunction());
5529
5530 // Emit bic r6, r6, MaxAlign
5531 unsigned bicOpc = AFI->isThumbFunction() ? ARM::t2BICri : ARM::BICri;
5532 AddDefaultCC(
5533 AddDefaultPred(
5534 BuildMI(*MBB, MBBI, MI->getDebugLoc(), TII->get(bicOpc), ARM::R6)
5535 .addReg(ARM::R6, RegState::Kill)
5536 .addImm(MaxAlign - 1)));
5537 }
5538
54935539 /// SetupEntryBlockForSjLj - Insert code into the entry block that creates and
54945540 /// registers the function context.
54955541 void ARMTargetLowering::
55235569 MachineMemOperand *FIMMOSt =
55245570 MF->getMachineMemOperand(MachinePointerInfo::getFixedStack(FI),
55255571 MachineMemOperand::MOStore, 4, 4);
5572
5573 EmitBasePointerRecalculation(MI, MBB, DispatchBB);
55265574
55275575 // Load the address of the dispatch MBB into the jump buffer.
55285576 if (isThumb2) {
57355783 .addFrameIndex(FI)
57365784 .addImm(1)
57375785 .addMemOperand(FIMMOLd));
5786
57385787 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::tCMPi8))
57395788 .addReg(NewVReg1)
57405789 .addImm(LPadList.size()));
511511 bool signExtend,
512512 ARMCC::CondCodes Cond) const;
513513
514 void EmitBasePointerRecalculation(MachineInstr *MI, MachineBasicBlock *MBB,
515 MachineBasicBlock *DispatchBB) const;
516
514517 void SetupEntryBlockForSjLj(MachineInstr *MI,
515518 MachineBasicBlock *MBB,
516519 MachineBasicBlock *DispatchBB, int FI) const;