llvm.org GIT mirror llvm / f016a03
Temporarily Revert "[MC] Defer asm errors to post-statement failure" as it's causing errors on the sanitizer bots. This reverts commit r281249. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281280 91177308-0d34-0410-b5e6-96231b3b80d8 Eric Christopher 3 years ago
16 changed file(s) with 849 addition(s) and 536 deletion(s). Raw diff Collapse all Expand all
143143 const char *TokStart;
144144 bool SkipSpace;
145145 bool AllowAtInIdentifier;
146 bool IsAtStartOfStatement;
147146
148147 MCAsmLexer();
149148
163162 /// the main input file has been reached.
164163 const AsmToken &Lex() {
165164 assert(!CurTok.empty());
166 // Mark if we parsing out a EndOfStatement.
167 IsAtStartOfStatement = CurTok.front().getKind() == AsmToken::EndOfStatement;
168165 CurTok.erase(CurTok.begin());
169166 // LexToken may generate multiple tokens via UnLex but will always return
170167 // the first one. Place returned value at head of CurTok vector.
176173 }
177174
178175 void UnLex(AsmToken const &Token) {
179 IsAtStartOfStatement = false;
180176 CurTok.insert(CurTok.begin(), Token);
181177 }
182
183 bool isAtStartOfStatement() { return IsAtStartOfStatement; }
184178
185179 virtual StringRef LexUntilEndOfStatement() = 0;
186180
1010 #define LLVM_MC_MCPARSER_MCASMPARSER_H
1111
1212 #include "llvm/ADT/ArrayRef.h"
13 #include "llvm/ADT/SmallString.h"
1413 #include "llvm/ADT/StringRef.h"
15 #include "llvm/ADT/Twine.h"
1614 #include "llvm/MC/MCParser/AsmLexer.h"
1715 #include "llvm/Support/DataTypes.h"
1816
6866 typedef std::pair
6967 ExtensionDirectiveHandler;
7068
71 struct MCPendingError {
72 SMLoc Loc;
73 SmallString<64> Msg;
74 SMRange Range;
75 };
76
7769 private:
7870 MCAsmParser(const MCAsmParser &) = delete;
7971 void operator=(const MCAsmParser &) = delete;
8476
8577 protected: // Can only create subclasses.
8678 MCAsmParser();
87
88 bool HadError;
89
90 SmallVector PendingErrors;
91 /// Flag tracking whether any errors have been encountered.
9279
9380 public:
9481 virtual ~MCAsmParser();
134121 const MCInstPrinter *IP, MCAsmParserSemaCallback &SI) = 0;
135122
136123 /// \brief Emit a note at the location \p L, with the message \p Msg.
137 virtual void Note(SMLoc L, const Twine &Msg, SMRange Range = None) = 0;
124 virtual void Note(SMLoc L, const Twine &Msg,
125 ArrayRef Ranges = None) = 0;
138126
139127 /// \brief Emit a warning at the location \p L, with the message \p Msg.
140128 ///
141129 /// \return The return value is true, if warnings are fatal.
142 virtual bool Warning(SMLoc L, const Twine &Msg, SMRange Range = None) = 0;
143
144 /// \brief Return an error at the location \p L, with the message \p Msg. This
145 /// may be modified before being emitted.
130 virtual bool Warning(SMLoc L, const Twine &Msg,
131 ArrayRef Ranges = None) = 0;
132
133 /// \brief Emit an error at the location \p L, with the message \p Msg.
146134 ///
147135 /// \return The return value is always true, as an idiomatic convenience to
148136 /// clients.
149 bool Error(SMLoc L, const Twine &Msg, SMRange Range = None);
150
151 /// \brief Emit an error at the location \p L, with the message \p Msg.
152 ///
153 /// \return The return value is always true, as an idiomatic convenience to
154 /// clients.
155 virtual bool printError(SMLoc L, const Twine &Msg, SMRange Range = None) = 0;
156
157 bool hasPendingError() { return !PendingErrors.empty(); }
158
159 bool printPendingErrors() {
160 bool rv = !PendingErrors.empty();
161 for (auto Err : PendingErrors) {
162 printError(Err.Loc, Twine(Err.Msg), Err.Range);
163 }
164 PendingErrors.clear();
165 return rv;
166 }
137 virtual bool Error(SMLoc L, const Twine &Msg,
138 ArrayRef Ranges = None) = 0;
167139
168140 /// \brief Get the next AsmToken in the stream, possibly handling file
169141 /// inclusion first.
173145 const AsmToken &getTok() const;
174146
175147 /// \brief Report an error at the current lexer location.
176 bool TokError(const Twine &Msg, SMRange Range = None);
148 bool TokError(const Twine &Msg, ArrayRef Ranges = None);
177149
178150 bool parseTokenLoc(SMLoc &Loc);
179151 bool parseToken(AsmToken::TokenKind T, const Twine &Msg);
1414 #ifndef LLVM_SUPPORT_SMLOC_H
1515 #define LLVM_SUPPORT_SMLOC_H
1616
17 #include "llvm/ADT/None.h"
1817 #include
1918
2019 namespace llvm {
5049 SMLoc Start, End;
5150
5251 SMRange() {}
53 SMRange(NoneType) : Start(), End() {}
5452 SMRange(SMLoc St, SMLoc En) : Start(St), End(En) {
5553 assert(Start.isValid() == End.isValid() &&
5654 "Start and end should either both be valid or both be invalid!");
177177 /// \brief Keeps track of how many .macro's have been instantiated.
178178 unsigned NumOfMacroInstantiations;
179179
180 /// Flag tracking whether any errors have been encountered.
181 unsigned HadError : 1;
182
180183 /// The values from the last parsed cpp hash file line comment if any.
181184 struct CppHashInfoTy {
182185 StringRef Filename;
243246 AssemblerDialect = i;
244247 }
245248
246 void Note(SMLoc L, const Twine &Msg, SMRange Range = None) override;
247 bool Warning(SMLoc L, const Twine &Msg, SMRange Range = None) override;
248 bool printError(SMLoc L, const Twine &Msg, SMRange Range = None) override;
249 void Note(SMLoc L, const Twine &Msg,
250 ArrayRef Ranges = None) override;
251 bool Warning(SMLoc L, const Twine &Msg,
252 ArrayRef Ranges = None) override;
253 bool Error(SMLoc L, const Twine &Msg,
254 ArrayRef Ranges = None) override;
249255
250256 const AsmToken &Lex() override;
251257
330336
331337 void printMacroInstantiations();
332338 void printMessage(SMLoc Loc, SourceMgr::DiagKind Kind, const Twine &Msg,
333 SMRange Range = None) const {
334 ArrayRef Ranges(Range);
339 ArrayRef Ranges = None) const {
335340 SrcMgr.PrintMessage(Loc, Kind, Msg, Ranges);
336341 }
337342 static void DiagHandler(const SMDiagnostic &Diag, void *Context);
559564 const MCAsmInfo &MAI)
560565 : Lexer(MAI), Ctx(Ctx), Out(Out), MAI(MAI), SrcMgr(SM),
561566 PlatformParser(nullptr), CurBuffer(SM.getMainFileID()),
562 MacrosEnabledFlag(true), CppHashInfo(), AssemblerDialect(~0U),
563 IsDarwin(false), ParsingInlineAsm(false) {
567 MacrosEnabledFlag(true), HadError(false), CppHashInfo(),
568 AssemblerDialect(~0U), IsDarwin(false), ParsingInlineAsm(false) {
564569 // Save the old handler.
565570 SavedDiagHandler = SrcMgr.getDiagHandler();
566571 SavedDiagContext = SrcMgr.getDiagContext();
603608 "while in macro instantiation");
604609 }
605610
606 void AsmParser::Note(SMLoc L, const Twine &Msg, SMRange Range) {
607 printPendingErrors();
608 printMessage(L, SourceMgr::DK_Note, Msg, Range);
611 void AsmParser::Note(SMLoc L, const Twine &Msg, ArrayRef Ranges) {
612 printMessage(L, SourceMgr::DK_Note, Msg, Ranges);
609613 printMacroInstantiations();
610614 }
611615
612 bool AsmParser::Warning(SMLoc L, const Twine &Msg, SMRange Range) {
616 bool AsmParser::Warning(SMLoc L, const Twine &Msg, ArrayRef Ranges) {
613617 if(getTargetParser().getTargetOptions().MCNoWarn)
614618 return false;
615619 if (getTargetParser().getTargetOptions().MCFatalWarnings)
616 return Error(L, Msg, Range);
617 printMessage(L, SourceMgr::DK_Warning, Msg, Range);
620 return Error(L, Msg, Ranges);
621 printMessage(L, SourceMgr::DK_Warning, Msg, Ranges);
618622 printMacroInstantiations();
619623 return false;
620624 }
621625
622 bool AsmParser::printError(SMLoc L, const Twine &Msg, SMRange Range) {
626 bool AsmParser::Error(SMLoc L, const Twine &Msg, ArrayRef Ranges) {
623627 HadError = true;
624 printMessage(L, SourceMgr::DK_Error, Msg, Range);
628 printMessage(L, SourceMgr::DK_Error, Msg, Ranges);
625629 printMacroInstantiations();
626630 return true;
627631 }
726730 if (!parseStatement(Info, nullptr))
727731 continue;
728732
729 // If we have a Lexer Error we are on an Error Token. Load in Lexer Error
730 // for printing ErrMsg via Lex() only if no (presumably better) parser error
731 // exists.
732 if (!hasPendingError() && Lexer.getTok().is(AsmToken::Error)) {
733 // If we've failed, but on a Error Token, but did not consume it in
734 // favor of a better message, emit it now.
735 if (Lexer.getTok().is(AsmToken::Error)) {
733736 Lex();
734737 }
735738
736 // parseStatement returned true so may need to emit an error.
737 printPendingErrors();
738
739 // Skipping to the next line if needed.
740 if (!getLexer().isAtStartOfStatement())
741 eatToEndOfStatement();
742 }
743
744 // All errors should have been emitted.
745 assert(!hasPendingError() && "unexpected error from parseStatement");
739 // We had an error, validate that one was emitted and recover by skipping to
740 // the next line.
741 assert(HadError && "Parse statement returned an error, but none emitted!");
742 eatToEndOfStatement();
743 }
746744
747745 getTargetParser().flushPendingInstructions(getStreamer());
748746
749747 if (TheCondState.TheCond != StartingCondState.TheCond ||
750748 TheCondState.Ignore != StartingCondState.Ignore)
751 printError(getTok().getLoc(), "unmatched .ifs or .elses");
749 return TokError("unmatched .ifs or .elses");
750
752751 // Check to see there are no empty DwarfFile slots.
753752 const auto &LineTables = getContext().getMCDwarfLineTables();
754753 if (!LineTables.empty()) {
755754 unsigned Index = 0;
756755 for (const auto &File : LineTables.begin()->second.getMCDwarfFiles()) {
757756 if (File.Name.empty() && Index != 0)
758 printError(getTok().getLoc(), "unassigned file number: " +
759 Twine(Index) +
760 " for .file directives");
757 TokError("unassigned file number: " + Twine(Index) +
758 " for .file directives");
761759 ++Index;
762760 }
763761 }
777775 // FIXME: We would really like to refer back to where the symbol was
778776 // first referenced for a source location. We need to add something
779777 // to track that. Currently, we just point to the end of the file.
780 printError(getTok().getLoc(), "assembler local symbol '" +
781 Sym->getName() + "' not defined");
778 HadError |=
779 Error(getTok().getLoc(), "assembler local symbol '" +
780 Sym->getName() + "' not defined");
782781 }
783782 }
784783
789788 // Reset the state of any "# line file" directives we've seen to the
790789 // context as it was at the diagnostic site.
791790 CppHashInfo = std::get<1>(LocSym);
792 printError(std::get<0>(LocSym), "directional label undefined");
791 HadError |= Error(std::get<0>(LocSym), "directional label undefined");
793792 }
794793 }
795794 }
804803
805804 void AsmParser::checkForValidSection() {
806805 if (!ParsingInlineAsm && !getStreamer().getCurrentSection().first) {
807 printError(getTok().getLoc(),
808 "expected section directive before assembly directive");
806 TokError("expected section directive before assembly directive");
809807 Out.InitSections(false);
810808 }
811809 }
14361434 /// ::= Label* Identifier OperandList* EndOfStatement
14371435 bool AsmParser::parseStatement(ParseStatementInfo &Info,
14381436 MCAsmParserSemaCallback *SI) {
1439 assert(!hasPendingError() && "parseStatement started with pending error");
14401437 // Eat initial spaces and comments
14411438 while (Lexer.is(AsmToken::Space))
14421439 Lex();
14691466 if (Lexer.is(AsmToken::Integer)) {
14701467 LocalLabelVal = getTok().getIntVal();
14711468 if (LocalLabelVal < 0) {
1472 if (!TheCondState.Ignore) {
1473 Lex(); // always eat a token
1474 return Error(IDLoc, "unexpected token at start of statement");
1475 }
1469 if (!TheCondState.Ignore)
1470 return TokError("unexpected token at start of statement");
14761471 IDVal = "";
14771472 } else {
14781473 IDVal = getTok().getString();
14791474 Lex(); // Consume the integer token to be used as an identifier token.
14801475 if (Lexer.getKind() != AsmToken::Colon) {
1481 if (!TheCondState.Ignore) {
1482 Lex(); // always eat a token
1483 return Error(IDLoc, "unexpected token at start of statement");
1484 }
1476 if (!TheCondState.Ignore)
1477 return TokError("unexpected token at start of statement");
14851478 }
14861479 }
14871480 } else if (Lexer.is(AsmToken::Dot)) {
14981491 Lex();
14991492 IDVal = "}";
15001493 } else if (parseIdentifier(IDVal)) {
1501 if (!TheCondState.Ignore) {
1502 Lex(); // always eat a token
1503 return Error(IDLoc, "unexpected token at start of statement");
1504 }
1494 if (!TheCondState.Ignore)
1495 return TokError("unexpected token at start of statement");
15051496 IDVal = "";
15061497 }
15071498
16631654
16641655 getTargetParser().flushPendingInstructions(getStreamer());
16651656
1666 SMLoc StartTokLoc = getTok().getLoc();
1667 bool TPDirectiveReturn = getTargetParser().ParseDirective(ID);
1668
1669 if (hasPendingError())
1670 return true;
1671 // Currently the return value should be true if we are
1672 // uninterested but as this is at odds with the standard parsing
1673 // convention (return true = error) we have instances of a parsed
1674 // directive that fails returning true as an error. Catch these
1675 // cases as best as possible errors here.
1676 if (TPDirectiveReturn && StartTokLoc != getTok().getLoc())
1677 return true;
1678 // Return if we did some parsing or believe we succeeded.
1679 if (!TPDirectiveReturn || StartTokLoc != getTok().getLoc())
1657 // First query the target-specific parser. It will return 'true' if it
1658 // isn't interested in this directive.
1659 if (!getTargetParser().ParseDirective(ID))
16801660 return false;
16811661
16821662 // Next, check the extension directive map to see if any extension has
19311911 // Canonicalize the opcode to lower case.
19321912 std::string OpcodeStr = IDVal.lower();
19331913 ParseInstructionInfo IInfo(Info.AsmRewrites);
1934 bool ParseHadError = getTargetParser().ParseInstruction(IInfo, OpcodeStr, ID,
1935 Info.ParsedOperands);
1936 Info.ParseError = ParseHadError;
1914 bool HadError = getTargetParser().ParseInstruction(IInfo, OpcodeStr, ID,
1915 Info.ParsedOperands);
1916 Info.ParseError = HadError;
19371917
19381918 // Dump the parsed representation, if requested.
19391919 if (getShowParsedOperands()) {
19501930 printMessage(IDLoc, SourceMgr::DK_Note, OS.str());
19511931 }
19521932
1953 // Fail even if ParseInstruction erroneously returns false.
1954 if (hasPendingError() || ParseHadError)
1955 return true;
1956
19571933 // If we are generating dwarf for the current section then generate a .loc
19581934 // directive for the instruction.
1959 if (!ParseHadError && getContext().getGenDwarfForAssembly() &&
1935 if (!HadError && getContext().getGenDwarfForAssembly() &&
19601936 getContext().getGenDwarfSectionSyms().count(
19611937 getStreamer().getCurrentSection().first)) {
19621938 unsigned Line;
19981974 }
19991975
20001976 // If parsing succeeded, match the instruction.
2001 if (!ParseHadError) {
1977 if (!HadError) {
20021978 uint64_t ErrorInfo;
2003 if (getTargetParser().MatchAndEmitInstruction(IDLoc, Info.Opcode,
2004 Info.ParsedOperands, Out,
2005 ErrorInfo, ParsingInlineAsm))
2006 return true;
2007 }
1979 getTargetParser().MatchAndEmitInstruction(IDLoc, Info.Opcode,
1980 Info.ParsedOperands, Out,
1981 ErrorInfo, ParsingInlineAsm);
1982 }
1983
1984 // Don't skip the rest of the line, the instruction parser is responsible for
1985 // that.
20081986 return false;
20091987 }
20101988
20402018 "Lexing Cpp line comment: Expected String");
20412019 StringRef Filename = getTok().getString();
20422020 Lex();
2043
20442021 // Get rid of the enclosing quotes.
20452022 Filename = Filename.substr(1, Filename.size() - 2);
20462023
23752352 MCAsmMacroParameter FA;
23762353
23772354 if (Lexer.is(AsmToken::Identifier) && Lexer.peekTok().is(AsmToken::Equal)) {
2378 if (parseIdentifier(FA.Name))
2379 return Error(IDLoc, "invalid argument identifier for formal argument");
2380
2381 if (Lexer.isNot(AsmToken::Equal))
2382 return TokError("expected '=' after formal parameter identifier");
2383
2355 if (parseIdentifier(FA.Name)) {
2356 Error(IDLoc, "invalid argument identifier for formal argument");
2357 eatToEndOfStatement();
2358 return true;
2359 }
2360
2361 if (Lexer.isNot(AsmToken::Equal)) {
2362 TokError("expected '=' after formal parameter identifier");
2363 eatToEndOfStatement();
2364 return true;
2365 }
23842366 Lex();
23852367
23862368 NamedParametersFound = true;
23872369 }
23882370
2389 if (NamedParametersFound && FA.Name.empty())
2390 return Error(IDLoc, "cannot mix positional and keyword arguments");
2371 if (NamedParametersFound && FA.Name.empty()) {
2372 Error(IDLoc, "cannot mix positional and keyword arguments");
2373 eatToEndOfStatement();
2374 return true;
2375 }
23912376
23922377 bool Vararg = HasVararg && Parameter == (NParameters - 1);
23932378 if (parseMacroArgument(FA.Value, Vararg))
24022387
24032388 if (FAI >= NParameters) {
24042389 assert(M && "expected macro to be defined");
2405 return Error(IDLoc, "parameter named '" + FA.Name +
2406 "' does not exist for macro '" + M->Name + "'");
2390 Error(IDLoc,
2391 "parameter named '" + FA.Name + "' does not exist for macro '" +
2392 M->Name + "'");
2393 return true;
24072394 }
24082395 PI = FAI;
24092396 }
30042991 if (!HasFillExpr)
30052992 FillExpr = 0;
30062993
3007 // Always emit an alignment here even if we thrown an error.
3008 bool ReturnVal = false;
3009
30102994 // Compute alignment in bytes.
30112995 if (IsPow2) {
30122996 // FIXME: Diagnose overflow.
30132997 if (Alignment >= 32) {
3014 ReturnVal |= Error(AlignmentLoc, "invalid alignment value");
2998 Error(AlignmentLoc, "invalid alignment value");
30152999 Alignment = 31;
30163000 }
30173001
30233007 if (Alignment == 0)
30243008 Alignment = 1;
30253009 if (!isPowerOf2_64(Alignment))
3026 ReturnVal |= Error(AlignmentLoc, "alignment must be a power of 2");
3010 Error(AlignmentLoc, "alignment must be a power of 2");
30273011 }
30283012
30293013 // Diagnose non-sensical max bytes to align.
30303014 if (MaxBytesLoc.isValid()) {
30313015 if (MaxBytesToFill < 1) {
3032 ReturnVal |= Error(MaxBytesLoc,
3033 "alignment directive can never be satisfied in this "
3016 Error(MaxBytesLoc, "alignment directive can never be satisfied in this "
30343017 "many bytes, ignoring maximum bytes expression");
30353018 MaxBytesToFill = 0;
30363019 }
30563039 MaxBytesToFill);
30573040 }
30583041
3059 return ReturnVal;
3042 return false;
30603043 }
30613044
30623045 /// parseDirectiveFile
31103093 getContext().setGenDwarfForAssembly(false);
31113094 else if (getStreamer().EmitDwarfFileDirective(FileNumber, Directory, Filename) ==
31123095 0)
3113 return Error(FileNumberLoc, "file number already allocated");
3096 Error(FileNumberLoc, "file number already allocated");
31143097 }
31153098
31163099 return false;
33623345
33633346 if (!getStreamer().EmitCVInlineSiteIdDirective(FunctionId, IAFunc, IAFile,
33643347 IALine, IACol, FunctionIdLoc))
3365 return Error(FunctionIdLoc, "function id already allocated");
3348 Error(FunctionIdLoc, "function id already allocated");
33663349
33673350 return false;
33683351 }
43564339 return true;
43574340
43584341 if (Str.empty())
4359 return Error(Loc, ".abort detected. Assembly stopping.");
4342 Error(Loc, ".abort detected. Assembly stopping.");
43604343 else
4361 return Error(Loc, ".abort '" + Str + "' detected. Assembly stopping.");
4344 Error(Loc, ".abort '" + Str + "' detected. Assembly stopping.");
43624345 // FIXME: Actually abort assembly here.
43634346
43644347 return false;
45034486 bool AsmParser::parseDirectiveIfeqs(SMLoc DirectiveLoc, bool ExpectEqual) {
45044487 if (Lexer.isNot(AsmToken::String)) {
45054488 if (ExpectEqual)
4506 return TokError("expected string parameter for '.ifeqs' directive");
4507 return TokError("expected string parameter for '.ifnes' directive");
4489 TokError("expected string parameter for '.ifeqs' directive");
4490 else
4491 TokError("expected string parameter for '.ifnes' directive");
4492 eatToEndOfStatement();
4493 return true;
45084494 }
45094495
45104496 StringRef String1 = getTok().getStringContents();
45124498
45134499 if (Lexer.isNot(AsmToken::Comma)) {
45144500 if (ExpectEqual)
4515 return TokError(
4516 "expected comma after first string for '.ifeqs' directive");
4517 return TokError("expected comma after first string for '.ifnes' directive");
4501 TokError("expected comma after first string for '.ifeqs' directive");
4502 else
4503 TokError("expected comma after first string for '.ifnes' directive");
4504 eatToEndOfStatement();
4505 return true;
45184506 }
45194507
45204508 Lex();
45214509
45224510 if (Lexer.isNot(AsmToken::String)) {
45234511 if (ExpectEqual)
4524 return TokError("expected string parameter for '.ifeqs' directive");
4525 return TokError("expected string parameter for '.ifnes' directive");
4512 TokError("expected string parameter for '.ifeqs' directive");
4513 else
4514 TokError("expected string parameter for '.ifnes' directive");
4515 eatToEndOfStatement();
4516 return true;
45264517 }
45274518
45284519 StringRef String2 = getTok().getStringContents();
45674558 bool AsmParser::parseDirectiveElseIf(SMLoc DirectiveLoc) {
45684559 if (TheCondState.TheCond != AsmCond::IfCond &&
45694560 TheCondState.TheCond != AsmCond::ElseIfCond)
4570 return Error(DirectiveLoc, "Encountered a .elseif that doesn't follow an"
4571 " .if or an .elseif");
4561 Error(DirectiveLoc, "Encountered a .elseif that doesn't follow a .if or "
4562 " an .elseif");
45724563 TheCondState.TheCond = AsmCond::ElseIfCond;
45734564
45744565 bool LastIgnoreState = false;
46024593
46034594 if (TheCondState.TheCond != AsmCond::IfCond &&
46044595 TheCondState.TheCond != AsmCond::ElseIfCond)
4605 return Error(DirectiveLoc, "Encountered a .else that doesn't follow "
4606 " an .if or an .elseif");
4596 Error(DirectiveLoc, "Encountered a .else that doesn't follow a .if or an "
4597 ".elseif");
46074598 TheCondState.TheCond = AsmCond::ElseCond;
46084599 bool LastIgnoreState = false;
46094600 if (!TheCondStack.empty())
46454636
46464637 StringRef Message = ".error directive invoked in source file";
46474638 if (Lexer.isNot(AsmToken::EndOfStatement)) {
4648 if (Lexer.isNot(AsmToken::String))
4649 return TokError(".error argument must be a string");
4639 if (Lexer.isNot(AsmToken::String)) {
4640 TokError(".error argument must be a string");
4641 eatToEndOfStatement();
4642 return true;
4643 }
46504644
46514645 Message = getTok().getStringContents();
46524646 Lex();
46534647 }
46544648
4655 return Error(L, Message);
4649 Error(L, Message);
4650 return true;
46564651 }
46574652
46584653 /// parseDirectiveWarning
46674662
46684663 StringRef Message = ".warning directive invoked in source file";
46694664 if (Lexer.isNot(AsmToken::EndOfStatement)) {
4670 if (Lexer.isNot(AsmToken::String))
4671 return TokError(".warning argument must be a string");
4665 if (Lexer.isNot(AsmToken::String)) {
4666 TokError(".warning argument must be a string");
4667 eatToEndOfStatement();
4668 return true;
4669 }
46724670
46734671 Message = getTok().getStringContents();
46744672 Lex();
46754673 }
46764674
4677 return Warning(L, Message);
4675 Warning(L, Message);
4676 return false;
46784677 }
46794678
46804679 /// parseDirectiveEndIf
46854684 return true;
46864685
46874686 if ((TheCondState.TheCond == AsmCond::NoCond) || TheCondStack.empty())
4688 return Error(DirectiveLoc, "Encountered a .endif that doesn't follow "
4689 "an .if or .else");
4687 Error(DirectiveLoc, "Encountered a .endif that doesn't follow a .if or "
4688 ".else");
46904689 if (!TheCondStack.empty()) {
46914690 TheCondState = TheCondStack.back();
46924691 TheCondStack.pop_back();
48384837 while (true) {
48394838 // Check whether we have reached the end of the file.
48404839 if (getLexer().is(AsmToken::Eof)) {
4841 printError(DirectiveLoc, "no matching '.endr' in definition");
4840 Error(DirectiveLoc, "no matching '.endr' in definition");
48424841 return nullptr;
48434842 }
48444843
48554854 EndToken = getTok();
48564855 Lex();
48574856 if (Lexer.isNot(AsmToken::EndOfStatement)) {
4858 printError(getTok().getLoc(),
4859 "unexpected token in '.endr' directive");
4857 TokError("unexpected token in '.endr' directive");
48604858 return nullptr;
48614859 }
48624860 break;
49064904
49074905 int64_t Count;
49084906 if (!CountExpr->evaluateAsAbsolute(Count)) {
4907 eatToEndOfStatement();
49094908 return Error(CountLoc, "unexpected token in '" + Dir + "' directive");
49104909 }
49114910
51085107 continue;
51095108
51105109 ParseStatementInfo Info(&AsmStrRewrites);
5111 bool StatementErr = parseStatement(Info, &SI);
5112
5113 if (StatementErr || Info.ParseError) {
5114 // Emit pending errors if any exist.
5115 printPendingErrors();
5110 if (parseStatement(Info, &SI))
51165111 return true;
5117 }
5118
5119 // No pending error should exist here.
5120 assert(!hasPendingError() && "unexpected error from parseStatement");
5112
5113 if (Info.ParseError)
5114 return true;
51215115
51225116 if (Info.Opcode == ~0U)
51235117 continue;
53445338
53455339 if (Parser.parseExpression(Value)) {
53465340 Parser.TokError("missing expression");
5341 Parser.eatToEndOfStatement();
53475342 return true;
53485343 }
53495344
1111
1212 using namespace llvm;
1313
14 MCAsmLexer::MCAsmLexer()
15 : TokStart(nullptr), SkipSpace(true), IsAtStartOfStatement(true) {
14 MCAsmLexer::MCAsmLexer() : TokStart(nullptr), SkipSpace(true) {
1615 CurTok.emplace_back(AsmToken::Space, StringRef());
1716 }
1817
1616 #include "llvm/Support/raw_ostream.h"
1717 using namespace llvm;
1818
19 MCAsmParser::MCAsmParser()
20 : TargetParser(nullptr), ShowParsedOperands(0), PendingErrors() {}
19 MCAsmParser::MCAsmParser() : TargetParser(nullptr), ShowParsedOperands(0) {
20 }
2121
2222 MCAsmParser::~MCAsmParser() {
2323 }
8383 return false;
8484 }
8585
86 bool MCAsmParser::TokError(const Twine &Msg, SMRange Range) {
87 return Error(getLexer().getLoc(), Msg, Range);
88 }
89
90 bool MCAsmParser::Error(SMLoc L, const Twine &Msg, SMRange Range) {
91 HadError = true;
92
93 MCPendingError PErr;
94 PErr.Loc = L;
95 Msg.toVector(PErr.Msg);
96 PErr.Range = Range;
97 PendingErrors.push_back(PErr);
86 bool MCAsmParser::TokError(const Twine &Msg, ArrayRef Ranges) {
87 Error(getLexer().getLoc(), Msg, Ranges);
9888 return true;
9989 }
10090
27012701 }
27022702
27032703 if (getLexer().isNot(AsmToken::EndOfStatement)) {
2704 Parser.eatToEndOfStatement();
27042705 return TokError("unexpected token in argument list");
27052706 }
27062707
33203321 // IC, DC, AT, and TLBI instructions are aliases for the SYS instruction.
33213322 if (Head == "ic" || Head == "dc" || Head == "at" || Head == "tlbi") {
33223323 bool IsError = parseSysAlias(Head, NameLoc, Operands);
3324 if (IsError && getLexer().isNot(AsmToken::EndOfStatement))
3325 Parser.eatToEndOfStatement();
33233326 return IsError;
33243327 }
33253328
33763379 if (getLexer().isNot(AsmToken::EndOfStatement)) {
33773380 // Read the first operand.
33783381 if (parseOperand(Operands, false, false)) {
3382 Parser.eatToEndOfStatement();
33793383 return true;
33803384 }
33813385
33883392 (N == 3 && condCodeThirdOperand) ||
33893393 (N == 2 && condCodeSecondOperand),
33903394 condCodeSecondOperand || condCodeThirdOperand)) {
3395 Parser.eatToEndOfStatement();
33913396 return true;
33923397 }
33933398
34193424
34203425 if (getLexer().isNot(AsmToken::EndOfStatement)) {
34213426 SMLoc Loc = Parser.getTok().getLoc();
3427 Parser.eatToEndOfStatement();
34223428 return Error(Loc, "unexpected token in argument list");
34233429 }
34243430
41764182 if (IDVal == ".inst")
41774183 return parseDirectiveInst(Loc);
41784184 }
4179 if (IDVal == MCLOHDirectiveName())
4180 return parseDirectiveLOH(IDVal, Loc);
4181
4182 return true;
4185
4186 return parseDirectiveLOH(IDVal, Loc);
41834187 }
41844188
41854189 static const struct {
43404344 bool AArch64AsmParser::parseDirectiveInst(SMLoc Loc) {
43414345 MCAsmParser &Parser = getParser();
43424346 if (getLexer().is(AsmToken::EndOfStatement)) {
4347 Parser.eatToEndOfStatement();
43434348 Error(Loc, "expected expression following directive");
43444349 return false;
43454350 }
43974402 /// ::= .loh label1, ..., labelN
43984403 /// The number of arguments depends on the loh identifier.
43994404 bool AArch64AsmParser::parseDirectiveLOH(StringRef IDVal, SMLoc Loc) {
4405 if (IDVal != MCLOHDirectiveName())
4406 return true;
44004407 MCLOHType Kind;
44014408 if (getParser().getTok().isNot(AsmToken::Identifier)) {
44024409 if (getParser().getTok().isNot(AsmToken::Integer))
44044411 // We successfully get a numeric value for the identifier.
44054412 // Check if it is valid.
44064413 int64_t Id = getParser().getTok().getIntVal();
4407 if (Id <= -1U && !isValidMCLOHType(Id)) {
4408 TokError("invalid numeric identifier in directive");
4409 return false;
4410 }
4414 if (Id <= -1U && !isValidMCLOHType(Id))
4415 return TokError("invalid numeric identifier in directive");
44114416 Kind = (MCLOHType)Id;
44124417 } else {
44134418 StringRef Name = getTok().getIdentifier();
44654470 if (RegNum == static_cast(-1)) {
44664471 StringRef Kind;
44674472 RegNum = tryMatchVectorRegister(Kind, false);
4468 if (!Kind.empty())
4469 return Error(SRegLoc, "vector register without type specifier expected");
4473 if (!Kind.empty()) {
4474 Error(SRegLoc, "vector register without type specifier expected");
4475 return false;
4476 }
44704477 IsVector = true;
44714478 }
44724479
4473 if (RegNum == static_cast(-1))
4474 return Error(SRegLoc, "register name or alias expected");
4480 if (RegNum == static_cast(-1)) {
4481 Parser.eatToEndOfStatement();
4482 Error(SRegLoc, "register name or alias expected");
4483 return false;
4484 }
44754485
44764486 // Shouldn't be anything else.
4477 if (Parser.getTok().isNot(AsmToken::EndOfStatement))
4478 return Error(Parser.getTok().getLoc(),
4479 "unexpected input in .req directive");
4487 if (Parser.getTok().isNot(AsmToken::EndOfStatement)) {
4488 Error(Parser.getTok().getLoc(), "unexpected input in .req directive");
4489 Parser.eatToEndOfStatement();
4490 return false;
4491 }
44804492
44814493 Parser.Lex(); // Consume the EndOfStatement
44824494
44844496 if (RegisterReqs.insert(std::make_pair(Name, pair)).first->second != pair)
44854497 Warning(L, "ignoring redefinition of register alias '" + Name + "'");
44864498
4487 return false;
4499 return true;
44884500 }
44894501
44904502 /// parseDirectiveUneq
44934505 MCAsmParser &Parser = getParser();
44944506 if (Parser.getTok().isNot(AsmToken::Identifier)) {
44954507 Error(Parser.getTok().getLoc(), "unexpected input in .unreq directive.");
4508 Parser.eatToEndOfStatement();
44964509 return false;
44974510 }
44984511 RegisterReqs.erase(Parser.getTok().getIdentifier().lower());
338338 return;
339339 }
340340
341 void Note(SMLoc L, const Twine &Msg, SMRange Range = None) {
342 return getParser().Note(L, Msg, Range);
343 }
344 bool Warning(SMLoc L, const Twine &Msg, SMRange Range = None) {
345 return getParser().Warning(L, Msg, Range);
346 }
347 bool Error(SMLoc L, const Twine &Msg, SMRange Range = None) {
348 return getParser().Error(L, Msg, Range);
341 void Note(SMLoc L, const Twine &Msg, ArrayRef Ranges = None) {
342 return getParser().Note(L, Msg, Ranges);
343 }
344 bool Warning(SMLoc L, const Twine &Msg,
345 ArrayRef Ranges = None) {
346 return getParser().Warning(L, Msg, Ranges);
347 }
348 bool Error(SMLoc L, const Twine &Msg,
349 ArrayRef Ranges = None) {
350 return getParser().Error(L, Msg, Ranges);
349351 }
350352
351353 bool validatetLDMRegList(const MCInst &Inst, const OperandVector &Operands,
60056007
60066008 // In Thumb1, only the branch (B) instruction can be predicated.
60076009 if (isThumbOne() && PredicationCode != ARMCC::AL && Mnemonic != "b") {
6010 Parser.eatToEndOfStatement();
60086011 return Error(NameLoc, "conditional execution not supported in Thumb1");
60096012 }
60106013
60186021 if (Mnemonic == "it") {
60196022 SMLoc Loc = SMLoc::getFromPointer(NameLoc.getPointer() + 2);
60206023 if (ITMask.size() > 3) {
6024 Parser.eatToEndOfStatement();
60216025 return Error(Loc, "too many conditions on IT instruction");
60226026 }
60236027 unsigned Mask = 8;
60246028 for (unsigned i = ITMask.size(); i != 0; --i) {
60256029 char pos = ITMask[i - 1];
60266030 if (pos != 't' && pos != 'e') {
6031 Parser.eatToEndOfStatement();
60276032 return Error(Loc, "illegal IT block condition mask '" + ITMask + "'");
60286033 }
60296034 Mask >>= 1;
60496054 // If we had a carry-set on an instruction that can't do that, issue an
60506055 // error.
60516056 if (!CanAcceptCarrySet && CarrySetting) {
6057 Parser.eatToEndOfStatement();
60526058 return Error(NameLoc, "instruction '" + Mnemonic +
60536059 "' can not set flags, but 's' suffix specified");
60546060 }
60556061 // If we had a predication code on an instruction that can't do that, issue an
60566062 // error.
60576063 if (!CanAcceptPredicationCode && PredicationCode != ARMCC::AL) {
6064 Parser.eatToEndOfStatement();
60586065 return Error(NameLoc, "instruction '" + Mnemonic +
60596066 "' is not predicable, but condition code specified");
60606067 }
60986105 // For for ARM mode generate an error if the .n qualifier is used.
60996106 if (ExtraToken == ".n" && !isThumb()) {
61006107 SMLoc Loc = SMLoc::getFromPointer(NameLoc.getPointer() + Start);
6108 Parser.eatToEndOfStatement();
61016109 return Error(Loc, "instruction with .n (narrow) qualifier not allowed in "
61026110 "arm mode");
61036111 }
61156123 if (getLexer().isNot(AsmToken::EndOfStatement)) {
61166124 // Read the first operand.
61176125 if (parseOperand(Operands, Mnemonic)) {
6126 Parser.eatToEndOfStatement();
61186127 return true;
61196128 }
61206129
61236132
61246133 // Parse and remember the operand.
61256134 if (parseOperand(Operands, Mnemonic)) {
6135 Parser.eatToEndOfStatement();
61266136 return true;
61276137 }
61286138 }
61296139 }
61306140
61316141 if (getLexer().isNot(AsmToken::EndOfStatement)) {
6132 return TokError("unexpected token in argument list");
6142 SMLoc Loc = getLexer().getLoc();
6143 Parser.eatToEndOfStatement();
6144 return Error(Loc, "unexpected token in argument list");
61336145 }
61346146
61356147 Parser.Lex(); // Consume the EndOfStatement
93189330 for (;;) {
93199331 const MCExpr *Value;
93209332 if (getParser().parseExpression(Value)) {
9333 Parser.eatToEndOfStatement();
93219334 return false;
93229335 }
93239336
94209433
94219434 if (getLexer().isNot(AsmToken::EndOfStatement)) {
94229435 Error(Parser.getTok().getLoc(), "unexpected token in directive");
9436 Parser.eatToEndOfStatement();
94239437 return false;
94249438 }
94259439
95129526 unsigned Reg;
95139527 SMLoc SRegLoc, ERegLoc;
95149528 if (ParseRegister(Reg, SRegLoc, ERegLoc)) {
9529 Parser.eatToEndOfStatement();
95159530 Error(SRegLoc, "register name expected");
95169531 return false;
95179532 }
95189533
95199534 // Shouldn't be anything else.
95209535 if (Parser.getTok().isNot(AsmToken::EndOfStatement)) {
9536 Parser.eatToEndOfStatement();
95219537 Error(Parser.getTok().getLoc(), "unexpected input in .req directive.");
95229538 return false;
95239539 }
95379553 bool ARMAsmParser::parseDirectiveUnreq(SMLoc L) {
95389554 MCAsmParser &Parser = getParser();
95399555 if (Parser.getTok().isNot(AsmToken::Identifier)) {
9556 Parser.eatToEndOfStatement();
95409557 Error(L, "unexpected input in .unreq directive.");
95419558 return false;
95429559 }
96069623 Tag = ARMBuildAttrs::AttrTypeFromString(Name);
96079624 if (Tag == -1) {
96089625 Error(TagLoc, "attribute name not recognised: " + Name);
9626 Parser.eatToEndOfStatement();
96099627 return false;
96109628 }
96119629 Parser.Lex();
96149632
96159633 TagLoc = Parser.getTok().getLoc();
96169634 if (Parser.parseExpression(AttrExpr)) {
9635 Parser.eatToEndOfStatement();
96179636 return false;
96189637 }
96199638
96209639 const MCConstantExpr *CE = dyn_cast(AttrExpr);
96219640 if (!CE) {
96229641 Error(TagLoc, "expected numeric constant");
9642 Parser.eatToEndOfStatement();
96239643 return false;
96249644 }
96259645
96289648
96299649 if (Parser.getTok().isNot(AsmToken::Comma)) {
96309650 Error(Parser.getTok().getLoc(), "comma expected");
9651 Parser.eatToEndOfStatement();
96319652 return false;
96329653 }
96339654 Parser.Lex(); // skip comma
96549675 const MCExpr *ValueExpr;
96559676 SMLoc ValueExprLoc = Parser.getTok().getLoc();
96569677 if (Parser.parseExpression(ValueExpr)) {
9678 Parser.eatToEndOfStatement();
96579679 return false;
96589680 }
96599681
96609682 const MCConstantExpr *CE = dyn_cast(ValueExpr);
96619683 if (!CE) {
96629684 Error(ValueExprLoc, "expected numeric constant");
9685 Parser.eatToEndOfStatement();
96639686 return false;
96649687 }
96659688
96719694 IsStringValue = false;
96729695 if (Parser.getTok().isNot(AsmToken::Comma)) {
96739696 Error(Parser.getTok().getLoc(), "comma expected");
9697 Parser.eatToEndOfStatement();
96749698 return false;
96759699 } else {
96769700 Parser.Lex();
96809704 if (IsStringValue) {
96819705 if (Parser.getTok().isNot(AsmToken::String)) {
96829706 Error(Parser.getTok().getLoc(), "bad string constant");
9707 Parser.eatToEndOfStatement();
96839708 return false;
96849709 }
96859710
98239848 return false;
98249849 }
98259850 if (HasExistingPersonality) {
9851 Parser.eatToEndOfStatement();
98269852 Error(L, "multiple personality directives");
98279853 UC.emitPersonalityLocNotes();
98289854 return false;
98309856
98319857 // Parse the name of the personality routine
98329858 if (Parser.getTok().isNot(AsmToken::Identifier)) {
9859 Parser.eatToEndOfStatement();
98339860 Error(L, "unexpected input in .personality directive.");
98349861 return false;
98359862 }
1002910056 Width = 4;
1003010057 break;
1003110058 default:
10059 Parser.eatToEndOfStatement();
1003210060 Error(Loc, "cannot determine Thumb instruction size, "
1003310061 "use inst.n/inst.w instead");
1003410062 return false;
1003510063 }
1003610064 } else {
1003710065 if (Suffix) {
10066 Parser.eatToEndOfStatement();
1003810067 Error(Loc, "width suffixes are invalid in ARM mode");
1003910068 return false;
1004010069 }
1004210071 }
1004310072
1004410073 if (getLexer().is(AsmToken::EndOfStatement)) {
10074 Parser.eatToEndOfStatement();
1004510075 Error(Loc, "expected expression following directive");
1004610076 return false;
1004710077 }
1013310163 UC.recordPersonalityIndex(L);
1013410164
1013510165 if (!UC.hasFnStart()) {
10166 Parser.eatToEndOfStatement();
1013610167 Error(L, ".fnstart must precede .personalityindex directive");
1013710168 return false;
1013810169 }
1013910170 if (UC.cantUnwind()) {
10171 Parser.eatToEndOfStatement();
1014010172 Error(L, ".personalityindex cannot be used with .cantunwind");
1014110173 UC.emitCantUnwindLocNotes();
1014210174 return false;
1014310175 }
1014410176 if (UC.hasHandlerData()) {
10177 Parser.eatToEndOfStatement();
1014510178 Error(L, ".personalityindex must precede .handlerdata directive");
1014610179 UC.emitHandlerDataLocNotes();
1014710180 return false;
1014810181 }
1014910182 if (HasExistingPersonality) {
10183 Parser.eatToEndOfStatement();
1015010184 Error(L, "multiple personality directives");
1015110185 UC.emitPersonalityLocNotes();
1015210186 return false;
1015510189 const MCExpr *IndexExpression;
1015610190 SMLoc IndexLoc = Parser.getTok().getLoc();
1015710191 if (Parser.parseExpression(IndexExpression)) {
10192 Parser.eatToEndOfStatement();
1015810193 return false;
1015910194 }
1016010195
1016110196 const MCConstantExpr *CE = dyn_cast(IndexExpression);
1016210197 if (!CE) {
10198 Parser.eatToEndOfStatement();
1016310199 Error(IndexLoc, "index must be a constant number");
1016410200 return false;
1016510201 }
1016610202 if (CE->getValue() < 0 ||
1016710203 CE->getValue() >= ARM::EHABI::NUM_PERSONALITY_INDEX) {
10204 Parser.eatToEndOfStatement();
1016810205 Error(IndexLoc, "personality routine index should be in range [0-3]");
1016910206 return false;
1017010207 }
1017810215 bool ARMAsmParser::parseDirectiveUnwindRaw(SMLoc L) {
1017910216 MCAsmParser &Parser = getParser();
1018010217 if (!UC.hasFnStart()) {
10218 Parser.eatToEndOfStatement();
1018110219 Error(L, ".fnstart must precede .unwind_raw directives");
1018210220 return false;
1018310221 }
1018910227 if (getLexer().is(AsmToken::EndOfStatement) ||
1019010228 getParser().parseExpression(OffsetExpr)) {
1019110229 Error(OffsetLoc, "expected expression");
10230 Parser.eatToEndOfStatement();
1019210231 return false;
1019310232 }
1019410233
1019510234 const MCConstantExpr *CE = dyn_cast(OffsetExpr);
1019610235 if (!CE) {
1019710236 Error(OffsetLoc, "offset must be a constant");
10237 Parser.eatToEndOfStatement();
1019810238 return false;
1019910239 }
1020010240
1020210242
1020310243 if (getLexer().isNot(AsmToken::Comma)) {
1020410244 Error(getLexer().getLoc(), "expected comma");
10245 Parser.eatToEndOfStatement();
1020510246 return false;
1020610247 }
1020710248 Parser.Lex();
1021310254 SMLoc OpcodeLoc = getLexer().getLoc();
1021410255 if (getLexer().is(AsmToken::EndOfStatement) || Parser.parseExpression(OE)) {
1021510256 Error(OpcodeLoc, "expected opcode expression");
10257 Parser.eatToEndOfStatement();
1021610258 return false;
1021710259 }
1021810260
1021910261 const MCConstantExpr *OC = dyn_cast(OE);
1022010262 if (!OC) {
1022110263 Error(OpcodeLoc, "opcode value must be a constant");
10264 Parser.eatToEndOfStatement();
1022210265 return false;
1022310266 }
1022410267
1022510268 const int64_t Opcode = OC->getValue();
1022610269 if (Opcode & ~0xff) {
1022710270 Error(OpcodeLoc, "invalid opcode");
10271 Parser.eatToEndOfStatement();
1022810272 return false;
1022910273 }
1023010274
1023510279
1023610280 if (getLexer().isNot(AsmToken::Comma)) {
1023710281 Error(getLexer().getLoc(), "unexpected token in directive");
10282 Parser.eatToEndOfStatement();
1023810283 return false;
1023910284 }
1024010285
1025410299
1025510300 if (getLexer().isNot(AsmToken::Identifier)) {
1025610301 TokError("expected variable after '.tlsdescseq' directive");
10302 Parser.eatToEndOfStatement();
1025710303 return false;
1025810304 }
1025910305
1026410310
1026510311 if (getLexer().isNot(AsmToken::EndOfStatement)) {
1026610312 Error(Parser.getTok().getLoc(), "unexpected token");
10313 Parser.eatToEndOfStatement();
1026710314 return false;
1026810315 }
1026910316
1027610323 bool ARMAsmParser::parseDirectiveMovSP(SMLoc L) {
1027710324 MCAsmParser &Parser = getParser();
1027810325 if (!UC.hasFnStart()) {
10326 Parser.eatToEndOfStatement();
1027910327 Error(L, ".fnstart must precede .movsp directives");
1028010328 return false;
1028110329 }
1028210330 if (UC.getFPReg() != ARM::SP) {
10331 Parser.eatToEndOfStatement();
1028310332 Error(L, "unexpected .movsp directive");
1028410333 return false;
1028510334 }
1028710336 SMLoc SPRegLoc = Parser.getTok().getLoc();
1028810337 int SPReg = tryParseRegister();
1028910338 if (SPReg == -1) {
10339 Parser.eatToEndOfStatement();
1029010340 Error(SPRegLoc, "register expected");
1029110341 return false;
1029210342 }
1029310343
1029410344 if (SPReg == ARM::SP || SPReg == ARM::PC) {
10345 Parser.eatToEndOfStatement();
1029510346 Error(SPRegLoc, "sp and pc are not permitted in .movsp directive");
1029610347 return false;
1029710348 }
1030210353
1030310354 if (Parser.getTok().isNot(AsmToken::Hash)) {
1030410355 Error(Parser.getTok().getLoc(), "expected #constant");
10356 Parser.eatToEndOfStatement();
1030510357 return false;
1030610358 }
1030710359 Parser.Lex();
1030910361 const MCExpr *OffsetExpr;
1031010362 SMLoc OffsetLoc = Parser.getTok().getLoc();
1031110363 if (Parser.parseExpression(OffsetExpr)) {
10364 Parser.eatToEndOfStatement();
1031210365 Error(OffsetLoc, "malformed offset expression");
1031310366 return false;
1031410367 }
1031510368
1031610369 const MCConstantExpr *CE = dyn_cast(OffsetExpr);
1031710370 if (!CE) {
10371 Parser.eatToEndOfStatement();
1031810372 Error(OffsetLoc, "offset must be an immediate constant");
1031910373 return false;
1032010374 }
1033410388 MCAsmParser &Parser = getParser();
1033510389 if (getLexer().isNot(AsmToken::Identifier)) {
1033610390 Error(getLexer().getLoc(), "unexpected token");
10391 Parser.eatToEndOfStatement();
1033710392 return false;
1033810393 }
1033910394
1034510400
1034610401 if (ID == ARM::AK_INVALID) {
1034710402 Error(ArchLoc, "unknown architecture '" + Arch + "'");
10403 Parser.eatToEndOfStatement();
1034810404 return false;
1034910405 }
1035010406
1035210408
1035310409 if (getLexer().isNot(AsmToken::EndOfStatement)) {
1035410410 Error(getLexer().getLoc(), "unexpected token");
10411 Parser.eatToEndOfStatement();
1035510412 }
1035610413
1035710414 return false;
1038410441 StringRef Name;
1038510442 if (Parser.parseIdentifier(Name)) {
1038610443 TokError("expected identifier after '.thumb_set'");
10444 Parser.eatToEndOfStatement();
1038710445 return false;
1038810446 }
1038910447
1039010448 if (getLexer().isNot(AsmToken::Comma)) {
1039110449 TokError("expected comma after name '" + Name + "'");
10450 Parser.eatToEndOfStatement();
1039210451 return false;
1039310452 }
1039410453 Lex();
1045210511
1045310512 if (getLexer().isNot(AsmToken::Identifier)) {
1045410513 Error(getLexer().getLoc(), "expected architecture extension name");
10514 Parser.eatToEndOfStatement();
1045510515 return false;
1045610516 }
1045710517
1049710557 }
1049810558
1049910559 Error(ExtLoc, "unknown architectural extension: " + Name);
10560 Parser.eatToEndOfStatement();
1050010561 return false;
1050110562 }
1050210563
113113 uint64_t &ErrorInfo, bool MatchingInlineAsm) override;
114114
115115 unsigned validateTargetOperandClass(MCParsedAsmOperand &Op, unsigned Kind) override;
116 bool OutOfRange(SMLoc IDLoc, long long Val, long long Max);
116 void OutOfRange(SMLoc IDLoc, long long Val, long long Max);
117117 int processInstruction(MCInst &Inst, OperandVector const &Operands,
118118 SMLoc IDLoc);
119119
636636 uint64_t Err = Check.getError();
637637 if (Err != HexagonMCErrInfo::CHECK_SUCCESS) {
638638 if (HexagonMCErrInfo::CHECK_ERROR_BRANCHES & Err)
639 return Error(
640 IDLoc,
641 "unconditional branch cannot precede another branch in packet");
639 Error(IDLoc,
640 "unconditional branch cannot precede another branch in packet");
642641
643642 if (HexagonMCErrInfo::CHECK_ERROR_NEWP & Err ||
644643 HexagonMCErrInfo::CHECK_ERROR_NEWV & Err)
645 return Error(IDLoc, "register `" + R +
646 "' used with `.new' "
647 "but not validly modified in the same packet");
644 Error(IDLoc, "register `" + R +
645 "' used with `.new' "
646 "but not validly modified in the same packet");
648647
649648 if (HexagonMCErrInfo::CHECK_ERROR_REGISTERS & Err)
650 return Error(IDLoc, "register `" + R + "' modified more than once");
649 Error(IDLoc, "register `" + R + "' modified more than once");
651650
652651 if (HexagonMCErrInfo::CHECK_ERROR_READONLY & Err)
653 return Error(IDLoc, "cannot write to read-only register `" + R + "'");
652 Error(IDLoc, "cannot write to read-only register `" + R + "'");
654653
655654 if (HexagonMCErrInfo::CHECK_ERROR_LOOP & Err)
656 return Error(IDLoc, "loop-setup and some branch instructions "
657 "cannot be in the same packet");
655 Error(IDLoc, "loop-setup and some branch instructions "
656 "cannot be in the same packet");
658657
659658 if (HexagonMCErrInfo::CHECK_ERROR_ENDLOOP & Err) {
660659 Twine N(HexagonMCInstrInfo::isInnerLoop(MCB) ? '0' : '1');
661 return Error(IDLoc,
662 "packet marked with `:endloop" + N + "' " +
660 Error(IDLoc, "packet marked with `:endloop" + N + "' " +
663661 "cannot contain instructions that modify register " +
664662 "`" + R + "'");
665663 }
666664
667665 if (HexagonMCErrInfo::CHECK_ERROR_SOLO & Err)
668 return Error(
669 IDLoc,
670 "instruction cannot appear in packet with other instructions");
666 Error(IDLoc,
667 "instruction cannot appear in packet with other instructions");
671668
672669 if (HexagonMCErrInfo::CHECK_ERROR_NOSLOTS & Err)
673 return Error(IDLoc, "too many slots used in packet");
670 Error(IDLoc, "too many slots used in packet");
674671
675672 if (Err & HexagonMCErrInfo::CHECK_ERROR_SHUFFLE) {
676673 uint64_t Erm = Check.getShuffleError();
677674
678675 if (HexagonShuffler::SHUFFLE_ERROR_INVALID == Erm)
679 return Error(IDLoc, "invalid instruction packet");
676 Error(IDLoc, "invalid instruction packet");
680677 else if (HexagonShuffler::SHUFFLE_ERROR_STORES == Erm)
681 return Error(IDLoc, "invalid instruction packet: too many stores");
678 Error(IDLoc, "invalid instruction packet: too many stores");
682679 else if (HexagonShuffler::SHUFFLE_ERROR_LOADS == Erm)
683 return Error(IDLoc, "invalid instruction packet: too many loads");
680 Error(IDLoc, "invalid instruction packet: too many loads");
684681 else if (HexagonShuffler::SHUFFLE_ERROR_BRANCHES == Erm)
685 return Error(IDLoc, "too many branches in packet");
682 Error(IDLoc, "too many branches in packet");
686683 else if (HexagonShuffler::SHUFFLE_ERROR_NOSLOTS == Erm)
687 return Error(IDLoc, "invalid instruction packet: out of slots");
684 Error(IDLoc, "invalid instruction packet: out of slots");
688685 else if (HexagonShuffler::SHUFFLE_ERROR_SLOTS == Erm)
689 return Error(IDLoc, "invalid instruction packet: slot error");
686 Error(IDLoc, "invalid instruction packet: slot error");
690687 else if (HexagonShuffler::SHUFFLE_ERROR_ERRATA2 == Erm)
691 return Error(IDLoc, "v60 packet violation");
688 Error(IDLoc, "v60 packet violation");
692689 else if (HexagonShuffler::SHUFFLE_ERROR_STORE_LOAD_CONFLICT == Erm)
693 return Error(IDLoc, "slot 0 instruction does not allow slot 1 store");
690 Error(IDLoc, "slot 0 instruction does not allow slot 1 store");
694691 else
695 return Error(IDLoc, "unknown error in instruction packet");
692 Error(IDLoc, "unknown error in instruction packet");
696693 }
697694 }
698695
15101507 return Match_InvalidOperand;
15111508 }
15121509
1513 // FIXME: Calls to OutOfRange shoudl propagate failure up to parseStatement.
1514 bool HexagonAsmParser::OutOfRange(SMLoc IDLoc, long long Val, long long Max) {
1510 void HexagonAsmParser::OutOfRange(SMLoc IDLoc, long long Val, long long Max) {
15151511 std::string errStr;
15161512 raw_string_ostream ES(errStr);
15171513 ES << "value " << Val << "(" << format_hex(Val, 0) << ") out of range: ";
15191515 ES << "0-" << Max;
15201516 else
15211517 ES << Max << "-" << (-Max - 1);
1522 return Parser.printError(IDLoc, ES.str().c_str());
1518 Error(IDLoc, ES.str().c_str());
15231519 }
15241520
15251521 int HexagonAsmParser::processInstruction(MCInst &Inst,
923923 assert(N == 1 && "Invalid number of operands!");
924924 Inst.addOperand(MCOperand::createReg(getFGR32Reg()));
925925 // FIXME: We ought to do this for -integrated-as without -via-file-asm too.
926 // FIXME: This should propagate failure up to parseStatement.
927926 if (!AsmParser.useOddSPReg() && RegIdx.Index & 1)
928 AsmParser.getParser().printError(
929 StartLoc, "-mno-odd-spreg prohibits the use of odd FPU "
930 "registers");
927 AsmParser.Error(StartLoc, "-mno-odd-spreg prohibits the use of odd FPU "
928 "registers");
931929 }
932930
933931 void addFGRH32AsmRegOperands(MCInst &Inst, unsigned N) const {
18611859 if (MemOffset < -32768 || MemOffset > 32767) {
18621860 // Offset can't exceed 16bit value.
18631861 expandMemInst(Inst, IDLoc, Out, STI, MCID.mayLoad(), true);
1864 return getParser().hasPendingError();
1862 return false;
18651863 }
18661864 } else if (Op.isExpr()) {
18671865 const MCExpr *Expr = Op.getExpr();
18711869 if (SR->getKind() == MCSymbolRefExpr::VK_None) {
18721870 // Expand symbol.
18731871 expandMemInst(Inst, IDLoc, Out, STI, MCID.mayLoad(), false);
1874 return getParser().hasPendingError();
1872 return false;
18751873 }
18761874 } else if (!isEvaluated(Expr)) {
18771875 expandMemInst(Inst, IDLoc, Out, STI, MCID.mayLoad(), false);
1878 return getParser().hasPendingError();
1876 return false;
18791877 }
18801878 }
18811879 }
24672465 Error(IDLoc, "la used to load 64-bit address");
24682466 // Continue as if we had 'dla' instead.
24692467 Is32BitAddress = false;
2470 return true;
24712468 }
24722469
24732470 // dla requires 64-bit addresses.
26942691 Inst.setOpcode(hasMips32r6() ? Mips::BC16_MMR6 : Mips::B16_MM);
26952692 } else {
26962693 if (!isInt<17>(Offset.getImm()))
2697 return Error(IDLoc, "branch target out of range");
2694 Error(IDLoc, "branch target out of range");
26982695 if (OffsetToAlignment(Offset.getImm(), 1LL << 1))
2699 return Error(IDLoc, "branch to misaligned address");
2696 Error(IDLoc, "branch to misaligned address");
27002697 Inst.clear();
27012698 Inst.setOpcode(Mips::BEQ_MM);
27022699 Inst.addOperand(MCOperand::createReg(Mips::ZERO));
33043301 MipsTargetStreamer &TOut = getTargetStreamer();
33053302
33063303 if (hasMips32r6() || hasMips64r6()) {
3307 return Error(IDLoc, "instruction not supported on mips32r6 or mips64r6");
3304 Error(IDLoc, "instruction not supported on mips32r6 or mips64r6");
3305 return false;
33083306 }
33093307
33103308 warnIfNoMacro(IDLoc);
33813379 const MCSubtargetInfo *STI) {
33823380 MipsTargetStreamer &TOut = getTargetStreamer();
33833381
3384 if (hasMips32r6() || hasMips64r6())
3385 return Error(IDLoc, "instruction not supported on mips32r6 or mips64r6");
3382 if (hasMips32r6() || hasMips64r6()) {
3383 Error(IDLoc, "instruction not supported on mips32r6 or mips64r6");
3384 return false;
3385 }
33863386
33873387 const MCOperand &DstRegOp = Inst.getOperand(0);
33883388 assert(DstRegOp.isReg() && "expected register operand kind");
48164816 Parser.Lex();
48174817 if (parseOperand(Operands, Name)) {
48184818 SMLoc Loc = getLexer().getLoc();
4819 Parser.eatToEndOfStatement();
48194820 return Error(Loc, "unexpected token in argument list");
48204821 }
48214822 if (Parser.getTok().isNot(AsmToken::RParen)) {
48224823 SMLoc Loc = getLexer().getLoc();
4824 Parser.eatToEndOfStatement();
48234825 return Error(Loc, "unexpected token, expected ')'");
48244826 }
48254827 Operands.push_back(
48444846 Parser.Lex();
48454847 if (parseOperand(Operands, Name)) {
48464848 SMLoc Loc = getLexer().getLoc();
4849 Parser.eatToEndOfStatement();
48474850 return Error(Loc, "unexpected token in argument list");
48484851 }
48494852 if (Parser.getTok().isNot(AsmToken::RBrac)) {
48504853 SMLoc Loc = getLexer().getLoc();
4854 Parser.eatToEndOfStatement();
48514855 return Error(Loc, "unexpected token, expected ']'");
48524856 }
48534857 Operands.push_back(
48674871
48684872 // Check if we have valid mnemonic
48694873 if (!mnemonicIsValid(Name, 0)) {
4874 Parser.eatToEndOfStatement();
48704875 return Error(NameLoc, "unknown instruction");
48714876 }
48724877 // First operand in MCInst is instruction mnemonic.
48774882 // Read the first operand.
48784883 if (parseOperand(Operands, Name)) {
48794884 SMLoc Loc = getLexer().getLoc();
4885 Parser.eatToEndOfStatement();
48804886 return Error(Loc, "unexpected token in argument list");
48814887 }
48824888 if (getLexer().is(AsmToken::LBrac) && parseBracketSuffix(Name, Operands))
48884894 // Parse and remember the operand.
48894895 if (parseOperand(Operands, Name)) {
48904896 SMLoc Loc = getLexer().getLoc();
4897 Parser.eatToEndOfStatement();
48914898 return Error(Loc, "unexpected token in argument list");
48924899 }
48934900 // Parse bracket and parenthesis suffixes before we iterate
49014908 }
49024909 if (getLexer().isNot(AsmToken::EndOfStatement)) {
49034910 SMLoc Loc = getLexer().getLoc();
4911 Parser.eatToEndOfStatement();
49044912 return Error(Loc, "unexpected token in argument list");
49054913 }
49064914 Parser.Lex(); // Consume the EndOfStatement.
49104918 // FIXME: Given that these have the same name, these should both be
49114919 // consistent on affecting the Parser.
49124920 bool MipsAsmParser::reportParseError(Twine ErrorMsg) {
4921 MCAsmParser &Parser = getParser();
49134922 SMLoc Loc = getLexer().getLoc();
4923 Parser.eatToEndOfStatement();
49144924 return Error(Loc, ErrorMsg);
49154925 }
49164926
54115421 MCAsmParser &Parser = getParser();
54125422 if (getLexer().isNot(AsmToken::Comma)) {
54135423 SMLoc Loc = getLexer().getLoc();
5424 Parser.eatToEndOfStatement();
54145425 return Error(Loc, ErrorStr);
54155426 }
54165427
55195530 MipsOperand &FuncRegOpnd = static_cast(*TmpReg[0]);
55205531 if (!FuncRegOpnd.isGPRAsmReg()) {
55215532 reportParseError(FuncRegOpnd.getStartLoc(), "invalid register");
5533 Parser.eatToEndOfStatement();
55225534 return false;
55235535 }
55245536
55375549 if (Parser.parseExpression(OffsetExpr) ||
55385550 !OffsetExpr->evaluateAsAbsolute(OffsetVal)) {
55395551 reportParseError(ExprLoc, "expected save register or stack offset");
5552 Parser.eatToEndOfStatement();
55405553 return false;
55415554 }
55425555
55465559 MipsOperand &SaveOpnd = static_cast(*TmpReg[0]);
55475560 if (!SaveOpnd.isGPRAsmReg()) {
55485561 reportParseError(SaveOpnd.getStartLoc(), "invalid register");
5562 Parser.eatToEndOfStatement();
55495563 return false;
55505564 }
55515565 Save = SaveOpnd.getGPR32Reg();
58335847 AsmToken Tok = Parser.getTok();
58345848 // At the moment only identifiers are supported.
58355849 if (Tok.isNot(AsmToken::Identifier)) {
5836 return Error(Parser.getTok().getLoc(),
5837 "unexpected token, expected identifier");
5850 Error(Parser.getTok().getLoc(), "unexpected token, expected identifier");
5851 Parser.eatToEndOfStatement();
5852 return false;
58385853 }
58395854
58405855 StringRef Option = Tok.getIdentifier();
58465861 getTargetStreamer().emitDirectiveOptionPic0();
58475862 Parser.Lex();
58485863 if (Parser.getTok().isNot(AsmToken::EndOfStatement)) {
5849 return Error(Parser.getTok().getLoc(),
5850 "unexpected token, expected end of statement");
5864 Error(Parser.getTok().getLoc(),
5865 "unexpected token, expected end of statement");
5866 Parser.eatToEndOfStatement();
58515867 }
58525868 return false;
58535869 }
58595875 getTargetStreamer().emitDirectiveOptionPic2();
58605876 Parser.Lex();
58615877 if (Parser.getTok().isNot(AsmToken::EndOfStatement)) {
5862 return Error(Parser.getTok().getLoc(),
5863 "unexpected token, expected end of statement");
5878 Error(Parser.getTok().getLoc(),
5879 "unexpected token, expected end of statement");
5880 Parser.eatToEndOfStatement();
58645881 }
58655882 return false;
58665883 }
59515968 return false; // parseDirectiveModule has finished successfully.
59525969 } else if (Option == "nooddspreg") {
59535970 if (!isABI_O32()) {
5954 return Error(L, "'.module nooddspreg' requires the O32 ABI");
5971 Error(L, "'.module nooddspreg' requires the O32 ABI");
5972 return false;
59555973 }
59565974
59575975 setModuleFeatureBits(Mips::FeatureNoOddSPReg, "nooddspreg");
64126430 if (Parser.getTok().isNot(AsmToken::EndOfStatement)) {
64136431 Error(Parser.getTok().getLoc(),
64146432 "unexpected token, expected end of statement");
6433 // Clear line
6434 Parser.eatToEndOfStatement();
64156435 }
64166436 return false;
64176437 }
8383 return getSTI().getTargetTriple().getArch() == Triple::sparcv9;
8484 }
8585
86 bool expandSET(MCInst &Inst, SMLoc IDLoc,
86 void expandSET(MCInst &Inst, SMLoc IDLoc,
8787 SmallVectorImpl &Instructions);
8888
8989 public:
465465
466466 } // end namespace
467467
468 bool SparcAsmParser::expandSET(MCInst &Inst, SMLoc IDLoc,
468 void SparcAsmParser::expandSET(MCInst &Inst, SMLoc IDLoc,
469469 SmallVectorImpl &Instructions) {
470470 MCOperand MCRegOp = Inst.getOperand(0);
471471 MCOperand MCValOp = Inst.getOperand(1);
478478
479479 // Allow either a signed or unsigned 32-bit immediate.
480480 if (RawImmValue < -2147483648LL || RawImmValue > 4294967295LL) {
481 return Error(IDLoc,
482 "set: argument must be between -2147483648 and 4294967295");
481 Error(IDLoc, "set: argument must be between -2147483648 and 4294967295");
482 return;
483483 }
484484
485485 // If the value was expressed as a large unsigned number, that's ok.
536536 TmpInst.addOperand(MCOperand::createExpr(Expr));
537537 Instructions.push_back(TmpInst);
538538 }
539 return false;
540539 }
541540
542541 bool SparcAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
556555 Instructions.push_back(Inst);
557556 break;
558557 case SP::SET:
559 if (expandSET(Inst, IDLoc, Instructions))
560 return true;
558 expandSET(Inst, IDLoc, Instructions);
561559 break;
562560 }
563561
627625 if (getLexer().is(AsmToken::Comma)) {
628626 if (parseBranchModifiers(Operands) != MatchOperand_Success) {
629627 SMLoc Loc = getLexer().getLoc();
628 Parser.eatToEndOfStatement();
630629 return Error(Loc, "unexpected token");
631630 }
632631 }
633632 if (parseOperand(Operands, Name) != MatchOperand_Success) {
634633 SMLoc Loc = getLexer().getLoc();
634 Parser.eatToEndOfStatement();
635635 return Error(Loc, "unexpected token");
636636 }
637637
644644 // Parse and remember the operand.
645645 if (parseOperand(Operands, Name) != MatchOperand_Success) {
646646 SMLoc Loc = getLexer().getLoc();
647 Parser.eatToEndOfStatement();
647648 return Error(Loc, "unexpected token");
648649 }
649650 }
650651 }
651652 if (getLexer().isNot(AsmToken::EndOfStatement)) {
652653 SMLoc Loc = getLexer().getLoc();
654 Parser.eatToEndOfStatement();
653655 return Error(Loc, "unexpected token");
654656 }
655657 Parser.Lex(); // Consume the EndOfStatement.
958958 if (getLexer().isNot(AsmToken::EndOfStatement)) {
959959 // Read the first operand.
960960 if (parseOperand(Operands, Name)) {
961 Parser.eatToEndOfStatement();
961962 return true;
962963 }
963964
965966 while (getLexer().is(AsmToken::Comma)) {
966967 Parser.Lex();
967968 if (parseOperand(Operands, Name)) {
969 Parser.eatToEndOfStatement();
968970 return true;
969971 }
970972 }
971973 if (getLexer().isNot(AsmToken::EndOfStatement)) {
972974 SMLoc Loc = getLexer().getLoc();
975 Parser.eatToEndOfStatement();
973976 return Error(Loc, "unexpected token in argument list");
974977 }
975978 }
658658 }
659659 };
660660
661 bool Error(SMLoc L, const Twine &Msg, SMRange Range = None,
661 bool Error(SMLoc L, const Twine &Msg,
662 ArrayRef Ranges = None,
662663 bool MatchingInlineAsm = false) {
663664 MCAsmParser &Parser = getParser();
664 if (MatchingInlineAsm) {
665 Parser.eatToEndOfStatement();
666 return false;
667 }
668 return Parser.Error(L, Msg, Range);
665 if (MatchingInlineAsm) return true;
666 return Parser.Error(L, Msg, Ranges);
667 }
668
669 bool ErrorAndEatStatement(SMLoc L, const Twine &Msg,
670 ArrayRef Ranges = None,
671 bool MatchingInlineAsm = false) {
672 MCAsmParser &Parser = getParser();
673 Parser.eatToEndOfStatement();
674 return Error(L, Msg, Ranges, MatchingInlineAsm);
669675 }
670676
671677 std::nullptr_t ErrorOperand(SMLoc Loc, StringRef Msg) {
18881894 if(getLexer().is(AsmToken::Integer)) {
18891895 // Parse memory broadcasting ({1to}).
18901896 if (getLexer().getTok().getIntVal() != 1)
1891 return !TokError("Expected 1to at this point");
1897 return !ErrorAndEatStatement(getLexer().getLoc(),
1898 "Expected 1to at this point");
18921899 Parser.Lex(); // Eat "1" of 1to8
18931900 if (!getLexer().is(AsmToken::Identifier) ||
18941901 !getLexer().getTok().getIdentifier().startswith("to"))
1895 return !TokError("Expected 1to at this point");
1902 return !ErrorAndEatStatement(getLexer().getLoc(),
1903 "Expected 1to at this point");
18961904 // Recognize only reasonable suffixes.
18971905 const char *BroadcastPrimitive =
18981906 StringSwitch(getLexer().getTok().getIdentifier())
19021910 .Case("to16", "{1to16}")
19031911 .Default(nullptr);
19041912 if (!BroadcastPrimitive)
1905 return !TokError("Invalid memory broadcast primitive.");
1913 return !ErrorAndEatStatement(getLexer().getLoc(),
1914 "Invalid memory broadcast primitive.");
19061915 Parser.Lex(); // Eat "toN" of 1toN
19071916 if (!getLexer().is(AsmToken::RCurly))
1908 return !TokError("Expected } at this point");
1917 return !ErrorAndEatStatement(getLexer().getLoc(),
1918 "Expected } at this point");
19091919 Parser.Lex(); // Eat "}"
19101920 Operands.push_back(X86Operand::CreateToken(BroadcastPrimitive,
19111921 consumedToken));
19181928 if (std::unique_ptr Op = ParseOperand()) {
19191929 Operands.push_back(std::move(Op));
19201930 if (!getLexer().is(AsmToken::RCurly))
1921 return !TokError("Expected } at this point");
1931 return !ErrorAndEatStatement(getLexer().getLoc(),
1932 "Expected } at this point");
19221933 Operands.push_back(X86Operand::CreateToken("}", consumeToken()));
19231934
19241935 // Parse "zeroing non-masked" semantic {z}
19261937 Operands.push_back(X86Operand::CreateToken("{z}", consumeToken()));
19271938 if (!getLexer().is(AsmToken::Identifier) ||
19281939 getLexer().getTok().getIdentifier() != "z")
1929 return !TokError("Expected z at this point");
1940 return !ErrorAndEatStatement(getLexer().getLoc(),
1941 "Expected z at this point");
19301942 Parser.Lex(); // Eat the z
19311943 if (!getLexer().is(AsmToken::RCurly))
1932 return !TokError("Expected } at this point");
1944 return !ErrorAndEatStatement(getLexer().getLoc(),
1945 "Expected } at this point");
19331946 Parser.Lex(); // Eat the }
19341947 }
19351948 }
22732286 if (!HandleAVX512Operand(Operands, *Operands.back()))
22742287 return true;
22752288 } else {
2289 Parser.eatToEndOfStatement();
22762290 return true;
22772291 }
22782292 // check for comma and eat it
22882302 isParsingIntelSyntax() && isParsingInlineAsm() &&
22892303 (getLexer().is(AsmToken::LCurly) || getLexer().is(AsmToken::RCurly));
22902304 if (getLexer().isNot(AsmToken::EndOfStatement) && !CurlyAsEndOfStatement)
2291 return TokError("unexpected token in argument list");
2305 return ErrorAndEatStatement(getLexer().getLoc(),
2306 "unexpected token in argument list");
22922307 }
22932308
22942309 // Consume the EndOfStatement or the prefix separator Slash
25542569 bool X86AsmParser::ErrorMissingFeature(SMLoc IDLoc, uint64_t ErrorInfo,
25552570 bool MatchingInlineAsm) {
25562571 assert(ErrorInfo && "Unknown missing feature!");
2572 ArrayRef EmptyRanges = None;
25572573 SmallString<126> Msg;
25582574 raw_svector_ostream OS(Msg);
25592575 OS << "instruction requires:";
25632579 OS << ' ' << getSubtargetFeatureName(ErrorInfo & Mask);
25642580 Mask <<= 1;
25652581 }
2566 return Error(IDLoc, OS.str(), SMRange(), MatchingInlineAsm);
2582 return Error(IDLoc, OS.str(), EmptyRanges, MatchingInlineAsm);
25672583 }
25682584
25692585 bool X86AsmParser::MatchAndEmitATTInstruction(SMLoc IDLoc, unsigned &Opcode,
25742590 assert(!Operands.empty() && "Unexpect empty operand list!");
25752591 X86Operand &Op = static_cast(*Operands[0]);
25762592 assert(Op.isToken() && "Leading operand should always be a mnemonic!");
2577 SMRange EmptyRange = None;
2593 ArrayRef EmptyRanges = None;
25782594
25792595 // First, handle aliases that expand to multiple instructions.
25802596 MatchFPUWaitAlias(IDLoc, Op, Operands, Out, MatchingInlineAsm);
26812697 OS << "'" << Base << MatchChars[i] << "'";
26822698 }
26832699 OS << ")";
2684 Error(IDLoc, OS.str(), EmptyRange, MatchingInlineAsm);
2700 Error(IDLoc, OS.str(), EmptyRanges, MatchingInlineAsm);
26852701 return true;
26862702 }
26872703
26912707 // mnemonic was invalid.
26922708 if (std::count(std::begin(Match), std::end(Match), Match_MnemonicFail) == 4) {
26932709 if (!WasOriginallyInvalidOperand) {
2710 SMRange OpRange = Op.getLocRange();
2711 ArrayRef Ranges = MatchingInlineAsm ? EmptyRanges : OpRange;
26942712 return Error(IDLoc, "invalid instruction mnemonic '" + Base + "'",
2695 Op.getLocRange(), MatchingInlineAsm);
2713 Ranges, MatchingInlineAsm);
26962714 }
26972715
26982716 // Recover location info for the operand if we know which was the problem.
26992717 if (ErrorInfo != ~0ULL) {
27002718 if (ErrorInfo >= Operands.size())
2701 return Error(IDLoc, "too few operands for instruction", EmptyRange,
2702 MatchingInlineAsm);
2719 return Error(IDLoc, "too few operands for instruction",
2720 EmptyRanges, MatchingInlineAsm);
27032721
27042722 X86Operand &Operand = (X86Operand &)*Operands[ErrorInfo];
27052723 if (Operand.getStartLoc().isValid()) {
27092727 }
27102728 }
27112729
2712 return Error(IDLoc, "invalid operand for instruction", EmptyRange,
2730 return Error(IDLoc, "invalid operand for instruction", EmptyRanges,
27132731 MatchingInlineAsm);
27142732 }
27152733
27262744 // operand failure.
27272745 if (std::count(std::begin(Match), std::end(Match),
27282746 Match_InvalidOperand) == 1) {
2729 return Error(IDLoc, "invalid operand for instruction", EmptyRange,
2747 return Error(IDLoc, "invalid operand for instruction", EmptyRanges,
27302748 MatchingInlineAsm);
27312749 }
27322750
27332751 // If all of these were an outright failure, report it in a useless way.
27342752 Error(IDLoc, "unknown use of instruction mnemonic without a size suffix",
2735 EmptyRange, MatchingInlineAsm);
2753 EmptyRanges, MatchingInlineAsm);
27362754 return true;
27372755 }
27382756
27452763 X86Operand &Op = static_cast(*Operands[0]);
27462764 assert(Op.isToken() && "Leading operand should always be a mnemonic!");
27472765 StringRef Mnemonic = Op.getToken();
2748 SMRange EmptyRange = None;
2766 ArrayRef EmptyRanges = None;
27492767
27502768 // First, handle aliases that expand to multiple instructions.
27512769 MatchFPUWaitAlias(IDLoc, Op, Operands, Out, MatchingInlineAsm);
28172835
28182836 // If it's a bad mnemonic, all results will be the same.
28192837 if (Match.back() == Match_MnemonicFail) {
2838 ArrayRef Ranges =
2839 MatchingInlineAsm ? EmptyRanges : Op.getLocRange();
28202840 return Error(IDLoc, "invalid instruction mnemonic '" + Mnemonic + "'",
2821 Op.getLocRange(), MatchingInlineAsm);
2841 Ranges, MatchingInlineAsm);
28222842 }
28232843
28242844 // If exactly one matched, then we treat that as a successful match (and the
28412861 } else if (NumSuccessfulMatches > 1) {
28422862 assert(UnsizedMemOp &&
28432863 "multiple matches only possible with unsized memory operands");
2864 SMRange OpRange = UnsizedMemOp->getLocRange();
2865 ArrayRef Ranges = MatchingInlineAsm ? EmptyRanges : OpRange;
28442866 return Error(UnsizedMemOp->getStartLoc(),
28452867 "ambiguous operand size for instruction '" + Mnemonic + "\'",
2846 UnsizedMemOp->getLocRange(), MatchingInlineAsm);
2868 Ranges, MatchingInlineAsm);
28472869 }
28482870
28492871 // If one instruction matched with a missing feature, report this as a
28592881 // operand failure.
28602882 if (std::count(std::begin(Match), std::end(Match),
28612883 Match_InvalidOperand) == 1) {
2862 return Error(IDLoc, "invalid operand for instruction", EmptyRange,
2884 return Error(IDLoc, "invalid operand for instruction", EmptyRanges,
28632885 MatchingInlineAsm);
28642886 }
28652887
28662888 // If all of these were an outright failure, report it in a useless way.
2867 return Error(IDLoc, "unknown instruction mnemonic", EmptyRange,
2889 return Error(IDLoc, "unknown instruction mnemonic", EmptyRanges,
28682890 MatchingInlineAsm);
28692891 }
28702892
2020 // CHECK: sqrdmlsh v0.8h, v1.8h, v2.8h // encoding: [0x20,0x8c,0x42,0x6e]
2121
2222 sqrdmlah v0.2h, v1.2h, v2.2h
23 // CHECK-ERROR: [[@LINE-1]]:12: error: invalid operand for instruction
2423 sqrdmlsh v0.2h, v1.2h, v2.2h
25 // CHECK-ERROR: [[@LINE-1]]:12: error: invalid operand for instruction
2624 sqrdmlah v0.8s, v1.8s, v2.8s
27 // CHECK-ERROR: [[@LINE-1]]:12: error: invalid vector kind qualifier
28 // CHECK-ERROR: [[@LINE-2]]:19: error: invalid vector kind qualifier
29 // CHECK-ERROR: [[@LINE-3]]:26: error: invalid vector kind qualifier
3025 sqrdmlsh v0.8s, v1.8s, v2.8s
31 // CHECK-ERROR: [[@LINE-1]]:12: error: invalid vector kind qualifier
32 // CHECK-ERROR: [[@LINE-2]]:19: error: invalid vector kind qualifier
33 // CHECK-ERROR: [[@LINE-3]]:26: error: invalid vector kind qualifier
3426 sqrdmlah v0.2s, v1.4h, v2.8h
35 // CHECK-ERROR: [[@LINE-1]]:19: error: invalid operand for instruction
3627 sqrdmlsh v0.4s, v1.8h, v2.2s
37 // CHECK-ERROR: [[@LINE-1]]:19: error: invalid operand for instruction
28 // CHECK-ERROR: error: invalid operand for instruction
29 // CHECK-ERROR: sqrdmlah v0.2h, v1.2h, v2.2h
30 // CHECK-ERROR: ^
31 // CHECK-ERROR: error: invalid operand for instruction
32 // CHECK-ERROR: sqrdmlsh v0.2h, v1.2h, v2.2h
33 // CHECK-ERROR: ^
34 // CHECK-ERROR: error: invalid vector kind qualifier
35 // CHECK-ERROR: sqrdmlah v0.8s, v1.8s, v2.8s
36 // CHECK-ERROR: ^
37 // CHECK-ERROR: error: invalid vector kind qualifier
38 // CHECK-ERROR: sqrdmlah v0.8s, v1.8s, v2.8s
39 // CHECK-ERROR: ^
40 // CHECK-ERROR: error: invalid vector kind qualifier
41 // CHECK-ERROR: sqrdmlah v0.8s, v1.8s, v2.8s
42 // CHECK-ERROR: ^
43 // CHECK-ERROR: error: invalid operand for instruction
44 // CHECK-ERROR: sqrdmlah v0.8s, v1.8s, v2.8s
45 // CHECK-ERROR: ^
46 // CHECK-ERROR: error: invalid vector kind qualifier
47 // CHECK-ERROR: sqrdmlsh v0.8s, v1.8s, v2.8s
48 // CHECK-ERROR: ^
49 // CHECK-ERROR: error: invalid vector kind qualifier
50 // CHECK-ERROR: sqrdmlsh v0.8s, v1.8s, v2.8s
51 // CHECK-ERROR: ^
52 // CHECK-ERROR: error: invalid vector kind qualifier
53 // CHECK-ERROR: sqrdmlsh v0.8s, v1.8s, v2.8s
54 // CHECK-ERROR: ^
55 // CHECK-ERROR: error: invalid operand for instruction
56 // CHECK-ERROR: sqrdmlsh v0.8s, v1.8s, v2.8s
57 // CHECK-ERROR: ^
58 // CHECK-ERROR: error: invalid operand for instruction
59 // CHECK-ERROR: sqrdmlah v0.2s, v1.4h, v2.8h
60 // CHECK-ERROR: ^
61 // CHECK-ERROR: error: invalid operand for instruction
62 // CHECK-ERROR: sqrdmlsh v0.4s, v1.8h, v2.2s
63 // CHECK-ERROR: ^
3864
3965 //AdvSIMD RDMA scalar
4066 sqrdmlah h0, h1, h2
1616
1717 .inst 0x5e104020 0x5e104020
1818 // CHECK-ERROR: unexpected token in directive
19
20 // CHECK-ERROR-NOT: unexpected token at start of statement
13421342 // CHECK-ERROR: error: invalid operand for instruction
13431343 // CHECK-ERROR: ushll v1.16b, v25.16b, #6
13441344 // CHECK-ERROR: ^
1345 // CHECK-ERROR: error: invalid vector kind qualifier
1345 // CHECK-ERROR: error: invalid operand for instruction
13461346 // CHECK-ERROR: sshll2 v0.2d, v3.8s, #15
13471347 // CHECK-ERROR: ^
13481348 // CHECK-ERROR: error: invalid operand for instruction
21132113 saddl2 v0.8h, v1.16h, v2.16b
21142114 saddl2 v0.2d, v1.4d, v2.4s
21152115
2116 // CHECK-ERROR: error: invalid vector kind qualifier
2116 // CHECK-ERROR: error: invalid operand for instruction
21172117 // CHECK-ERROR: saddl2 v0.4s, v1.8s, v2.8h
21182118 // CHECK-ERROR: ^
2119 // CHECK-ERROR: error: invalid vector kind qualifier
2119 // CHECK-ERROR: error: invalid operand for instruction
21202120 // CHECK-ERROR: saddl2 v0.8h, v1.16h, v2.16b
21212121 // CHECK-ERROR: ^
2122 // CHECK-ERROR: error: invalid vector kind qualifier
2122 // CHECK-ERROR: error: invalid operand for instruction
21232123 // CHECK-ERROR: saddl2 v0.2d, v1.4d, v2.4s
21242124 // CHECK-ERROR: ^
21252125
21412141 uaddl2 v0.4s, v1.8s, v2.8h
21422142 uaddl2 v0.2d, v1.4d, v2.4s
21432143
2144 // CHECK-ERROR: [[@LINE-4]]:23: error: invalid vector kind qualifier
2145 // CHECK-ERROR-NEXT: uaddl2 v0.8h, v1.16h, v2.16b
2146 // CHECK-ERROR: [[@LINE-5]]:23: error: invalid vector kind qualifier
2147 // CHECK-ERROR-NEXT: uaddl2 v0.4s, v1.8s, v2.8h
2148 // CHECK-ERROR: [[@LINE-6]]:23: error: invalid vector kind qualifier
2149 // CHECK-ERROR-NEXT: uaddl2 v0.2d, v1.4d, v2.4s
2144 // CHECK-ERROR: error: invalid operand for instruction
2145 // CHECK-ERROR: uaddl2 v0.8h, v1.16h, v2.16b
2146 // CHECK-ERROR: ^
2147 // CHECK-ERROR: error: invalid operand for instruction
2148 // CHECK-ERROR: uaddl2 v0.4s, v1.8s, v2.8h
2149 // CHECK-ERROR: ^
2150 // CHECK-ERROR: error: invalid operand for instruction
2151 // CHECK-ERROR: uaddl2 v0.2d, v1.4d, v2.4s
2152 // CHECK-ERROR: ^
21502153
21512154 ssubl v0.8h, v1.8h, v2.8b
21522155 ssubl v0.4s, v1.4s, v2.4h
21532156 ssubl v0.2d, v1.2d, v2.2s
21542157
2155 // CHECK-ERROR: [[@LINE-4]]:22: error: invalid operand for instruction
2156 // CHECK-ERROR-NEXT: ssubl v0.8h, v1.8h, v2.8b
2158 // CHECK-ERROR: error: invalid operand for instruction
2159 // CHECK-ERROR: ssubl v0.8h, v1.8h, v2.8b
2160 // CHECK-ERROR: ^
21572161 // CHECK-ERROR: error: invalid operand for instruction
21582162 // CHECK-ERROR: ssubl v0.4s, v1.4s, v2.4h
21592163 // CHECK-ERROR: ^
21652169 ssubl2 v0.4s, v1.8s, v2.8h
21662170 ssubl2 v0.2d, v1.4d, v2.4s
21672171
2168 // CHECK-ERROR: [[@LINE-4]]:23: error: invalid vector kind qualifier
2172 // CHECK-ERROR: error: invalid operand for instruction
21692173 // CHECK-ERROR: ssubl2 v0.8h, v1.16h, v2.16b
21702174 // CHECK-ERROR: ^
2171 // CHECK-ERROR: error: invalid vector kind qualifier
2175 // CHECK-ERROR: error: invalid operand for instruction
21722176 // CHECK-ERROR: ssubl2 v0.4s, v1.8s, v2.8h
21732177 // CHECK-ERROR: ^
2174 // CHECK-ERROR: error: invalid vector kind qualifier
2178 // CHECK-ERROR: error: invalid operand for instruction
21752179 // CHECK-ERROR: ssubl2 v0.2d, v1.4d, v2.4s
21762180 // CHECK-ERROR: ^
21772181
21932197 usubl2 v0.4s, v1.8s, v2.8h
21942198 usubl2 v0.2d, v1.4d, v2.4s
21952199
2196 // CHECK-ERROR: [[@LINE-4]]:23: error: invalid vector kind qualifier
2200 // CHECK-ERROR: error: invalid operand for instruction
21972201 // CHECK-ERROR: usubl2 v0.8h, v1.16h, v2.16b
2198 // CHECK-ERROR: [[@LINE-5]]:23: error: invalid vector kind qualifier
2202 // CHECK-ERROR: ^
2203 // CHECK-ERROR: error: invalid operand for instruction
21992204 // CHECK-ERROR: usubl2 v0.4s, v1.8s, v2.8h
2200 // CHECK-ERROR: [[@LINE-6]]:23: error: invalid vector kind qualifier
2205 // CHECK-ERROR: ^
2206 // CHECK-ERROR: error: invalid operand for instruction
22012207 // CHECK-ERROR: usubl2 v0.2d, v1.4d, v2.4s
2208 // CHECK-ERROR: ^
22022209
22032210 sabal v0.8h, v1.8h, v2.8b
22042211 sabal v0.4s, v1.4s, v2.4h
22182225 sabal2 v0.4s, v1.8s, v2.8h
22192226 sabal2 v0.2d, v1.4d, v2.4s
22202227
2221 // CHECK-ERROR: error: invalid vector kind qualifier
2228 // CHECK-ERROR: error: invalid operand for instruction
22222229 // CHECK-ERROR: sabal2 v0.8h, v1.16h, v2.16b
22232230 // CHECK-ERROR: ^
2224 // CHECK-ERROR: error: invalid vector kind qualifier
2231 // CHECK-ERROR: error: invalid operand for instruction
22252232 // CHECK-ERROR: sabal2 v0.4s, v1.8s, v2.8h
22262233 // CHECK-ERROR: ^
2227 // CHECK-ERROR: error: invalid vector kind qualifier
2234 // CHECK-ERROR: error: invalid operand for instruction
22282235 // CHECK-ERROR: sabal2 v0.2d, v1.4d, v2.4s
22292236 // CHECK-ERROR: ^
22302237
22462253 uabal2 v0.4s, v1.8s, v2.8h
22472254 uabal2 v0.2d, v1.4d, v2.4s
22482255
2249 // CHECK-ERROR: [[@LINE-4]]:23: error: invalid vector kind qualifier
2256 // CHECK-ERROR: error: invalid operand for instruction
22502257 // CHECK-ERROR: uabal2 v0.8h, v1.16h, v2.16b
2251 // CHECK-ERROR: [[@LINE-5]]:23: error: invalid vector kind qualifier
2258 // CHECK-ERROR: ^
2259 // CHECK-ERROR: error: invalid operand for instruction
22522260 // CHECK-ERROR: uabal2 v0.4s, v1.8s, v2.8h
2253 // CHECK-ERROR: [[@LINE-6]]:23: error: invalid vector kind qualifier
2261 // CHECK-ERROR: ^
2262 // CHECK-ERROR: error: invalid operand for instruction
22542263 // CHECK-ERROR: uabal2 v0.2d, v1.4d, v2.4s
2264 // CHECK-ERROR: ^
22552265
22562266 sabdl v0.8h, v1.8h, v2.8b
22572267 sabdl v0.4s, v1.4s, v2.4h
22712281 sabdl2 v0.4s, v1.8s, v2.8h
22722282 sabdl2 v0.2d, v1.4d, v2.4s
22732283
2274 // CHECK-ERROR: [[@LINE-4]]:23: error: invalid vector kind qualifier
2284 // CHECK-ERROR: error: invalid operand for instruction
22752285 // CHECK-ERROR: sabdl2 v0.8h, v1.16h, v2.16b
2276 // CHECK-ERROR: [[@LINE-5]]:23: error: invalid vector kind qualifier
2286 // CHECK-ERROR: ^
2287 // CHECK-ERROR: error: invalid operand for instruction
22772288 // CHECK-ERROR: sabdl2 v0.4s, v1.8s, v2.8h
2278 // CHECK-ERROR: [[@LINE-6]]:23: error: invalid vector kind qualifier
2289 // CHECK-ERROR: ^
2290 // CHECK-ERROR: error: invalid operand for instruction
22792291 // CHECK-ERROR: sabdl2 v0.2d, v1.4d, v2.4s
2292 // CHECK-ERROR: ^
22802293
22812294 uabdl v0.8h, v1.8h, v2.8b
22822295 uabdl v0.4s, v1.4s, v2.4h
22962309 uabdl2 v0.4s, v1.8s, v2.8h
22972310 uabdl2 v0.2d, v1.4d, v2.4s
22982311
2299 // CHECK-ERROR: [[@LINE-4]]:23: error: invalid vector kind qualifier
2312 // CHECK-ERROR: error: invalid operand for instruction
23002313 // CHECK-ERROR: uabdl2 v0.8h, v1.16h, v2.16b
2301 // CHECK-ERROR: [[@LINE-5]]:23: error: invalid vector kind qualifier
2314 // CHECK-ERROR: ^
2315 // CHECK-ERROR: error: invalid operand for instruction
23022316 // CHECK-ERROR: uabdl2 v0.4s, v1.8s, v2.8h
2303 // CHECK-ERROR: [[@LINE-6]]:23: error: invalid vector kind qualifier
2317 // CHECK-ERROR: ^
2318 // CHECK-ERROR: error: invalid operand for instruction
23042319 // CHECK-ERROR: uabdl2 v0.2d, v1.4d, v2.4s
2320 // CHECK-ERROR: ^
23052321
23062322 smlal v0.8h, v1.8h, v2.8b
23072323 smlal v0.4s, v1.4s, v2.4h
23212337 smlal2 v0.4s, v1.8s, v2.8h
23222338 smlal2 v0.2d, v1.4d, v2.4s
23232339
2324 // CHECK-ERROR: [[@LINE-4]]:23: error: invalid vector kind qualifier
2340 // CHECK-ERROR: error: invalid operand for instruction
23252341 // CHECK-ERROR: smlal2 v0.8h, v1.16h, v2.16b
2326 // CHECK-ERROR: [[@LINE-5]]:23: error: invalid vector kind qualifier
2342 // CHECK-ERROR: ^
2343 // CHECK-ERROR: error: invalid operand for instruction
23272344 // CHECK-ERROR: smlal2 v0.4s, v1.8s, v2.8h
2328 // CHECK-ERROR: [[@LINE-6]]:23: error: invalid vector kind qualifier
2345 // CHECK-ERROR: ^
2346 // CHECK-ERROR: error: invalid operand for instruction
23292347 // CHECK-ERROR: smlal2 v0.2d, v1.4d, v2.4s
2348 // CHECK-ERROR: ^
23302349
23312350 umlal v0.8h, v1.8h, v2.8b
23322351 umlal v0.4s, v1.4s, v2.4h
23332352 umlal v0.2d, v1.2d, v2.2s
23342353
2335 // CHECK-ERROR: [[@LINE-4]]:22: error: invalid operand for instruction
2354 // CHECK-ERROR: error: invalid operand for instruction
23362355 // CHECK-ERROR: umlal v0.8h, v1.8h, v2.8b
2337 // CHECK-ERROR: [[@LINE-5]]:22: error: invalid operand for instruction
2356 // CHECK-ERROR: ^
2357 // CHECK-ERROR: error: invalid operand for instruction
23382358 // CHECK-ERROR: umlal v0.4s, v1.4s, v2.4h
2339 // CHECK-ERROR: [[@LINE-6]]:22: error: invalid operand for instruction
2359 // CHECK-ERROR: ^
2360 // CHECK-ERROR: error: invalid operand for instruction
23402361 // CHECK-ERROR: umlal v0.2d, v1.2d, v2.2s
2362 // CHECK-ERROR: ^
23412363
23422364 umlal2 v0.8h, v1.16h, v2.16b
23432365 umlal2 v0.4s, v1.8s, v2.8h
23442366 umlal2 v0.2d, v1.4d, v2.4s
23452367
2346 // CHECK-ERROR: [[@LINE-4]]:23: error: invalid vector kind qualifier
2368 // CHECK-ERROR: error: invalid operand for instruction
23472369 // CHECK-ERROR: umlal2 v0.8h, v1.16h, v2.16b
2348 // CHECK-ERROR: [[@LINE-5]]:23: error: invalid vector kind qualifier
2370 // CHECK-ERROR: ^
2371 // CHECK-ERROR: error: invalid operand for instruction
23492372 // CHECK-ERROR: umlal2 v0.4s, v1.8s, v2.8h
2350 // CHECK-ERROR: [[@LINE-6]]:23: error: invalid vector kind qualifier
2373 // CHECK-ERROR: ^
2374 // CHECK-ERROR: error: invalid operand for instruction
23512375 // CHECK-ERROR: umlal2 v0.2d, v1.4d, v2.4s
2376 // CHECK-ERROR: ^
23522377
23532378 smlsl v0.8h, v1.8h, v2.8b
23542379 smlsl v0.4s, v1.4s, v2.4h
23552380 smlsl v0.2d, v1.2d, v2.2s
23562381
2357 // CHECK-ERROR: [[@LINE-4]]:22: error: invalid operand for instruction
2382 // CHECK-ERROR: error: invalid operand for instruction
23582383 // CHECK-ERROR: smlsl v0.8h, v1.8h, v2.8b
2359 // CHECK-ERROR: [[@LINE-5]]:22: error: invalid operand for instruction
2384 // CHECK-ERROR: ^
2385 // CHECK-ERROR: error: invalid operand for instruction
23602386 // CHECK-ERROR: smlsl v0.4s, v1.4s, v2.4h
2361 // CHECK-ERROR: [[@LINE-6]]:22: error: invalid operand for instruction
2387 // CHECK-ERROR: ^
2388 // CHECK-ERROR: error: invalid operand for instruction
23622389 // CHECK-ERROR: smlsl v0.2d, v1.2d, v2.2s
2390 // CHECK-ERROR: ^
23632391
23642392 smlsl2 v0.8h, v1.16h, v2.16b
23652393 smlsl2 v0.4s, v1.8s, v2.8h
23662394 smlsl2 v0.2d, v1.4d, v2.4s
23672395
2368 // CHECK-ERROR: [[@LINE-4]]:23: error: invalid vector kind qualifier
2396 // CHECK-ERROR: error: invalid operand for instruction
23692397 // CHECK-ERROR: smlsl2 v0.8h, v1.16h, v2.16b
2370 // CHECK-ERROR: [[@LINE-5]]:23: error: invalid vector kind qualifier
2398 // CHECK-ERROR: ^
2399 // CHECK-ERROR: error: invalid operand for instruction
23712400 // CHECK-ERROR: smlsl2 v0.4s, v1.8s, v2.8h
2372 // CHECK-ERROR: [[@LINE-6]]:23: error: invalid vector kind qualifier
2401 // CHECK-ERROR: ^
2402 // CHECK-ERROR: error: invalid operand for instruction
23732403 // CHECK-ERROR: smlsl2 v0.2d, v1.4d, v2.4s
2404 // CHECK-ERROR: ^
23742405
23752406 umlsl v0.8h, v1.8h, v2.8b
23762407 umlsl v0.4s, v1.4s, v2.4h
23902421 umlsl2 v0.4s, v1.8s, v2.8h
23912422 umlsl2 v0.2d, v1.4d, v2.4s
23922423
2393 // CHECK-ERROR: [[@LINE-4]]:23: error: invalid vector kind qualifier
2424 // CHECK-ERROR: error: invalid operand for instruction
23942425 // CHECK-ERROR: umlsl2 v0.8h, v1.16h, v2.16b
2395 // CHECK-ERROR: [[@LINE-5]]:23: error: invalid vector kind qualifier
2426 // CHECK-ERROR: ^
2427 // CHECK-ERROR: error: invalid operand for instruction
23962428 // CHECK-ERROR: umlsl2 v0.4s, v1.8s, v2.8h
2397 // CHECK-ERROR: [[@LINE-6]]:23: error: invalid vector kind qualifier
2429 // CHECK-ERROR: ^
2430 // CHECK-ERROR: error: invalid operand for instruction
23982431 // CHECK-ERROR: umlsl2 v0.2d, v1.4d, v2.4s
2432 // CHECK-ERROR: ^
23992433
24002434 smull v0.8h, v1.8h, v2.8b
24012435 smull v0.4s, v1.4s, v2.4h
24152449 smull2 v0.4s, v1.8s, v2.8h
24162450 smull2 v0.2d, v1.4d, v2.4s
24172451
2418 // CHECK-ERROR: [[@LINE-4]]:23: error: invalid vector kind qualifier
2452 // CHECK-ERROR: error: invalid operand for instruction
24192453 // CHECK-ERROR: smull2 v0.8h, v1.16h, v2.16b
2420 // CHECK-ERROR: [[@LINE-5]]:23: error: invalid vector kind qualifier
2454 // CHECK-ERROR: ^
2455 // CHECK-ERROR: error: invalid operand for instruction
24212456 // CHECK-ERROR: smull2 v0.4s, v1.8s, v2.8h
2422 // CHECK-ERROR: [[@LINE-6]]:23: error: invalid vector kind qualifier
2457 // CHECK-ERROR: ^
2458 // CHECK-ERROR: error: invalid operand for instruction
24232459 // CHECK-ERROR: smull2 v0.2d, v1.4d, v2.4s
2460 // CHECK-ERROR: ^
24242461
24252462 umull v0.8h, v1.8h, v2.8b
24262463 umull v0.4s, v1.4s, v2.4h
24402477 umull2 v0.4s, v1.8s, v2.8h
24412478 umull2 v0.2d, v1.4d, v2.4s
24422479
2443 // CHECK-ERROR: [[@LINE-4]]:23: error: invalid vector kind qualifier
2480 // CHECK-ERROR: error: invalid operand for instruction
24442481 // CHECK-ERROR: umull2 v0.8h, v1.16h, v2.16b
2445 // CHECK-ERROR: [[@LINE-5]]:23: error: invalid vector kind qualifier
2482 // CHECK-ERROR: ^
2483 // CHECK-ERROR: error: invalid operand for instruction
24462484 // CHECK-ERROR: umull2 v0.4s, v1.8s, v2.8h
2447 // CHECK-ERROR: [[@LINE-6]]:23: error: invalid vector kind qualifier
2485 // CHECK-ERROR: ^
2486 // CHECK-ERROR: error: invalid operand for instruction
24482487 // CHECK-ERROR: umull2 v0.2d, v1.4d, v2.4s
2488 // CHECK-ERROR: ^
24492489
24502490 //------------------------------------------------------------------------------
24512491 // Long - Variant 2
24642504 sqdmlal2 v0.4s, v1.8s, v2.8h
24652505 sqdmlal2 v0.2d, v1.4d, v2.4s
24662506
2467 // CHECK-ERROR: [[@LINE-3]]:25: error: invalid vector kind qualifier
2507 // CHECK-ERROR: error: invalid operand for instruction
24682508 // CHECK-ERROR: sqdmlal2 v0.4s, v1.8s, v2.8h
2469 // CHECK-ERROR: [[@LINE-4]]:25: error: invalid vector kind qualifier
2509 // CHECK-ERROR: ^
2510 // CHECK-ERROR: error: invalid operand for instruction
24702511 // CHECK-ERROR: sqdmlal2 v0.2d, v1.4d, v2.4s
2512 // CHECK-ERROR: ^
24712513
24722514 // Mismatched vector types
24732515 sqdmlal v0.8h, v1.8b, v2.8b
24932535 sqdmlsl2 v0.4s, v1.8s, v2.8h
24942536 sqdmlsl2 v0.2d, v1.4d, v2.4s
24952537
2496 // CHECK-ERROR: [[@LINE-3]]:25: error: invalid vector kind qualifier
2538 // CHECK-ERROR: error: invalid operand for instruction
24972539 // CHECK-ERROR: sqdmlsl2 v0.4s, v1.8s, v2.8h
2498 // CHECK-ERROR: [[@LINE-4]]:25: error: invalid vector kind qualifier
2540 // CHECK-ERROR: ^
2541 // CHECK-ERROR: error: invalid operand for instruction
24992542 // CHECK-ERROR: sqdmlsl2 v0.2d, v1.4d, v2.4s
2543 // CHECK-ERROR: ^
25002544
25012545 // Mismatched vector types
25022546 sqdmlsl v0.8h, v1.8b, v2.8b
25232567 sqdmull2 v0.4s, v1.8s, v2.8h
25242568 sqdmull2 v0.2d, v1.4d, v2.4s
25252569
2526 // CHECK-ERROR: [[@LINE-3]]:25: error: invalid vector kind qualifier
2570 // CHECK-ERROR: error: invalid operand for instruction
25272571 // CHECK-ERROR: sqdmull2 v0.4s, v1.8s, v2.8h
2528 // CHECK-ERROR: [[@LINE-4]]:25: error: invalid vector kind qualifier
2572 // CHECK-ERROR: ^
2573 // CHECK-ERROR: error: invalid operand for instruction
25292574 // CHECK-ERROR: sqdmull2 v0.2d, v1.4d, v2.4s
2575 // CHECK-ERROR: ^
25302576
25312577 // Mismatched vector types
25322578 sqdmull v0.8h, v1.8b, v2.8b
25692615
25702616
25712617 pmull2 v0.8h, v1.16h, v2.16b
2572 // CHECK-ERROR: [[@LINE-1]]:23: error: invalid vector kind qualifier
2618
2619 // CHECK-ERROR: error: invalid operand for instruction
25732620 // CHECK-ERROR: pmull2 v0.8h, v1.16h, v2.16b
2621 // CHECK-ERROR: ^
25742622
25752623 pmull2 v0.q, v1.2d, v2.2d
2576 // CHECK-ERROR: [[@LINE-1]]:16: error: invalid vector kind qualifier
2624
2625 // CHECK-ERROR: error: invalid operand for instruction
25772626 // CHECK-ERROR: pmull2 v0.q, v1.2d, v2.2d
2627 // CHECK-ERROR: ^
25782628
25792629 // Mismatched vector types
25802630 pmull2 v0.4s, v1.8h v2.8h
26112661 saddw2 v0.4s, v1.4s, v2.8s
26122662 saddw2 v0.2d, v1.2d, v2.4d
26132663
2614 // CHECK-ERROR: [[@LINE-4]]:30: error: invalid vector kind qualifier
2664 // CHECK-ERROR: error: invalid operand for instruction
26152665 // CHECK-ERROR: saddw2 v0.8h, v1.8h, v2.16h
2616 // CHECK-ERROR: [[@LINE-5]]:30: error: invalid vector kind qualifier
2666 // CHECK-ERROR: ^
2667 // CHECK-ERROR: error: invalid operand for instruction
26172668 // CHECK-ERROR: saddw2 v0.4s, v1.4s, v2.8s
2618 // CHECK-ERROR: [[@LINE-6]]:30: error: invalid vector kind qualifier
2669 // CHECK-ERROR: ^
2670 // CHECK-ERROR: error: invalid operand for instruction
26192671 // CHECK-ERROR: saddw2 v0.2d, v1.2d, v2.4d
2672 // CHECK-ERROR: ^
26202673
26212674 uaddw v0.8h, v1.8h, v2.8h
26222675 uaddw v0.4s, v1.4s, v2.4s
26362689 uaddw2 v0.4s, v1.4s, v2.8s
26372690 uaddw2 v0.2d, v1.2d, v2.4d
26382691
2639 // CHECK-ERROR: [[@LINE-4]]:30: error: invalid vector kind qualifier
2692 // CHECK-ERROR: error: invalid operand for instruction
26402693 // CHECK-ERROR: uaddw2 v0.8h, v1.8h, v2.16h
2641 // CHECK-ERROR: [[@LINE-5]]:30: error: invalid vector kind qualifier
2694 // CHECK-ERROR: ^
2695 // CHECK-ERROR: error: invalid operand for instruction
26422696 // CHECK-ERROR: uaddw2 v0.4s, v1.4s, v2.8s
2643 // CHECK-ERROR: [[@LINE-6]]:30: error: invalid vector kind qualifier
2697 // CHECK-ERROR: ^
2698 // CHECK-ERROR: error: invalid operand for instruction
26442699 // CHECK-ERROR: uaddw2 v0.2d, v1.2d, v2.4d
2700 // CHECK-ERROR: ^
26452701
26462702 ssubw v0.8h, v1.8h, v2.8h
26472703 ssubw v0.4s, v1.4s, v2.4s
26612717 ssubw2 v0.4s, v1.4s, v2.8s
26622718 ssubw2 v0.2d, v1.2d, v2.4d
26632719
2664 // CHECK-ERROR: [[@LINE-4]]:30: error: invalid vector kind qualifier
2720 // CHECK-ERROR: error: invalid operand for instruction
26652721 // CHECK-ERROR: ssubw2 v0.8h, v1.8h, v2.16h
2666 // CHECK-ERROR: [[@LINE-5]]:30: error: invalid vector kind qualifier
2722 // CHECK-ERROR: ^
2723 // CHECK-ERROR: error: invalid operand for instruction
26672724 // CHECK-ERROR: ssubw2 v0.4s, v1.4s, v2.8s
2668 // CHECK-ERROR: [[@LINE-6]]:30: error: invalid vector kind qualifier
2725 // CHECK-ERROR: ^
2726 // CHECK-ERROR: error: invalid operand for instruction
26692727 // CHECK-ERROR: ssubw2 v0.2d, v1.2d, v2.4d
2728 // CHECK-ERROR: ^
26702729
26712730 usubw v0.8h, v1.8h, v2.8h
26722731 usubw v0.4s, v1.4s, v2.4s
26862745 usubw2 v0.4s, v1.4s, v2.8s
26872746 usubw2 v0.2d, v1.2d, v2.4d
26882747
2689 // CHECK-ERROR: [[@LINE-4]]:30: error: invalid vector kind qualifier
2748 // CHECK-ERROR: error: invalid operand for instruction
26902749 // CHECK-ERROR: usubw2 v0.8h, v1.8h, v2.16h
2691 // CHECK-ERROR: [[@LINE-5]]:30: error: invalid vector kind qualifier
2750 // CHECK-ERROR: ^
2751 // CHECK-ERROR: error: invalid operand for instruction
26922752 // CHECK-ERROR: usubw2 v0.4s, v1.4s, v2.8s
2693 // CHECK-ERROR: [[@LINE-6]]:30: error: invalid vector kind qualifier
2753 // CHECK-ERROR: ^
2754 // CHECK-ERROR: error: invalid operand for instruction
26942755 // CHECK-ERROR: usubw2 v0.2d, v1.2d, v2.4d
2756 // CHECK-ERROR: ^
26952757
26962758 //------------------------------------------------------------------------------
26972759 // Narrow
27012763 addhn v0.4h, v1.4s, v2.4h
27022764 addhn v0.2s, v1.2d, v2.2s
27032765
2704 // CHECK-ERROR: [[@LINE-4]]:29: error: invalid vector kind qualifier
2766 // CHECK-ERROR: error: invalid operand for instruction
27052767 // CHECK-ERROR: addhn v0.8b, v1.8h, v2.8d
2706 // CHECK-ERROR: [[@LINE-5]]:29: error: invalid operand for instruction
2768 // CHECK-ERROR: ^
2769 // CHECK-ERROR: error: invalid operand for instruction
27072770 // CHECK-ERROR: addhn v0.4h, v1.4s, v2.4h
2708 // CHECK-ERROR: [[@LINE-6]]:29: error: invalid operand for instruction
2771 // CHECK-ERROR: ^
2772 // CHECK-ERROR: error: invalid operand for instruction
27092773 // CHECK-ERROR: addhn v0.2s, v1.2d, v2.2s
2774 // CHECK-ERROR: ^
27102775
27112776 addhn2 v0.16b, v1.8h, v2.8b
27122777 addhn2 v0.8h, v1.4s, v2.4h
44134478 // CHECK-ERROR: error: invalid operand for instruction
44144479 // CHECK-ERROR: dup v1.16b, d2
44154480 // CHECK-ERROR: ^
4416 // CHECK-ERROR: error: invalid vector kind qualifier
4481 // CHECK-ERROR: error: invalid operand for instruction
44174482 // CHECK-ERROR: dup v11.8s, w16
44184483 // CHECK-ERROR: ^
4419 // CHECK-ERROR: error: invalid vector kind qualifier
4484 // CHECK-ERROR: error: invalid operand for instruction
44204485 // CHECK-ERROR: dup v17.4d, w28
44214486 // CHECK-ERROR: ^
44224487 // CHECK-ERROR: error: invalid operand for instruction
63926457 //----------------------------------------------------------------------
63936458
63946459 uzp1 v0.16b, v1.8b, v2.8b
6395 // CHECK-ERROR: [[@LINE-1]]:22: error: invalid operand for instruction
63966460 uzp1 v0.8b, v1.4b, v2.4b
6397 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6398 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
63996461 uzp1 v0.8h, v1.4h, v2.4h
6400 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
64016462 uzp1 v0.4h, v1.2h, v2.2h
6402 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
64036463 uzp1 v0.4s, v1.2s, v2.2s
6404 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
64056464 uzp1 v0.2s, v1.1s, v2.1s
6406 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6407 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
64086465 uzp1 v0.2d, v1.1d, v2.1d
6409 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
64106466 uzp1 v0.1d, v1.1d, v2.1d
6411 // CHECK-ERROR: [[@LINE-1]]:14: error: invalid operand for instruction
6412
6413
6467
6468 // CHECK-ERROR: error: invalid operand for instruction
6469 // CHECK-ERROR: uzp1 v0.16b, v1.8b, v2.8b
6470 // CHECK-ERROR: ^
6471 // CHECK-ERROR: error: invalid operand for instruction
6472 // CHECK-ERROR: uzp1 v0.8b, v1.4b, v2.4b
6473 // CHECK-ERROR: ^
6474 // CHECK-ERROR: error: invalid operand for instruction
6475 // CHECK-ERROR: uzp1 v0.8h, v1.4h, v2.4h
6476 // CHECK-ERROR: ^
6477 // CHECK-ERROR: error: invalid operand for instruction
6478 // CHECK-ERROR: uzp1 v0.4h, v1.2h, v2.2h
6479 // CHECK-ERROR: ^
6480 // CHECK-ERROR: error: invalid operand for instruction
6481 // CHECK-ERROR: uzp1 v0.4s, v1.2s, v2.2s
6482 // CHECK-ERROR: ^
6483 // CHECK-ERROR: error: invalid operand for instruction
6484 // CHECK-ERROR: uzp1 v0.2s, v1.1s, v2.1s
6485 // CHECK-ERROR: ^
6486 // CHECK-ERROR: error: invalid operand for instruction
6487 // CHECK-ERROR: uzp1 v0.2d, v1.1d, v2.1d
6488 // CHECK-ERROR: ^
6489 // CHECK-ERROR: error: invalid operand for instruction
6490 // CHECK-ERROR: uzp1 v0.1d, v1.1d, v2.1d
6491 // CHECK-ERROR: ^
64146492
64156493 uzp2 v0.16b, v1.8b, v2.8b
6416 // CHECK-ERROR: [[@LINE-1]]:22: error: invalid operand for instruction
64176494 uzp2 v0.8b, v1.4b, v2.4b
6418 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6419 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
64206495 uzp2 v0.8h, v1.4h, v2.4h
6421 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
64226496 uzp2 v0.4h, v1.2h, v2.2h
6423 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
64246497 uzp2 v0.4s, v1.2s, v2.2s
6425 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
64266498 uzp2 v0.2s, v1.1s, v2.1s
6427 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6428 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
64296499 uzp2 v0.2d, v1.1d, v2.1d
6430 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
64316500 uzp2 v0.1d, v1.1d, v2.1d
6432 // CHECK-ERROR: [[@LINE-1]]:14: error: invalid operand for instruction
6433
6434
6501
6502 // CHECK-ERROR: error: invalid operand for instruction
6503 // CHECK-ERROR: uzp2 v0.16b, v1.8b, v2.8b
6504 // CHECK-ERROR: ^
6505 // CHECK-ERROR: error: invalid operand for instruction
6506 // CHECK-ERROR: uzp2 v0.8b, v1.4b, v2.4b
6507 // CHECK-ERROR: ^
6508 // CHECK-ERROR: error: invalid operand for instruction
6509 // CHECK-ERROR: uzp2 v0.8h, v1.4h, v2.4h
6510 // CHECK-ERROR: ^
6511 // CHECK-ERROR: error: invalid operand for instruction
6512 // CHECK-ERROR: uzp2 v0.4h, v1.2h, v2.2h
6513 // CHECK-ERROR: ^
6514 // CHECK-ERROR: error: invalid operand for instruction
6515 // CHECK-ERROR: uzp2 v0.4s, v1.2s, v2.2s
6516 // CHECK-ERROR: ^
6517 // CHECK-ERROR: error: invalid operand for instruction
6518 // CHECK-ERROR: uzp2 v0.2s, v1.1s, v2.1s
6519 // CHECK-ERROR: ^
6520 // CHECK-ERROR: error: invalid operand for instruction
6521 // CHECK-ERROR: uzp2 v0.2d, v1.1d, v2.1d
6522 // CHECK-ERROR: ^
6523 // CHECK-ERROR: error: invalid operand for instruction
6524 // CHECK-ERROR: uzp2 v0.1d, v1.1d, v2.1d
6525 // CHECK-ERROR: ^
64356526
64366527 zip1 v0.16b, v1.8b, v2.8b
6437 // CHECK-ERROR: [[@LINE-1]]:22: error: invalid operand for instruction
64386528 zip1 v0.8b, v1.4b, v2.4b
6439 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6440 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
64416529 zip1 v0.8h, v1.4h, v2.4h
6442 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
64436530 zip1 v0.4h, v1.2h, v2.2h
6444 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
64456531 zip1 v0.4s, v1.2s, v2.2s
6446 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
64476532 zip1 v0.2s, v1.1s, v2.1s
6448 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6449 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
64506533 zip1 v0.2d, v1.1d, v2.1d
6451 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
64526534 zip1 v0.1d, v1.1d, v2.1d
6453 // CHECK-ERROR: [[@LINE-1]]:14: error: invalid operand for instruction
6454
6455
6456 \
6535
6536 // CHECK-ERROR: error: invalid operand for instruction
6537 // CHECK-ERROR: zip1 v0.16b, v1.8b, v2.8b
6538 // CHECK-ERROR: ^
6539 // CHECK-ERROR: error: invalid operand for instruction
6540 // CHECK-ERROR: zip1 v0.8b, v1.4b, v2.4b
6541 // CHECK-ERROR: ^
6542 // CHECK-ERROR: error: invalid operand for instruction
6543 // CHECK-ERROR: zip1 v0.8h, v1.4h, v2.4h
6544 // CHECK-ERROR: ^
6545 // CHECK-ERROR: error: invalid operand for instruction
6546 // CHECK-ERROR: zip1 v0.4h, v1.2h, v2.2h
6547 // CHECK-ERROR: ^
6548 // CHECK-ERROR: error: invalid operand for instruction
6549 // CHECK-ERROR: zip1 v0.4s, v1.2s, v2.2s
6550 // CHECK-ERROR: ^
6551 // CHECK-ERROR: error: invalid operand for instruction
6552 // CHECK-ERROR: zip1 v0.2s, v1.1s, v2.1s
6553 // CHECK-ERROR: ^
6554 // CHECK-ERROR: error: invalid operand for instruction
6555 // CHECK-ERROR: zip1 v0.2d, v1.1d, v2.1d
6556 // CHECK-ERROR: ^
6557 // CHECK-ERROR: error: invalid operand for instruction
6558 // CHECK-ERROR: zip1 v0.1d, v1.1d, v2.1d
6559 // CHECK-ERROR: ^
6560
64576561 zip2 v0.16b, v1.8b, v2.8b
6458 // CHECK-ERROR: [[@LINE-1]]:22: error: invalid operand for instruction
64596562 zip2 v0.8b, v1.4b, v2.4b
6460 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6461 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
64626563 zip2 v0.8h, v1.4h, v2.4h
6463 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
64646564 zip2 v0.4h, v1.2h, v2.2h
6465 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
64666565 zip2 v0.4s, v1.2s, v2.2s
6467 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
64686566 zip2 v0.2s, v1.1s, v2.1s
6469 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6470 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
64716567 zip2 v0.2d, v1.1d, v2.1d
6472 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
64736568 zip2 v0.1d, v1.1d, v2.1d
6474 // CHECK-ERROR: [[@LINE-1]]:14: error: invalid operand for instruction
6475
6476
6569
6570 // CHECK-ERROR: error: invalid operand for instruction
6571 // CHECK-ERROR: zip2 v0.16b, v1.8b, v2.8b
6572 // CHECK-ERROR: ^
6573 // CHECK-ERROR: error: invalid operand for instruction
6574 // CHECK-ERROR: zip2 v0.8b, v1.4b, v2.4b
6575 // CHECK-ERROR: ^
6576 // CHECK-ERROR: error: invalid operand for instruction
6577 // CHECK-ERROR: zip2 v0.8h, v1.4h, v2.4h
6578 // CHECK-ERROR: ^
6579 // CHECK-ERROR: error: invalid operand for instruction
6580 // CHECK-ERROR: zip2 v0.4h, v1.2h, v2.2h
6581 // CHECK-ERROR: ^
6582 // CHECK-ERROR: error: invalid operand for instruction
6583 // CHECK-ERROR: zip2 v0.4s, v1.2s, v2.2s
6584 // CHECK-ERROR: ^
6585 // CHECK-ERROR: error: invalid operand for instruction
6586 // CHECK-ERROR: zip2 v0.2s, v1.1s, v2.1s
6587 // CHECK-ERROR: ^
6588 // CHECK-ERROR: error: invalid operand for instruction
6589 // CHECK-ERROR: zip2 v0.2d, v1.1d, v2.1d
6590 // CHECK-ERROR: ^
6591 // CHECK-ERROR: error: invalid operand for instruction
6592 // CHECK-ERROR: zip2 v0.1d, v1.1d, v2.1d
6593 // CHECK-ERROR: ^
64776594
64786595 trn1 v0.16b, v1.8b, v2.8b
6479 // CHECK-ERROR: [[@LINE-1]]:22: error: invalid operand for instruction
64806596 trn1 v0.8b, v1.4b, v2.4b
6481 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6482 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
64836597 trn1 v0.8h, v1.4h, v2.4h
6484 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
64856598 trn1 v0.4h, v1.2h, v2.2h
6486 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
64876599 trn1 v0.4s, v1.2s, v2.2s
6488 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
64896600 trn1 v0.2s, v1.1s, v2.1s
6490 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6491 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
64926601 trn1 v0.2d, v1.1d, v2.1d
6493 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
64946602 trn1 v0.1d, v1.1d, v2.1d
6495 // CHECK-ERROR: [[@LINE-1]]:14: error: invalid operand for instruction
6496
6497
6603
6604 // CHECK-ERROR: error: invalid operand for instruction
6605 // CHECK-ERROR: trn1 v0.16b, v1.8b, v2.8b
6606 // CHECK-ERROR: ^
6607 // CHECK-ERROR: error: invalid operand for instruction
6608 // CHECK-ERROR: trn1 v0.8b, v1.4b, v2.4b
6609 // CHECK-ERROR: ^
6610 // CHECK-ERROR: error: invalid operand for instruction
6611 // CHECK-ERROR: trn1 v0.8h, v1.4h, v2.4h
6612 // CHECK-ERROR: ^
6613 // CHECK-ERROR: error: invalid operand for instruction
6614 // CHECK-ERROR: trn1 v0.4h, v1.2h, v2.2h
6615 // CHECK-ERROR: ^
6616 // CHECK-ERROR: error: invalid operand for instruction
6617 // CHECK-ERROR: trn1 v0.4s, v1.2s, v2.2s
6618 // CHECK-ERROR: ^
6619 // CHECK-ERROR: error: invalid operand for instruction
6620 // CHECK-ERROR: trn1 v0.2s, v1.1s, v2.1s
6621 // CHECK-ERROR: ^
6622 // CHECK-ERROR: error: invalid operand for instruction
6623 // CHECK-ERROR: trn1 v0.2d, v1.1d, v2.1d
6624 // CHECK-ERROR: ^
6625 // CHECK-ERROR: error: invalid operand for instruction
6626 // CHECK-ERROR: trn1 v0.1d, v1.1d, v2.1d
6627 // CHECK-ERROR: ^
64986628
64996629 trn2 v0.16b, v1.8b, v2.8b
6500 // CHECK-ERROR: [[@LINE-1]]:22: error: invalid operand for instruction
65016630 trn2 v0.8b, v1.4b, v2.4b
6502 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6503 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
65046631 trn2 v0.8h, v1.4h, v2.4h
6505 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65066632 trn2 v0.4h, v1.2h, v2.2h
6507 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65086633 trn2 v0.4s, v1.2s, v2.2s
6509 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65106634 trn2 v0.2s, v1.1s, v2.1s
6511 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6512 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
65136635 trn2 v0.2d, v1.1d, v2.1d
6514 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65156636 trn2 v0.1d, v1.1d, v2.1d
6516 // CHECK-ERROR: [[@LINE-1]]:14: error: invalid operand for instruction
6637
6638 // CHECK-ERROR: error: invalid operand for instruction
6639 // CHECK-ERROR: trn2 v0.16b, v1.8b, v2.8b
6640 // CHECK-ERROR: ^
6641 // CHECK-ERROR: error: invalid operand for instruction
6642 // CHECK-ERROR: trn2 v0.8b, v1.4b, v2.4b
6643 // CHECK-ERROR: ^
6644 // CHECK-ERROR: error: invalid operand for instruction
6645 // CHECK-ERROR: trn2 v0.8h, v1.4h, v2.4h
6646 // CHECK-ERROR: ^
6647 // CHECK-ERROR: error: invalid operand for instruction
6648 // CHECK-ERROR: trn2 v0.4h, v1.2h, v2.2h
6649 // CHECK-ERROR: ^
6650 // CHECK-ERROR: error: invalid operand for instruction
6651 // CHECK-ERROR: trn2 v0.4s, v1.2s, v2.2s
6652 // CHECK-ERROR: ^
6653 // CHECK-ERROR: error: invalid operand for instruction
6654 // CHECK-ERROR: trn2 v0.2s, v1.1s, v2.1s
6655 // CHECK-ERROR: ^
6656 // CHECK-ERROR: error: invalid operand for instruction
6657 // CHECK-ERROR: trn2 v0.2d, v1.1d, v2.1d
6658 // CHECK-ERROR: ^
6659 // CHECK-ERROR: error: invalid operand for instruction
6660 // CHECK-ERROR: trn2 v0.1d, v1.1d, v2.1d
6661 // CHECK-ERROR: ^
65176662
65186663 //----------------------------------------------------------------------
65196664 // Permutation with 3 vectors
65206665 //----------------------------------------------------------------------
65216666
65226667 uzp1 v0.16b, v1.8b, v2.8b
6523 // CHECK-ERROR: [[@LINE-1]]:22: error: invalid operand for instruction
65246668 uzp1 v0.8b, v1.4b, v2.4b
6525 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6526 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
65276669 uzp1 v0.8h, v1.4h, v2.4h
6528 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65296670 uzp1 v0.4h, v1.2h, v2.2h
6530 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65316671 uzp1 v0.4s, v1.2s, v2.2s
6532 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65336672 uzp1 v0.2s, v1.1s, v2.1s
6534 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6535 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
65366673 uzp1 v0.2d, v1.1d, v2.1d
6537 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65386674 uzp1 v0.1d, v1.1d, v2.1d
6539 // CHECK-ERROR: [[@LINE-1]]:14: error: invalid operand for instruction
6675
6676 // CHECK-ERROR: error: invalid operand for instruction
6677 // CHECK-ERROR: uzp1 v0.16b, v1.8b, v2.8b
6678 // CHECK-ERROR: ^
6679 // CHECK-ERROR: error: invalid operand for instruction
6680 // CHECK-ERROR: uzp1 v0.8b, v1.4b, v2.4b
6681 // CHECK-ERROR: ^
6682 // CHECK-ERROR: error: invalid operand for instruction
6683 // CHECK-ERROR: uzp1 v0.8h, v1.4h, v2.4h
6684 // CHECK-ERROR: ^
6685 // CHECK-ERROR: error: invalid operand for instruction
6686 // CHECK-ERROR: uzp1 v0.4h, v1.2h, v2.2h
6687 // CHECK-ERROR: ^
6688 // CHECK-ERROR: error: invalid operand for instruction
6689 // CHECK-ERROR: uzp1 v0.4s, v1.2s, v2.2s
6690 // CHECK-ERROR: ^
6691 // CHECK-ERROR: error: invalid operand for instruction
6692 // CHECK-ERROR: uzp1 v0.2s, v1.1s, v2.1s
6693 // CHECK-ERROR: ^
6694 // CHECK-ERROR: error: invalid operand for instruction
6695 // CHECK-ERROR: uzp1 v0.2d, v1.1d, v2.1d
6696 // CHECK-ERROR: ^
6697 // CHECK-ERROR: error: invalid operand for instruction
6698 // CHECK-ERROR: uzp1 v0.1d, v1.1d, v2.1d
6699 // CHECK-ERROR: ^
65406700
65416701 uzp2 v0.16b, v1.8b, v2.8b
6542 // CHECK-ERROR: [[@LINE-1]]:22: error: invalid operand for instruction
65436702 uzp2 v0.8b, v1.4b, v2.4b
6544 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6545 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
65466703 uzp2 v0.8h, v1.4h, v2.4h
6547 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65486704 uzp2 v0.4h, v1.2h, v2.2h
6549 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65506705 uzp2 v0.4s, v1.2s, v2.2s
6551 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65526706 uzp2 v0.2s, v1.1s, v2.1s
6553 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6554 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
65556707 uzp2 v0.2d, v1.1d, v2.1d
6556 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65576708 uzp2 v0.1d, v1.1d, v2.1d
6558 // CHECK-ERROR: [[@LINE-1]]:14: error: invalid operand for instruction
6709
6710 // CHECK-ERROR: error: invalid operand for instruction
6711 // CHECK-ERROR: uzp2 v0.16b, v1.8b, v2.8b
6712 // CHECK-ERROR: ^
6713 // CHECK-ERROR: error: invalid operand for instruction
6714 // CHECK-ERROR: uzp2 v0.8b, v1.4b, v2.4b
6715 // CHECK-ERROR: ^
6716 // CHECK-ERROR: error: invalid operand for instruction
6717 // CHECK-ERROR: uzp2 v0.8h, v1.4h, v2.4h
6718 // CHECK-ERROR: ^
6719 // CHECK-ERROR: error: invalid operand for instruction
6720 // CHECK-ERROR: uzp2 v0.4h, v1.2h, v2.2h
6721 // CHECK-ERROR: ^
6722 // CHECK-ERROR: error: invalid operand for instruction
6723 // CHECK-ERROR: uzp2 v0.4s, v1.2s, v2.2s
6724 // CHECK-ERROR: ^
6725 // CHECK-ERROR: error: invalid operand for instruction
6726 // CHECK-ERROR: uzp2 v0.2s, v1.1s, v2.1s
6727 // CHECK-ERROR: ^
6728 // CHECK-ERROR: error: invalid operand for instruction
6729 // CHECK-ERROR: uzp2 v0.2d, v1.1d, v2.1d
6730 // CHECK-ERROR: ^
6731 // CHECK-ERROR: error: invalid operand for instruction
6732 // CHECK-ERROR: uzp2 v0.1d, v1.1d, v2.1d
6733 // CHECK-ERROR: ^
65596734
65606735 zip1 v0.16b, v1.8b, v2.8b
6561 // CHECK-ERROR: [[@LINE-1]]:22: error: invalid operand for instruction
65626736 zip1 v0.8b, v1.4b, v2.4b
6563 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6564 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
65656737 zip1 v0.8h, v1.4h, v2.4h
6566 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65676738 zip1 v0.4h, v1.2h, v2.2h
6568 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65696739 zip1 v0.4s, v1.2s, v2.2s
6570 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65716740 zip1 v0.2s, v1.1s, v2.1s
6572 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6573 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
65746741 zip1 v0.2d, v1.1d, v2.1d
6575 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65766742 zip1 v0.1d, v1.1d, v2.1d
6577 // CHECK-ERROR: [[@LINE-1]]:14: error: invalid operand for instruction
6578
6579
6580
6581
6743
6744 // CHECK-ERROR: error: invalid operand for instruction
6745 // CHECK-ERROR: zip1 v0.16b, v1.8b, v2.8b
6746 // CHECK-ERROR: ^
6747 // CHECK-ERROR: error: invalid operand for instruction
6748 // CHECK-ERROR: zip1 v0.8b, v1.4b, v2.4b
6749 // CHECK-ERROR: ^
6750 // CHECK-ERROR: error: invalid operand for instruction
6751 // CHECK-ERROR: zip1 v0.8h, v1.4h, v2.4h
6752 // CHECK-ERROR: ^
6753 // CHECK-ERROR: error: invalid operand for instruction
6754 // CHECK-ERROR: zip1 v0.4h, v1.2h, v2.2h
6755 // CHECK-ERROR: ^
6756 // CHECK-ERROR: error: invalid operand for instruction
6757 // CHECK-ERROR: zip1 v0.4s, v1.2s, v2.2s
6758 // CHECK-ERROR: ^
6759 // CHECK-ERROR: error: invalid operand for instruction
6760 // CHECK-ERROR: zip1 v0.2s, v1.1s, v2.1s
6761 // CHECK-ERROR: ^
6762 // CHECK-ERROR: error: invalid operand for instruction
6763 // CHECK-ERROR: zip1 v0.2d, v1.1d, v2.1d
6764 // CHECK-ERROR: ^
6765 // CHECK-ERROR: error: invalid operand for instruction
6766 // CHECK-ERROR: zip1 v0.1d, v1.1d, v2.1d
6767 // CHECK-ERROR: ^
65826768
65836769 zip2 v0.16b, v1.8b, v2.8b
6584 // CHECK-ERROR: [[@LINE-1]]:22: error: invalid operand for instruction
65856770 zip2 v0.8b, v1.4b, v2.4b
6586 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6587 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
65886771 zip2 v0.8h, v1.4h, v2.4h
6589 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65906772 zip2 v0.4h, v1.2h, v2.2h
6591 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65926773 zip2 v0.4s, v1.2s, v2.2s
6593 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65946774 zip2 v0.2s, v1.1s, v2.1s
6595 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6596 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
65976775 zip2 v0.2d, v1.1d, v2.1d
6598 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65996776 zip2 v0.1d, v1.1d, v2.1d
6600 // CHECK-ERROR: [[@LINE-1]]:14: error: invalid operand for instruction
6601
6602
6603
6777
6778 // CHECK-ERROR: error: invalid operand for instruction
6779 // CHECK-ERROR: zip2 v0.16b, v1.8b, v2.8b
6780 // CHECK-ERROR: ^
6781 // CHECK-ERROR: error: invalid operand for instruction
6782 // CHECK-ERROR: zip2 v0.8b, v1.4b, v2.4b
6783 // CHECK-ERROR: ^
6784 // CHECK-ERROR: error: invalid operand for instruction
6785 // CHECK-ERROR: zip2 v0.8h, v1.4h, v2.4h
6786 // CHECK-ERROR: ^
6787 // CHECK-ERROR: error: invalid operand for instruction
6788 // CHECK-ERROR: zip2 v0.4h, v1.2h, v2.2h
6789 // CHECK-ERROR: ^
6790 // CHECK-ERROR: error: invalid operand for instruction
6791 // CHECK-ERROR: zip2 v0.4s, v1.2s, v2.2s
6792 // CHECK-ERROR: ^
6793 // CHECK-ERROR: error: invalid operand for instruction
6794 // CHECK-ERROR: zip2 v0.2s, v1.1s, v2.1s
6795 // CHECK-ERROR: ^
6796 // CHECK-ERROR: error: invalid operand for instruction
6797 // CHECK-ERROR: zip2 v0.2d, v1.1d, v2.1d
6798 // CHECK-ERROR: ^
6799 // CHECK-ERROR: error: invalid operand for instruction
6800 // CHECK-ERROR: zip2 v0.1d, v1.1d, v2.1d
6801 // CHECK-ERROR: ^
66046802
66056803 trn1 v0.16b, v1.8b, v2.8b
6606 // CHECK-ERROR: [[@LINE-1]]:22: error: invalid operand for instruction
66076804 trn1 v0.8b, v1.4b, v2.4b
6608 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6609 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
66106805 trn1 v0.8h, v1.4h, v2.4h
6611 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
66126806 trn1 v0.4h, v1.2h, v2.2h
6613 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
66146807 trn1 v0.4s, v1.2s, v2.2s
6615 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
66166808 trn1 v0.2s, v1.1s, v2.1s
6617 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6618 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
66196809 trn1 v0.2d, v1.1d, v2.1d
6620 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
66216810 trn1 v0.1d, v1.1d, v2.1d
6622 // CHECK-ERROR: [[@LINE-1]]:14: error: invalid operand for instruction
6623
6624
6811
6812 // CHECK-ERROR: error: invalid operand for instruction
6813 // CHECK-ERROR: trn1 v0.16b, v1.8b, v2.8b
6814 // CHECK-ERROR: ^
6815 // CHECK-ERROR: error: invalid operand for instruction
6816 // CHECK-ERROR: trn1 v0.8b, v1.4b, v2.4b
6817 // CHECK-ERROR: ^
6818 // CHECK-ERROR: error: invalid operand for instruction
6819 // CHECK-ERROR: trn1 v0.8h, v1.4h, v2.4h
6820 // CHECK-ERROR: ^
6821 // CHECK-ERROR: error: invalid operand for instruction
6822 // CHECK-ERROR: trn1 v0.4h, v1.2h, v2.2h
6823 // CHECK-ERROR: ^
6824 // CHECK-ERROR: error: invalid operand for instruction
6825 // CHECK-ERROR: trn1 v0.4s, v1.2s, v2.2s
6826 // CHECK-ERROR: ^
6827 // CHECK-ERROR: error: invalid operand for instruction
6828 // CHECK-ERROR: trn1 v0.2s, v1.1s, v2.1s
6829 // CHECK-ERROR: ^
6830 // CHECK-ERROR: error: invalid operand for instruction
6831 // CHECK-ERROR: trn1 v0.2d, v1.1d, v2.1d
6832 // CHECK-ERROR: ^
6833 // CHECK-ERROR: error: invalid operand for instruction
6834 // CHECK-ERROR: trn1 v0.1d, v1.1d, v2.1d
6835 // CHECK-ERROR: ^
66256836
66266837 trn2 v0.16b, v1.8b, v2.8b
6627 // CHECK-ERROR: [[@LINE-1]]:22: error: invalid operand for instruction
66286838 trn2 v0.8b, v1.4b, v2.4b
6629 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6630 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
66316839 trn2 v0.8h, v1.4h, v2.4h
6632 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
66336840 trn2 v0.4h, v1.2h, v2.2h
6634 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
66356841 trn2 v0.4s, v1.2s, v2.2s
6636 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
66376842 trn2 v0.2s, v1.1s, v2.1s
6638 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6639 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
66406843 trn2 v0.2d, v1.1d, v2.1d
6641 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
66426844 trn2 v0.1d, v1.1d, v2.1d
6643 // CHECK-ERROR: [[@LINE-1]]:14: error: invalid operand for instruction
6644
6645
6845
6846 // CHECK-ERROR: error: invalid operand for instruction
6847 // CHECK-ERROR: trn2 v0.16b, v1.8b, v2.8b
6848 // CHECK-ERROR: ^
6849 // CHECK-ERROR: error: invalid operand for instruction
6850 // CHECK-ERROR: trn2 v0.8b, v1.4b, v2.4b
6851 // CHECK-ERROR: ^
6852 // CHECK-ERROR: error: invalid operand for instruction
6853 // CHECK-ERROR: trn2 v0.8h, v1.4h, v2.4h
6854 // CHECK-ERROR: ^
6855 // CHECK-ERROR: error: invalid operand for instruction
6856 // CHECK-ERROR: trn2 v0.4h, v1.2h, v2.2h
6857 // CHECK-ERROR: ^
6858 // CHECK-ERROR: error: invalid operand for instruction
6859 // CHECK-ERROR: trn2 v0.4s, v1.2s, v2.2s
6860 // CHECK-ERROR: ^
6861 // CHECK-ERROR: error: invalid operand for instruction
6862 // CHECK-ERROR: trn2 v0.2s, v1.1s, v2.1s
6863 // CHECK-ERROR: ^
6864 // CHECK-ERROR: error: invalid operand for instruction
6865 // CHECK-ERROR: trn2 v0.2d, v1.1d, v2.1d
6866 // CHECK-ERROR: ^
6867 // CHECK-ERROR: error: invalid operand for instruction
6868 // CHECK-ERROR: trn2 v0.1d, v1.1d, v2.1d
6869 // CHECK-ERROR: ^
66466870
66476871 //----------------------------------------------------------------------
66486872 // Floating Point multiply (scalar, by element)