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R600/SI: Rename SOPP operands to match the encoding fields git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213526 91177308-0d34-0410-b5e6-96231b3b80d8 Tom Stellard 6 years ago
2 changed file(s) with 20 addition(s) and 20 deletion(s). Raw diff Collapse all Expand all
141141 asm,
142142 pattern > {
143143
144 bits <16> SIMM16;
145
146 let Inst{15-0} = SIMM16;
144 bits <16> simm16;
145
146 let Inst{15-0} = simm16;
147147 let Inst{22-16} = op;
148148 let Inst{31-23} = 0x17f; // encoding
149149
364364 // SOPP Instructions
365365 //===----------------------------------------------------------------------===//
366366
367 def S_NOP : SOPP <0x00000000, (ins i16imm:$SIMM16), "S_NOP $SIMM16", []>;
367 def S_NOP : SOPP <0x00000000, (ins i16imm:$simm16), "S_NOP $simm16", []>;
368368
369369 let isTerminator = 1 in {
370370
371371 def S_ENDPGM : SOPP <0x00000001, (ins), "S_ENDPGM",
372372 [(IL_retflag)]> {
373 let SIMM16 = 0;
373 let simm16 = 0;
374374 let isBarrier = 1;
375375 let hasCtrlDep = 1;
376376 }
377377
378378 let isBranch = 1 in {
379379 def S_BRANCH : SOPP <
380 0x00000002, (ins brtarget:$target), "S_BRANCH $target",
381 [(br bb:$target)]> {
380 0x00000002, (ins brtarget:$simm16), "S_BRANCH $simm16",
381 [(br bb:$simm16)]> {
382382 let isBarrier = 1;
383383 }
384384
385385 let DisableEncoding = "$scc" in {
386386 def S_CBRANCH_SCC0 : SOPP <
387 0x00000004, (ins brtarget:$target, SCCReg:$scc),
388 "S_CBRANCH_SCC0 $target", []
387 0x00000004, (ins brtarget:$simm16, SCCReg:$scc),
388 "S_CBRANCH_SCC0 $simm16", []
389389 >;
390390 def S_CBRANCH_SCC1 : SOPP <
391 0x00000005, (ins brtarget:$target, SCCReg:$scc),
392 "S_CBRANCH_SCC1 $target",
391 0x00000005, (ins brtarget:$simm16, SCCReg:$scc),
392 "S_CBRANCH_SCC1 $simm16",
393393 []
394394 >;
395395 } // End DisableEncoding = "$scc"
396396
397397 def S_CBRANCH_VCCZ : SOPP <
398 0x00000006, (ins brtarget:$target, VCCReg:$vcc),
399 "S_CBRANCH_VCCZ $target",
398 0x00000006, (ins brtarget:$simm16, VCCReg:$vcc),
399 "S_CBRANCH_VCCZ $simm16",
400400 []
401401 >;
402402 def S_CBRANCH_VCCNZ : SOPP <
403 0x00000007, (ins brtarget:$target, VCCReg:$vcc),
404 "S_CBRANCH_VCCNZ $target",
403 0x00000007, (ins brtarget:$simm16, VCCReg:$vcc),
404 "S_CBRANCH_VCCNZ $simm16",
405405 []
406406 >;
407407
408408 let DisableEncoding = "$exec" in {
409409 def S_CBRANCH_EXECZ : SOPP <
410 0x00000008, (ins brtarget:$target, EXECReg:$exec),
411 "S_CBRANCH_EXECZ $target",
410 0x00000008, (ins brtarget:$simm16, EXECReg:$exec),
411 "S_CBRANCH_EXECZ $simm16",
412412 []
413413 >;
414414 def S_CBRANCH_EXECNZ : SOPP <
415 0x00000009, (ins brtarget:$target, EXECReg:$exec),
416 "S_CBRANCH_EXECNZ $target",
415 0x00000009, (ins brtarget:$simm16, EXECReg:$exec),
416 "S_CBRANCH_EXECNZ $simm16",
417417 []
418418 >;
419419 } // End DisableEncoding = "$exec"
426426 def S_BARRIER : SOPP <0x0000000a, (ins), "S_BARRIER",
427427 [(int_AMDGPU_barrier_local)]
428428 > {
429 let SIMM16 = 0;
429 let simm16 = 0;
430430 let isBarrier = 1;
431431 let hasCtrlDep = 1;
432432 let mayLoad = 1;