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[stackprotector] Allow for copies from vreg -> vreg to be in a terminator sequence. Sometimes a copy from a vreg -> vreg sneaks into the middle of a terminator sequence. It is safe to slice this into the stack protector success bb. This fixes PR16979. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191260 91177308-0d34-0410-b5e6-96231b3b80d8 Michael Gottesman 6 years ago
2 changed file(s) with 89 addition(s) and 6 deletion(s). Raw diff Collapse all Expand all
11641164 // sequence, so we return true in that case.
11651165 return MI->isDebugValue();
11661166
1167 // If we are not defining a register that is a physical register via a copy or
1168 // are defining a register via an implicit def, we have left the terminator
1169 // sequence.
1170 MachineInstr::const_mop_iterator OPI = MI->operands_begin();
1171 if (!OPI->isReg() || !OPI->isDef() ||
1167 // We have left the terminator sequence if we are not doing one of the
1168 // following:
1169 //
1170 // 1. Copying a vreg into a physical register.
1171 // 2. Copying a vreg into a vreg.
1172 // 3. Defining a register via an implicit def.
1173
1174 // OPI should always be a register definition...
1175 MachineInstr::const_mop_iterator OPI = MI->operands_begin();
1176 if (!OPI->isReg() || !OPI->isDef())
1177 return false;
1178
1179 // Defining any register via an implicit def is always ok.
1180 if (MI->isImplicitDef())
1181 return true;
1182
1183 // Grab the copy source...
1184 MachineInstr::const_mop_iterator OPI2 = OPI;
1185 ++OPI2;
1186 assert(OPI2 != MI->operands_end()
1187 && "Should have a copy implying we should have 2 arguments.");
1188
1189 // Make sure that the copy dest is not a vreg when the copy source is a
1190 // physical register.
1191 if (!OPI2->isReg() ||
11721192 (!TargetRegisterInfo::isPhysicalRegister(OPI->getReg()) &&
1173 !MI->isImplicitDef()))
1193 TargetRegisterInfo::isPhysicalRegister(OPI2->getReg())))
11741194 return false;
11751195
11761196 return true;
0 ; RUN: llc -mtriple i386-unknown-freebsd10.0 -march=x86 --relocation-model=pic %s -o -
1
2 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32-S128"
3 target triple = "i386-unknown-freebsd10.0"
4
5 @state = internal unnamed_addr global i32 0, align 4
6
7 ; Function Attrs: nounwind sspreq
8 define void @set_state(i32 %s) #0 {
9 entry:
10 store i32 %s, i32* @state, align 4, !tbaa !0
11 ret void
12 }
13
14 ; Function Attrs: nounwind sspreq
15 define void @zero_char(i8* nocapture %p) #0 {
16 entry:
17 store i8 0, i8* %p, align 1, !tbaa !1
18 tail call void @g(i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0) #2
19 ret void
20 }
21
22 declare void @g(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) #1
23
24 ; Function Attrs: nounwind sspreq
25 define void @do_something(i32 %i) #0 {
26 entry:
27 %data = alloca [8 x i8], align 1
28 %0 = load i32* @state, align 4, !tbaa !0
29 %cmp = icmp eq i32 %0, 0
30 br i1 %cmp, label %if.then, label %if.else
31
32 if.then: ; preds = %entry
33 tail call fastcc void @send_int(i32 0)
34 br label %if.end
35
36 if.else: ; preds = %entry
37 tail call fastcc void @send_int(i32 %i)
38 %arrayidx = getelementptr inbounds [8 x i8]* %data, i32 0, i32 0
39 call void @zero_char(i8* %arrayidx)
40 br label %if.end
41
42 if.end: ; preds = %if.else, %if.then
43 ret void
44 }
45
46 ; Function Attrs: nounwind sspreq
47 define internal fastcc void @send_int(i32 %p) #0 {
48 entry:
49 tail call void @f(i32 %p) #2
50 tail call void @g(i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0) #2
51 ret void
52 }
53
54 declare void @f(i32) #1
55
56 attributes #0 = { nounwind sspreq "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
57 attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
58 attributes #2 = { nounwind }
59
60 !0 = metadata !{metadata !"int", metadata !1}
61 !1 = metadata !{metadata !"omnipotent char", metadata !2}
62 !2 = metadata !{metadata !"Simple C/C++ TBAA"}