llvm.org GIT mirror llvm / ee34987
Really control isel of barrier instructions with cpu feature. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110787 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 10 years ago
2 changed file(s) with 4 addition(s) and 4 deletion(s). Raw diff Collapse all Expand all
23702370 // memory barriers protect the atomic sequences
23712371 let hasSideEffects = 1 in {
23722372 def DMBsy : AInoP<(outs), (ins), Pseudo, NoItinerary, "dmb", "",
2373 [(ARMMemBarrier)]>, Requires<[IsARM, HasV7]> {
2373 [(ARMMemBarrier)]>, Requires<[IsARM, HasDB]> {
23742374 let Inst{31-4} = 0xf57ff05;
23752375 // FIXME: add support for options other than a full system DMB
23762376 // See DMB disassembly-only variants below.
23782378 }
23792379
23802380 def DSBsy : AInoP<(outs), (ins), Pseudo, NoItinerary, "dsb", "",
2381 [(ARMSyncBarrier)]>, Requires<[IsARM, HasV7]> {
2381 [(ARMSyncBarrier)]>, Requires<[IsARM, HasDB]> {
23822382 let Inst{31-4} = 0xf57ff04;
23832383 // FIXME: add support for options other than a full system DSB
23842384 // See DSB disassembly-only variants below.
22292229 // memory barriers protect the atomic sequences
22302230 let hasSideEffects = 1 in {
22312231 def t2DMBsy : AInoP<(outs), (ins), ThumbFrm, NoItinerary, "dmb", "",
2232 [(ARMMemBarrier)]>, Requires<[HasDB]> {
2232 [(ARMMemBarrier)]>, Requires<[IsThumb, HasDB]> {
22332233 let Inst{31-4} = 0xF3BF8F5;
22342234 // FIXME: add support for options other than a full system DMB
22352235 let Inst{3-0} = 0b1111;
22362236 }
22372237
22382238 def t2DSBsy : AInoP<(outs), (ins), ThumbFrm, NoItinerary, "dsb", "",
2239 [(ARMSyncBarrier)]>, Requires<[HasDB]> {
2239 [(ARMSyncBarrier)]>, Requires<[IsThumb, HasDB]> {
22402240 let Inst{31-4} = 0xF3BF8F4;
22412241 // FIXME: add support for options other than a full system DSB
22422242 let Inst{3-0} = 0b1111;