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TableGen: Add operator !or git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286936 91177308-0d34-0410-b5e6-96231b3b80d8 Matt Arsenault 2 years ago
7 changed file(s) with 23 addition(s) and 4 deletion(s). Raw diff Collapse all Expand all
9696 BangOperator: one of
9797 :!eq !if !head !tail !con
9898 :!add !shl !sra !srl !and
99 :!cast !empty !subst !foreach !listconcat !strconcat
99 :!or !empty !subst !foreach !strconcat
100 :!cast !listconcat
101
100102
101103 Syntax
102104 ======
797797 ///
798798 class BinOpInit : public OpInit, public FoldingSetNode {
799799 public:
800 enum BinaryOp : uint8_t { ADD, AND, SHL, SRA, SRL, LISTCONCAT,
800 enum BinaryOp : uint8_t { ADD, AND, OR, SHL, SRA, SRL, LISTCONCAT,
801801 STRCONCAT, CONCAT, EQ };
802802
803803 private:
864864 }
865865 case ADD:
866866 case AND:
867 case OR:
867868 case SHL:
868869 case SRA:
869870 case SRL: {
878879 default: llvm_unreachable("Bad opcode!");
879880 case ADD: Result = LHSv + RHSv; break;
880881 case AND: Result = LHSv & RHSv; break;
882 case OR: Result = LHSv | RHSv; break;
881883 case SHL: Result = LHSv << RHSv; break;
882884 case SRA: Result = LHSv >> RHSv; break;
883885 case SRL: Result = (uint64_t)LHSv >> (uint64_t)RHSv; break;
905907 case CONCAT: Result = "!con"; break;
906908 case ADD: Result = "!add"; break;
907909 case AND: Result = "!and"; break;
910 case OR: Result = "!or"; break;
908911 case SHL: Result = "!shl"; break;
909912 case SRA: Result = "!sra"; break;
910913 case SRL: Result = "!srl"; break;
471471 .Case("con", tgtok::XConcat)
472472 .Case("add", tgtok::XADD)
473473 .Case("and", tgtok::XAND)
474 .Case("or", tgtok::XOR)
474475 .Case("shl", tgtok::XSHL)
475476 .Case("sra", tgtok::XSRA)
476477 .Case("srl", tgtok::XSRL)
4444 // Keywords.
4545 Bit, Bits, Class, Code, Dag, Def, Foreach, Defm, Field, In, Int, Let, List,
4646 MultiClass, String,
47
47
4848 // !keywords.
49 XConcat, XADD, XAND, XSRA, XSRL, XSHL, XListConcat, XStrConcat, XCast,
49 XConcat, XADD, XAND, XOR, XSRA, XSRL, XSHL, XListConcat, XStrConcat, XCast,
5050 XSubst, XForEach, XHead, XTail, XEmpty, XIf, XEq,
5151
5252 // Integer value.
880880 case tgtok::XConcat:
881881 case tgtok::XADD:
882882 case tgtok::XAND:
883 case tgtok::XOR:
883884 case tgtok::XSRA:
884885 case tgtok::XSRL:
885886 case tgtok::XSHL:
898899 case tgtok::XConcat: Code = BinOpInit::CONCAT;Type = DagRecTy::get(); break;
899900 case tgtok::XADD: Code = BinOpInit::ADD; Type = IntRecTy::get(); break;
900901 case tgtok::XAND: Code = BinOpInit::AND; Type = IntRecTy::get(); break;
902 case tgtok::XOR: Code = BinOpInit::OR; Type = IntRecTy::get(); break;
901903 case tgtok::XSRA: Code = BinOpInit::SRA; Type = IntRecTy::get(); break;
902904 case tgtok::XSRL: Code = BinOpInit::SRL; Type = IntRecTy::get(); break;
903905 case tgtok::XSHL: Code = BinOpInit::SHL; Type = IntRecTy::get(); break;
14451447 case tgtok::XConcat:
14461448 case tgtok::XADD:
14471449 case tgtok::XAND:
1450 case tgtok::XOR:
14481451 case tgtok::XSRA:
14491452 case tgtok::XSRL:
14501453 case tgtok::XSHL:
1414 int Value = value;
1515 }
1616
17 def v1022 : Int<1022>;
18
1719 // CHECK: def v0
1820 // CHECK: Value = 0
1921
2022 // CHECK: def v1
2123 // CHECK: Value = 1
24
25 // CHECK: def v1023
26 // CHECK: Value = 1023
27 def v1023 : Int;
2228
2329 def v1024 : Int<1024>;
2430 // CHECK: def v1024
3440
3541 def v0 : Int;
3642 def v1 : Int;
43
44 // CHECK: def v3072
45 // CHECK: Value = 3072
46 def v3072 : Int;