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Added getReservedRegs(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34376 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 12 years ago
13 changed file(s) with 118 addition(s) and 10 deletion(s). Raw diff Collapse all Expand all
2727 #include "llvm/Target/TargetFrameInfo.h"
2828 #include "llvm/Target/TargetMachine.h"
2929 #include "llvm/Target/TargetOptions.h"
30 #include "llvm/ADT/BitVector.h"
3031 #include "llvm/ADT/SmallVector.h"
3132 #include "llvm/ADT/STLExtras.h"
3233 #include
294295 0
295296 };
296297 return CalleeSavedRegClasses;
298 }
299
300 BitVector ARMRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
301 BitVector Reserved(getNumRegs());
302 Reserved.set(ARM::SP);
303 if (STI.isTargetDarwin() || hasFP(MF))
304 Reserved.set(FramePtr);
305 // Some targets reserve R9.
306 if (STI.isR9Reserved())
307 Reserved.set(ARM::R9);
308 // At PEI time, if LR is used, it will be spilled upon entry.
309 if (MF.getUsedPhysregs() && !MF.isPhysRegUsed((unsigned)ARM::LR))
310 Reserved.set(ARM::LR);
311 return Reserved;
297312 }
298313
299314 /// hasFP - Return true if the specified function should have a dedicated frame
6666
6767 const TargetRegisterClass* const* getCalleeSavedRegClasses() const;
6868
69 BitVector getReservedRegs(const MachineFunction &MF) const;
70
6971 bool hasFP(const MachineFunction &MF) const;
7072
7173 void eliminateCallFramePseudoInstr(MachineFunction &MF,
2727 #include "llvm/Target/TargetInstrInfo.h"
2828 #include "llvm/Support/CommandLine.h"
2929 #include "llvm/Support/Debug.h"
30 #include "llvm/ADT/BitVector.h"
3031 #include "llvm/ADT/STLExtras.h"
3132 #include
3233 using namespace llvm;
177178 return CalleeSavedRegClasses;
178179 }
179180
181 BitVector AlphaRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
182 BitVector Reserved(getNumRegs());
183 Reserved.set(Alpha::R15);
184 Reserved.set(Alpha::R30);
185 Reserved.set(Alpha::R31);
186 return Reserved;
187 }
188
180189 //===----------------------------------------------------------------------===//
181190 // Stack Frame Processing methods
182191 //===----------------------------------------------------------------------===//
4848
4949 const TargetRegisterClass* const* getCalleeSavedRegClasses() const;
5050
51 BitVector getReservedRegs(const MachineFunction &MF) const;
52
5153 bool hasFP(const MachineFunction &MF) const;
5254
5355 void eliminateCallFramePseudoInstr(MachineFunction &MF,
2727 #include "llvm/Target/TargetOptions.h"
2828 #include "llvm/Target/TargetInstrInfo.h"
2929 #include "llvm/Support/CommandLine.h"
30 #include "llvm/ADT/BitVector.h"
3031 #include "llvm/ADT/STLExtras.h"
3132 using namespace llvm;
3233
103104 &IA64::GRRegClass, 0
104105 };
105106 return CalleeSavedRegClasses;
107 }
108
109 BitVector IA64RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
110 BitVector Reserved(getNumRegs());
111 Reserved.set(IA64::r0);
112 Reserved.set(IA64::r1);
113 Reserved.set(IA64::r2);
114 Reserved.set(IA64::r5);
115 Reserved.set(IA64::r12);
116 Reserved.set(IA64::r13);
117 Reserved.set(IA64::r22);
118 Reserved.set(IA64::rp);
119 return Reserved;
106120 }
107121
108122 //===----------------------------------------------------------------------===//
4747
4848 const TargetRegisterClass* const* getCalleeSavedRegClasses() const;
4949
50 BitVector getReservedRegs(const MachineFunction &MF) const;
51
5052 bool hasFP(const MachineFunction &MF) const;
5153
5254 void eliminateCallFramePseudoInstr(MachineFunction &MF,
4040 const TargetRegisterClass *RC = *I;
4141 for (TargetRegisterClass::iterator I = RC->allocation_order_begin(MF),
4242 E = RC->allocation_order_end(MF); I != E; ++I)
43 Allocatable[*I] = true;
43 Allocatable.set(*I);
4444 }
4545 return Allocatable;
4646 }
3333 #include "llvm/Support/CommandLine.h"
3434 #include "llvm/Support/Debug.h"
3535 #include "llvm/Support/MathExtras.h"
36 #include "llvm/ADT/BitVector.h"
3637 #include "llvm/ADT/STLExtras.h"
3738 #include
3839 using namespace llvm;
337338 Darwin32_CalleeSavedRegClasses;
338339 }
339340
341 // needsFP - Return true if the specified function should have a dedicated frame
342 // pointer register. This is true if the function has variable sized allocas or
343 // if frame pointer elimination is disabled.
344 //
345 static bool needsFP(const MachineFunction &MF) {
346 const MachineFrameInfo *MFI = MF.getFrameInfo();
347 return NoFramePointerElim || MFI->hasVarSizedObjects();
348 }
349
350 BitVector PPCRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
351 BitVector Reserved(getNumRegs());
352 Reserved.set(PPC::R0);
353 Reserved.set(PPC::R1);
354 Reserved.set(PPC::LR);
355 // In Linux, r2 is reserved for the OS.
356 if (!Subtarget.isDarwin())
357 Reserved.set(PPC::R2);
358 // On PPC64, r13 is the thread pointer. Never allocate this register.
359 // Note that this is overconservative, as it also prevents allocation of
360 // R31 when the FP is not needed.
361 if (Subtarget.isPPC64()) {
362 Reserved.set(PPC::R13);
363 Reserved.set(PPC::R31);
364 }
365 if (needsFP(MF))
366 Reserved.set(PPC::R31);
367 return Reserved;
368 }
369
340370 /// foldMemoryOperand - PowerPC (like most RISC's) can only fold spills into
341371 /// copy instructions, turning them into load/store instructions.
342372 MachineInstr *PPCRegisterInfo::foldMemoryOperand(MachineInstr *MI,
396426 //===----------------------------------------------------------------------===//
397427 // Stack Frame Processing methods
398428 //===----------------------------------------------------------------------===//
399
400 // needsFP - Return true if the specified function should have a dedicated frame
401 // pointer register. This is true if the function has variable sized allocas or
402 // if frame pointer elimination is disabled.
403 //
404 static bool needsFP(const MachineFunction &MF) {
405 const MachineFrameInfo *MFI = MF.getFrameInfo();
406 return NoFramePointerElim || MFI->hasVarSizedObjects();
407 }
408429
409430 // hasFP - Return true if the specified function actually has a dedicated frame
410431 // pointer register. This is true if the function needs a frame pointer and has
5757
5858 const TargetRegisterClass* const* getCalleeSavedRegClasses() const;
5959
60 BitVector getReservedRegs(const MachineFunction &MF) const;
61
6062 /// targetHandlesStackFrameRounding - Returns true if the target is
6163 /// responsible for rounding up the stack frame (probably at emitPrologue
6264 /// time).
1919 #include "llvm/CodeGen/MachineLocation.h"
2020 #include "llvm/Target/TargetInstrInfo.h"
2121 #include "llvm/Type.h"
22 #include "llvm/ADT/BitVector.h"
2223 #include "llvm/ADT/STLExtras.h"
2324 using namespace llvm;
2425
115116 return CalleeSavedRegs;
116117 }
117118
119 BitVector SparcRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
120 BitVector Reserved(getNumRegs());
121 Reserved.set(SP::G2);
122 Reserved.set(SP::G3);
123 Reserved.set(SP::G4);
124 Reserved.set(SP::O6);
125 Reserved.set(SP::I6);
126 Reserved.set(SP::I7);
127 Reserved.set(SP::G0);
128 Reserved.set(SP::G5);
129 Reserved.set(SP::G6);
130 Reserved.set(SP::G7);
131 return Reserved;
132 }
133
134
118135 const TargetRegisterClass* const*
119136 SparcRegisterInfo::getCalleeSavedRegClasses() const {
120137 static const TargetRegisterClass * const CalleeSavedRegClasses[] = { 0 };
5151
5252 const TargetRegisterClass* const* getCalleeSavedRegClasses() const;
5353
54 BitVector getReservedRegs(const MachineFunction &MF) const;
55
5456 bool hasFP(const MachineFunction &MF) const;
5557
5658 void eliminateCallFramePseudoInstr(MachineFunction &MF,
3030 #include "llvm/Target/TargetMachine.h"
3131 #include "llvm/Target/TargetOptions.h"
3232 #include "llvm/Support/CommandLine.h"
33 #include "llvm/ADT/BitVector.h"
3334 #include "llvm/ADT/STLExtras.h"
3435 using namespace llvm;
3536
882883 return Is64Bit ? CalleeSavedRegClasses64Bit : CalleeSavedRegClasses32Bit;
883884 }
884885
886 BitVector X86RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
887 BitVector Reserved(getNumRegs());
888 Reserved.set(X86::RSP);
889 Reserved.set(X86::ESP);
890 Reserved.set(X86::SP);
891 Reserved.set(X86::SPL);
892 if (hasFP(MF)) {
893 Reserved.set(X86::RBP);
894 Reserved.set(X86::EBP);
895 Reserved.set(X86::BP);
896 Reserved.set(X86::BPL);
897 }
898 return Reserved;
899 }
900
885901 //===----------------------------------------------------------------------===//
886902 // Stack Frame Processing methods
887903 //===----------------------------------------------------------------------===//
7777 /// length of this list match the getCalleeSavedRegs() list.
7878 const TargetRegisterClass* const* getCalleeSavedRegClasses() const;
7979
80 /// getReservedRegs - Returns a bitset indexed by physical register number
81 /// indicating if a register is a special register that has particular uses and
82 /// should be considered unavailable at all times, e.g. SP, RA. This is used by
83 /// register scavenger to determine what registers are free.
84 BitVector getReservedRegs(const MachineFunction &MF) const;
85
8086 bool hasFP(const MachineFunction &MF) const;
8187
8288 void eliminateCallFramePseudoInstr(MachineFunction &MF,