llvm.org GIT mirror llvm / ec59b95
Don't hard-code the mask size to be 32, which is incorrect on ppc64 and was causing aborts with the new APInt changes. This may also be fixing an obscure ppc64 bug. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47692 91177308-0d34-0410-b5e6-96231b3b80d8 Dan Gohman 12 years ago
2 changed file(s) with 32 addition(s) and 3 deletion(s). Raw diff Collapse all Expand all
740740 APInt LHSKnownZero, LHSKnownOne;
741741 APInt RHSKnownZero, RHSKnownOne;
742742 DAG.ComputeMaskedBits(N.getOperand(0),
743 APInt::getAllOnesValue(32),
743 APInt::getAllOnesValue(N.getOperand(0)
744 .getValueSizeInBits()),
744745 LHSKnownZero, LHSKnownOne);
745746
746747 if (LHSKnownZero.getBoolValue()) {
747748 DAG.ComputeMaskedBits(N.getOperand(1),
748 APInt::getAllOnesValue(32),
749 APInt::getAllOnesValue(N.getOperand(1)
750 .getValueSizeInBits()),
749751 RHSKnownZero, RHSKnownOne);
750752 // If all of the bits are known zero on the LHS or RHS, the add won't
751753 // carry.
752 if ((LHSKnownZero | RHSKnownZero) == ~0U) {
754 if (~(LHSKnownZero | RHSKnownZero) == 0) {
753755 Base = N.getOperand(0);
754756 Index = N.getOperand(1);
755757 return true;
0 ; RUN: llvm-as < %s | llc
1
2 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
3 target triple = "powerpc64-apple-darwin9.2.0"
4 %struct.re_pattern_buffer = type <{ i8*, i64, i8, [7 x i8] }>
5
6 define i32 @xre_search_2(%struct.re_pattern_buffer* %bufp, i32 %range) nounwind {
7 entry:
8 br i1 false, label %bb16, label %bb49
9
10 bb16: ; preds = %entry
11 %tmp19 = load i8** null, align 1 ; [#uses=1]
12 %tmp21 = load i8* %tmp19, align 1 ; [#uses=1]
13 switch i8 %tmp21, label %bb49 [
14 i8 0, label %bb45
15 i8 1, label %bb34
16 ]
17
18 bb34: ; preds = %bb16
19 ret i32 0
20
21 bb45: ; preds = %bb16
22 ret i32 -1
23
24 bb49: ; preds = %bb16, %entry
25 ret i32 0
26 }