llvm.org GIT mirror llvm / ec15d70
Add overall description, file comments, some structure git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204479 91177308-0d34-0410-b5e6-96231b3b80d8 Renato Golin 5 years ago
1 changed file(s) with 139 addition(s) and 24 deletion(s). Raw diff Collapse all Expand all
3131 of its purpose with a list of users, output generated from generic input, and
3232 finally why it needed a new backend (in case there's something similar).
3333
34 Emitter
35 -------
36
37 Generate machine code emitter.
34 Overall, each backend will take the same TableGen file type and transform into
35 similar output for different targets/uses. There is an implicit contract between
36 the TableGen files, the back-ends and their users.
37
38 For instance, a global contract is that each back-end produces macro-guarded
39 sections. Based on whether the file is included by a header or a source file,
40 or even in which context of each file the include is being used, you have
41 todefine a macro just before including it, to get the right output:
42
43 .. code-block:: c++
44
45 #define GET_REGINFO_TARGET_DESC
46 #include "ARMGenRegisterInfo.inc"
47
48 And just part of the generated file would be included. This is useful if
49 you need the same information in multiple formats (instantiation, initialization,
50 getter/setter functions, etc) from the same source TableGen file without having
51 to re-compile the TableGen file multiple times.
52
53 Sometimes, multiple macros might be defined before the same include file to
54 output multiple blocks:
55
56 .. code-block:: c++
57
58 #define GET_REGISTER_MATCHER
59 #define GET_SUBTARGET_FEATURE_NAME
60 #define GET_MATCHER_IMPLEMENTATION
61 #include "ARMGenAsmMatcher.inc"
62
63 The macros will be undef'd automatically as they're used, in the include file.
64
65 On all LLVM back-ends, the ``llvm-tblgen`` binary will be executed on the root
66 TableGen file ``.td``, which should include all others. This guarantees
67 that all information needed is accessible, and that no duplication is needed
68 in the TbleGen files.
69
70 CodeEmitter
71 -----------
72
73 **Purpose**: CodeEmitterGen uses the descriptions of instructions and their fields to
74 construct an automated code emitter: a function that, given a MachineInstr,
75 returns the (currently, 32-bit unsigned) value of the instruction.
76
77 **Output**: C++ code, implementing the target's CodeEmitter
78 class by overriding the virtual functions as ``CodeEmitter::function()``.
79
80 **Usage**: Used to include directly at the end of ``CodeEmitter.cpp``, and
81 with option `-mc-emitter` to be included in ``MCCodeEmitter.cpp``.
3882
3983 RegisterInfo
4084 ------------
4185
42 Generate registers and register classes info.
86 **Purpose**: This tablegen backend is responsible for emitting a description of a target
87 register file for a code generator. It uses instances of the Register,
88 RegisterAliases, and RegisterClass classes to gather this information.
89
90 **Output**: C++ code with enums and structures representing the register mappings,
91 properties, masks, etc.
92
93 **Usage**: Both on ``BaseRegisterInfo`` and ``MCTargetDesc`` (headers
94 and source files) with macros defining in which they are for declaration vs.
95 initialization issues.
4396
4497 InstrInfo
4598 ---------
4699
47 Generate instruction descriptions.
100 **Purpose**: This tablegen backend is responsible for emitting a description of the target
101 instruction set for the code generator. (what are the differences from CodeEmitter?)
102
103 **Output**: C++ code with enums and structures representing the register mappings,
104 properties, masks, etc.
105
106 **Usage**: Both on ``BaseInstrInfo`` and ``MCTargetDesc`` (headers
107 and source files) with macros defining in which they are for declaration vs.
48108
49109 AsmWriter
50110 ---------
51111
52 Generate calling convention descriptions.
112 **Purpose**: Emits an assembly printer for the current target.
113
114 **Output**: Implementation of ``InstPrinter::printInstruction()``, among
115 other things.
116
117 **Usage**: Included directly into ``InstPrinter/InstPrinter.cpp``.
53118
54119 AsmMatcher
55120 ----------
56121
57 Generate assembly writer.
122 **Purpose**: Emits a target specifier matcher for
123 converting parsed assembly operands in the MCInst structures. It also
124 emits a matcher for custom operand parsing. Extensive documentation is
125 written on the ``AsmMatcherEmitter.cpp`` file.
126
127 **Output**: Assembler parsers' matcher functions, declarations, etc.
128
129 **Usage**: Used in back-ends' ``AsmParser/AsmParser.cpp`` for
130 building the AsmParser class.
58131
59132 Disassembler
60133 ------------
61134
62 Generate disassembler.
135 **Purpose**: Contains disassembler table emitters for various
136 architectures. Extensive documentation is written on the
137 ``DisassemblerEmitter.cpp`` file.
138
139 **Output**: Decoding tables, static decoding functions, etc.
140
141 **Usage**: Directly included in ``Disassembler/Disassembler.cpp``
142 to cater for all default decodings, after all hand-made ones.
63143
64144 PseudoLowering
65145 --------------
66146
67 Generate pseudo instruction lowering.
147 **Purpose**: Generate pseudo instruction lowering.
148
149 **Output**: Implements ``ARMAsmPrinter::emitPseudoExpansionLowering()``.
150
151 **Usage**: Included directly into ``AsmPrinter.cpp``.
68152
69153 CallingConv
70154 -----------
71155
72 Generate assembly instruction matcher.
156 **Purpose**: Responsible for emitting descriptions of the calling
157 conventions supported by this target.
158
159 **Output**: Implement static functions to deal with calling conventions
160 chained by matching styles, returning false on no match.
161
162 **Usage**: Used in ISelLowering and FastIsel as function pointers to
163 implementation returned by a CC sellection function.
73164
74165 DAGISel
75166 -------
76167
77 Generate a DAG instruction selector.
168 **Purpose**: Generate a DAG instruction selector.
169
170 **Output**: Creates huge functions for automating DAG selection.
171
172 **Usage**: Included in ``ISelDAGToDAG.cpp`` inside the target's
173 implementation of ``SelectionDAGISel``.
78174
79175 DFAPacketizer
80176 -------------
81177
82 Generate DFA Packetizer for VLIW targets.
178 **Purpose**: This class parses the Schedule.td file and produces an API that
179 can be used to reason about whether an instruction can be added to a packet
180 on a VLIW architecture. The class internally generates a deterministic finite
181 automaton (DFA) that models all possible mappings of machine instructions
182 to functional units as instructions are added to a packet.
183
184 **Output**: Scheduling tables for GPU back-ends (Hexagon, AMD).
185
186 **Usage**: Included directly on ``InstrInfo.cpp``.
83187
84188 FastISel
85189 --------
86190
87 Generate a "fast" instruction selector.
191 **Purpose**: This tablegen backend emits code for use by the "fast"
192 instruction selection algorithm. See the comments at the top of
193 lib/CodeGen/SelectionDAG/FastISel.cpp for background. This file
194 scans through the target's tablegen instruction-info files
195 and extracts instructions with obvious-looking patterns, and it emits
196 code to look up these instructions by type and operator.
197
198 **Output**: Generates ``Predicate`` and ``FastEmit`` methods.
199
200 **Usage**: Implements private methods of the targets' implementation
201 of ``FastISel`` class.
88202
89203 Subtarget
90204 ---------
91205
92 Generate subtarget enumerations.
206 **Purpose**: Generate subtarget enumerations.
207
208 **Output**: Enums, globals, local tables for sub-target information.
209
210 **Usage**: Populates ``Subtarget`` and
211 ``MCTargetDesc/MCTargetDesc`` files (both headers and source).
93212
94213 Intrinsic
95214 ---------
96215
97 Generate intrinsic information.
98
99 TgtIntrinsic
100 ------------
101
102 Generate target intrinsic information.
216 **Purpose**: Generate (target) intrinsic information.
103217
104218 OptParserDefs
105219 -------------
106220
107 Print enum values for a class.
221 **Purpose**: Print enum values for a class.
108222
109223 CTags
110224 -----
111225
112 Generate ctags-compatible index.
113
226 **Purpose**: This tablegen backend emits an index of definitions in ctags(1)
227 format. A helper script, utils/TableGen/tdtags, provides an easier-to-use
228 interface; run 'tdtags -H' for documentation.
114229
115230 Clang BackEnds
116231 ==============