llvm.org GIT mirror llvm / ec14cd7
TableGen's regpressure: emit per-registerclass weight limits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154518 91177308-0d34-0410-b5e6-96231b3b80d8 Andrew Trick 8 years ago
4 changed file(s) with 48 addition(s) and 29 deletion(s). Raw diff Collapse all Expand all
201201 bool inAllocatableClass; // Register belongs to an allocatable regclass.
202202 };
203203
204 /// Each TargetRegisterClass has a per register weight, and weight
205 /// limit which must be less than the limits of its pressure sets.
206 struct RegClassWeight {
207 unsigned RegWeigt;
208 unsigned WeightLimit;
209 };
210
204211 /// TargetRegisterInfo base class - We assume that the target defines a static
205212 /// array of TargetRegisterDesc objects that represent all of the machine
206213 /// registers that the target has. As such, we simply have to track a pointer
508515 }
509516
510517 /// Get the weight in units of pressure for this register class.
511 virtual unsigned getRegClassWeight(const TargetRegisterClass *RC) const = 0;
518 virtual const RegClassWeight &getRegClassWeight(
519 const TargetRegisterClass *RC) const = 0;
512520
513521 /// Get the number of dimensions of register pressure.
514522 virtual unsigned getNumRegPressureSets() const = 0;
721721 Out.set((*I)->EnumValue);
722722 }
723723
724 // Populate a unique sorted list of units from a register set.
725 void CodeGenRegisterClass::buildRegUnitSet(
726 std::vector &RegUnits) const {
727 std::vector TmpUnits;
728 for (RegUnitIterator UnitI(Members); UnitI.isValid(); ++UnitI)
729 TmpUnits.push_back(*UnitI);
730 std::sort(TmpUnits.begin(), TmpUnits.end());
731 std::unique_copy(TmpUnits.begin(), TmpUnits.end(),
732 std::back_inserter(RegUnits));
733 }
724734
725735 //===----------------------------------------------------------------------===//
726736 // CodeGenRegBank
11291139 }
11301140 }
11311141
1132 // Populate a unique sorted list of units from a register set.
1133 static void buildRegUnitSet(const CodeGenRegister::Set &Regs,
1134 std::vector &RegUnits) {
1135 std::vector TmpUnits;
1136 for (RegUnitIterator UnitI(Regs); UnitI.isValid(); ++UnitI)
1137 TmpUnits.push_back(*UnitI);
1138 std::sort(TmpUnits.begin(), TmpUnits.end());
1139 std::unique_copy(TmpUnits.begin(), TmpUnits.end(),
1140 std::back_inserter(RegUnits));
1141 }
1142
11431142 // Find a set in UniqueSets with the same elements as Set.
11441143 // Return an iterator into UniqueSets.
11451144 static std::vector::const_iterator
12151214 RegUnitSets.back().Name = RegClasses[RCIdx]->getName();
12161215
12171216 // Compute a sorted list of units in this class.
1218 buildRegUnitSet(RegClasses[RCIdx]->getMembers(), RegUnitSets.back().Units);
1217 RegClasses[RCIdx]->buildRegUnitSet(RegUnitSets.back().Units);
12191218
12201219 // Find an existing RegUnitSet.
12211220 std::vector::const_iterator SetI =
12781277
12791278 // Recompute the sorted list of units in this class.
12801279 std::vector RegUnits;
1281 buildRegUnitSet(RegClasses[RCIdx]->getMembers(), RegUnits);
1280 RegClasses[RCIdx]->buildRegUnitSet(RegUnits);
12821281
12831282 // Don't increase pressure for unallocatable regclasses.
12841283 if (RegUnits.empty())
278278 // getOrder(0).
279279 const CodeGenRegister::Set &getMembers() const { return Members; }
280280
281 // Populate a unique sorted list of units from a register set.
282 void buildRegUnitSet(std::vector &RegUnits) const;
283
281284 CodeGenRegisterClass(CodeGenRegBank&, Record *R);
282285
283286 // A key representing the parts of a register class used for forming
448451 return RegUnitWeights[RUID];
449452 }
450453
454 // Get the sum of unit weights.
455 unsigned getRegUnitSetWeight(const std::vector &Units) const {
456 unsigned Weight = 0;
457 for (std::vector::const_iterator
458 I = Units.begin(), E = Units.end(); I != E; ++I)
459 Weight += getRegUnitWeight(*I);
460 return Weight;
461 }
462
451463 // Increase a RegUnitWeight.
452464 void increaseRegUnitWeight(unsigned RUID, unsigned Inc) {
453465 RegUnitWeights[RUID] += Inc;
124124 unsigned NumSets = RegBank.getNumRegPressureSets();
125125
126126 OS << "/// Get the weight in units of pressure for this register class.\n"
127 << "unsigned " << ClassName << "::\n"
127 << "const RegClassWeight &" << ClassName << "::\n"
128128 << "getRegClassWeight(const TargetRegisterClass *RC) const {\n"
129 << " static const unsigned RCWeightTable[] = {\n";
129 << " static const RegClassWeight RCWeightTable[] = {\n";
130130 for (unsigned i = 0, e = NumRCs; i != e; ++i) {
131131 const CodeGenRegisterClass &RC = *RegBank.getRegClasses()[i];
132132 const CodeGenRegister::Set &Regs = RC.getMembers();
133133 if (Regs.empty())
134 OS << " 0";
135 else
136 OS << " " << (*Regs.begin())->getWeight(RegBank);
137 OS << ", \t// " << RC.getName() << "\n";
138 }
139 OS << " 0 };\n"
134 OS << " {0, 0";
135 else {
136 std::vector RegUnits;
137 RC.buildRegUnitSet(RegUnits);
138 OS << " {" << (*Regs.begin())->getWeight(RegBank)
139 << ", " << RegBank.getRegUnitSetWeight(RegUnits);
140 }
141 OS << "}, \t// " << RC.getName() << "\n";
142 }
143 OS << " {0, 0} };\n"
140144 << " return RCWeightTable[RC->getID()];\n"
141145 << "}\n\n";
142146
152156 << " static const unsigned PressureLimitTable[] = {\n";
153157 for (unsigned i = 0; i < NumSets; ++i ) {
154158 const RegUnitSet &RegUnits = RegBank.getRegPressureSet(i);
155 unsigned Weight = 0;
156 for (RegUnitSet::iterator
157 I = RegUnits.Units.begin(), E = RegUnits.Units.end(); I != E; ++I) {
158 Weight += RegBank.getRegUnitWeight(*I);
159 }
160 OS << " " << Weight
159 OS << " " << RegBank.getRegUnitSetWeight(RegUnits.Units)
161160 << ", \t// " << i << ": " << RegBank.getRegPressureSet(i).Name << "\n";
162161 }
163162 OS << " 0 };\n"
667666 << " const TargetRegisterClass *getMatchingSuperRegClass("
668667 "const TargetRegisterClass*, const TargetRegisterClass*, "
669668 "unsigned) const;\n"
670 << " unsigned getRegClassWeight(const TargetRegisterClass *RC) const;\n"
669 << " const RegClassWeight &getRegClassWeight("
670 << "const TargetRegisterClass *RC) const;\n"
671671 << " unsigned getNumRegPressureSets() const;\n"
672672 << " unsigned getRegPressureSetLimit(unsigned Idx) const;\n"
673673 << " const int *getRegClassPressureSets("