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ARM: check predicate bits for thumb instructions When encoded to thumb, VFP instruction and VMOV/VDUP between scalar and core registers, must have their predicate bit to 0b1110. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184707 91177308-0d34-0410-b5e6-96231b3b80d8 Amaury de la Vieuville 7 years ago
3 changed file(s) with 37 addition(s) and 15 deletion(s). Raw diff Collapse all Expand all
753753 return result;
754754 }
755755
756 MI.clear();
757 result = decodeInstruction(DecoderTableVFP32, MI, insn32, Address, this, STI);
758 if (result != MCDisassembler::Fail) {
759 Size = 4;
760 UpdateThumbVFPPredicate(MI);
761 return result;
762 }
763
764 MI.clear();
765 result = decodeInstruction(DecoderTableNEONDup32, MI, insn32, Address,
766 this, STI);
767 if (result != MCDisassembler::Fail) {
768 Size = 4;
769 Check(result, AddThumbPredicate(MI));
770 return result;
756 if (fieldFromInstruction(insn32, 28, 4) == 0xE) {
757 MI.clear();
758 result = decodeInstruction(DecoderTableVFP32, MI, insn32, Address, this, STI);
759 if (result != MCDisassembler::Fail) {
760 Size = 4;
761 UpdateThumbVFPPredicate(MI);
762 return result;
763 }
764 }
765
766 if (fieldFromInstruction(insn32, 28, 4) == 0xE) {
767 MI.clear();
768 result = decodeInstruction(DecoderTableNEONDup32, MI, insn32, Address,
769 this, STI);
770 if (result != MCDisassembler::Fail) {
771 Size = 4;
772 Check(result, AddThumbPredicate(MI));
773 return result;
774 }
771775 }
772776
773777 if (fieldFromInstruction(insn32, 24, 8) == 0xF9) {
0 # VMOV/VDUP between scalar and core registers with invalid predicate bits (pred != 0b1110)
1
2 # VMOV
3 # RUN: echo "0x00 0xde 0x10 0x0b" | llvm-mc -triple thumbv7 -disassemble 2>&1 | FileCheck %s
4
5 # VDUP
6 # RUN: echo "0xff 0xde 0xf0 0xfb" | llvm-mc -triple thumbv7 -disassemble 2>&1 | FileCheck %s
7
8 # CHECK: invalid instruction encoding
0 # VFP instructions with invalid predicate bits (pred != 0b1110)
1
2 # VABS
3 # RUN: echo "0x40 0xde 0x00 0x0a" | llvm-mc -triple thumbv7 -disassemble 2>&1 | FileCheck %s
4
5 # VMLA
6 # RUN: echo "0xf0 0xde 0xe0 0x0b" | llvm-mc -triple thumbv7 -disassemble 2>&1 | FileCheck %s
7
8 # CHECK: invalid instruction encoding