llvm.org GIT mirror llvm / eb97c04
[Sparc] Set %o7 as the return address register instead of %i7 in MCRegisterInfo. Also, add CFI instructions to initialize the frame correctly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200617 91177308-0d34-0410-b5e6-96231b3b80d8 Venkatraman Govindaraju 5 years ago
3 changed file(s) with 31 addition(s) and 4 deletion(s). Raw diff Collapse all Expand all
3232
3333 using namespace llvm;
3434
35
36 static MCAsmInfo *createSparcMCAsmInfo(const MCRegisterInfo &MRI,
37 StringRef TT) {
38 MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
39 unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
40 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(0, Reg, 0);
41 MAI->addInitialFrameState(Inst);
42 return MAI;
43 }
44
45 static MCAsmInfo *createSparcV9MCAsmInfo(const MCRegisterInfo &MRI,
46 StringRef TT) {
47 MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
48 unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
49 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(0, Reg, 2047);
50 MAI->addInitialFrameState(Inst);
51 return MAI;
52 }
53
3554 static MCInstrInfo *createSparcMCInstrInfo() {
3655 MCInstrInfo *X = new MCInstrInfo();
3756 InitSparcMCInstrInfo(X);
4059
4160 static MCRegisterInfo *createSparcMCRegisterInfo(StringRef TT) {
4261 MCRegisterInfo *X = new MCRegisterInfo();
43 InitSparcMCRegisterInfo(X, SP::I7);
62 InitSparcMCRegisterInfo(X, SP::O7);
4463 return X;
4564 }
4665
135154
136155 extern "C" void LLVMInitializeSparcTargetMC() {
137156 // Register the MC asm info.
138 RegisterMCAsmInfo X(TheSparcTarget);
139 RegisterMCAsmInfo Y(TheSparcV9Target);
157 RegisterMCAsmInfoFn X(TheSparcTarget, createSparcMCAsmInfo);
158 RegisterMCAsmInfoFn Y(TheSparcV9Target, createSparcV9MCAsmInfo);
140159
141160 // Register the MC codegen info.
142161 TargetRegistry::RegisterMCCodeGenInfo(TheSparcTarget,
3434 cl::desc("Reserve application registers (%g2-%g4)"));
3535
3636 SparcRegisterInfo::SparcRegisterInfo(SparcSubtarget &st)
37 : SparcGenRegisterInfo(SP::I7), Subtarget(st) {
37 : SparcGenRegisterInfo(SP::O7), Subtarget(st) {
3838 }
3939
4040 const uint16_t* SparcRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF)
5555 ; V8PIC_NOCFI-NEXT: .word _ZTIi
5656 ; V8PIC_NOCFI: .section .eh_frame
5757 ; V8PIC_NOCFI-NOT: .section
58 ; V8PIC_NOCFI: .byte 15 ! CIE Return Address Column
5859 ; V8PIC_NOCFI: .word %r_disp32(DW.ref.__gxx_personality_v0)
60 ; V8PIC_NOCFI: .byte 12 ! DW_CFA_def_cfa
61 ; V8PIC_NOCFI: .byte 14 ! Reg 14
62 ; V8PIC_NOCFI-NEXT: .byte 0 ! Offset 0
5963 ; V8PIC_NOCFI: .word %r_disp32(.Ltmp{{.+}}) ! FDE initial location
6064
6165
9397 ; V9PIC_NOCFI-NEXT: .xword _ZTIi
9498 ; V9PIC_NOCFI: .section .eh_frame
9599 ; V9PIC_NOCFI-NOT: .section
100 ; V9PIC_NOCFI: .byte 15 ! CIE Return Address Column
96101 ; V9PIC_NOCFI: .word %r_disp32(DW.ref.__gxx_personality_v0)
102 ; V9PIC_NOCFI: .byte 12 ! DW_CFA_def_cfa
103 ; V9PIC_NOCFI-NEXT: .byte 14 ! Reg 14
104 ; V9PIC_NOCFI: .ascii "\377\017" ! Offset 2047
97105 ; V9PIC_NOCFI: .word %r_disp32(.Ltmp{{.+}}) ! FDE initial location
98106
99107 define i32 @main(i32 %argc, i8** nocapture readnone %argv) unnamed_addr #0 {