llvm.org GIT mirror llvm / eb48e7d
[AArch64] Enable FeatureFuseAES on Cortex-A72. This patch enables fusing dependent AESE/AESMC and AESD/AESIMC instruction pairs on Cortex-A72, as recommended in the Software Optimization Guide, section 4.10. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303073 91177308-0d34-0410-b5e6-96231b3b80d8 Florian Hahn 3 years ago
2 changed file(s) with 34 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
215215 FeatureCRC,
216216 FeatureCrypto,
217217 FeatureFPARMv8,
218 FeatureFuseAES,
218219 FeatureNEON,
219220 FeaturePerfMon
220221 ]>;
0 ; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=cortex-a57 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECKA57
1 ; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=cortex-a72 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECKA72
12 ; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=exynos-m1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECKM1
23
34 declare <16 x i8> @llvm.aarch64.crypto.aese(<16 x i8> %d, <16 x i8> %k)
8687 ; CHECKA57-NEXT: aesmc {{v[0-7].16b}}, [[VG]]
8788 ; CHECKA57: aese [[VH:v[0-7].16b]], {{v[0-7].16b}}
8889 ; CHECKA57-NEXT: aesmc {{v[0-7].16b}}, [[VH]]
90 ; CHECKA72: aese [[VA:v[0-7].16b]], {{v[0-7].16b}}
91 ; CHECKA72-NEXT: aesmc {{v[0-7].16b}}, [[VA]]
92 ; CHECKA72: aese [[VB:v[0-7].16b]], {{v[0-7].16b}}
93 ; CHECKA72-NEXT: aesmc {{v[0-7].16b}}, [[VB]]
94 ; CHECKA72: aese [[VC:v[0-7].16b]], {{v[0-7].16b}}
95 ; CHECKA72-NEXT: aesmc {{v[0-7].16b}}, [[VC]]
96 ; CHECKA72: aese [[VD:v[0-7].16b]], {{v[0-7].16b}}
97 ; CHECKA72-NEXT: aesmc {{v[0-7].16b}}, [[VD]]
98 ; CHECKA72: aese [[VE:v[0-7].16b]], {{v[0-7].16b}}
99 ; CHECKA72-NEXT: aesmc {{v[0-7].16b}}, [[VE]]
100 ; CHECKA72: aese [[VF:v[0-7].16b]], {{v[0-7].16b}}
101 ; CHECKA72-NEXT: aesmc {{v[0-7].16b}}, [[VF]]
102 ; CHECKA72: aese [[VG:v[0-7].16b]], {{v[0-7].16b}}
103 ; CHECKA72-NEXT: aesmc {{v[0-7].16b}}, [[VG]]
104 ; CHECKA72: aese [[VH:v[0-7].16b]], {{v[0-7].16b}}
105 ; CHECKA72-NEXT: aesmc {{v[0-7].16b}}, [[VH]]
89106 ; CHECKM1: aese [[VA:v[0-7].16b]], {{v[0-7].16b}}
90107 ; CHECKM1: aesmc {{v[0-7].16b}}, [[VA]]
91108 ; CHECKM1: aese [[VB:v[0-7].16b]], {{v[0-7].16b}}
186203 ; CHECKA57-NEXT: aesimc {{v[0-7].16b}}, [[VG]]
187204 ; CHECKA57: aesd [[VH:v[0-7].16b]], {{v[0-7].16b}}
188205 ; CHECKA57-NEXT: aesimc {{v[0-7].16b}}, [[VH]]
206 ; CHECKA72: aesd [[VA:v[0-7].16b]], {{v[0-7].16b}}
207 ; CHECKA72-NEXT: aesimc {{v[0-7].16b}}, [[VA]]
208 ; CHECKA72: aesd [[VB:v[0-7].16b]], {{v[0-7].16b}}
209 ; CHECKA72-NEXT: aesimc {{v[0-7].16b}}, [[VB]]
210 ; CHECKA72: aesd [[VC:v[0-7].16b]], {{v[0-7].16b}}
211 ; CHECKA72-NEXT: aesimc {{v[0-7].16b}}, [[VC]]
212 ; CHECKA72: aesd [[VD:v[0-7].16b]], {{v[0-7].16b}}
213 ; CHECKA72-NEXT: aesimc {{v[0-7].16b}}, [[VD]]
214 ; CHECKA72: aesd [[VE:v[0-7].16b]], {{v[0-7].16b}}
215 ; CHECKA72-NEXT: aesimc {{v[0-7].16b}}, [[VE]]
216 ; CHECKA72: aesd [[VF:v[0-7].16b]], {{v[0-7].16b}}
217 ; CHECKA72-NEXT: aesimc {{v[0-7].16b}}, [[VF]]
218 ; CHECKA72: aesd [[VG:v[0-7].16b]], {{v[0-7].16b}}
219 ; CHECKA72-NEXT: aesimc {{v[0-7].16b}}, [[VG]]
220 ; CHECKA72: aesd [[VH:v[0-7].16b]], {{v[0-7].16b}}
221 ; CHECKA72-NEXT: aesimc {{v[0-7].16b}}, [[VH]]
189222 ; CHECKM1: aesd [[VA:v[0-7].16b]], {{v[0-7].16b}}
190223 ; CHECKM1: aesimc {{v[0-7].16b}}, [[VA]]
191224 ; CHECKM1: aesd [[VB:v[0-7].16b]], {{v[0-7].16b}}