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[AMDGPU] gfx1011/gfx1012 targets Differential Revision: https://reviews.llvm.org/D63307 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363344 91177308-0d34-0410-b5e6-96231b3b80d8 Stanislav Mekhanoshin 3 months ago
29 changed file(s) with 815 addition(s) and 43 deletion(s). Raw diff Collapse all Expand all
704704 EF_AMDGPU_MACH_AMDGCN_GFX909 = 0x031,
705705 // AMDGCN GFX10.
706706 EF_AMDGPU_MACH_AMDGCN_GFX1010 = 0x033,
707 EF_AMDGPU_MACH_AMDGCN_GFX1011 = 0x034,
708 EF_AMDGPU_MACH_AMDGCN_GFX1012 = 0x035,
707709
708710 // Reserved for AMDGCN-based processors.
709711 EF_AMDGPU_MACH_AMDGCN_RESERVED0 = 0x027,
712714
713715 // First/last AMDGCN-based processors.
714716 EF_AMDGPU_MACH_AMDGCN_FIRST = EF_AMDGPU_MACH_AMDGCN_GFX600,
715 EF_AMDGPU_MACH_AMDGCN_LAST = EF_AMDGPU_MACH_AMDGCN_GFX1010,
717 EF_AMDGPU_MACH_AMDGCN_LAST = EF_AMDGPU_MACH_AMDGCN_GFX1012,
716718
717719 // Indicates if the "xnack" target feature is enabled for all code contained
718720 // in the object.
123123 GK_GFX909 = 65,
124124
125125 GK_GFX1010 = 71,
126 GK_GFX1011 = 72,
127 GK_GFX1012 = 73,
126128
127129 GK_AMDGCN_FIRST = GK_GFX600,
128 GK_AMDGCN_LAST = GK_GFX1010,
130 GK_AMDGCN_LAST = GK_GFX1012,
129131 };
130132
131133 /// Instruction set architecture version.
411411 BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX906, EF_AMDGPU_MACH);
412412 BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX909, EF_AMDGPU_MACH);
413413 BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX1010, EF_AMDGPU_MACH);
414 BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX1011, EF_AMDGPU_MACH);
415 BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX1012, EF_AMDGPU_MACH);
414416 BCase(EF_AMDGPU_XNACK);
415417 BCase(EF_AMDGPU_SRAM_ECC);
416418 break;
6161
6262 // This table should be sorted by the value of GPUKind
6363 // Don't bother listing the implicitly true features
64 constexpr GPUInfo AMDGCNGPUs[34] = {
64 constexpr GPUInfo AMDGCNGPUs[36] = {
6565 // Name Canonical Kind Features
6666 // Name
6767 {{"gfx600"}, {"gfx600"}, GK_GFX600, FEATURE_FAST_FMA_F32},
9898 {{"gfx906"}, {"gfx906"}, GK_GFX906, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32},
9999 {{"gfx909"}, {"gfx909"}, GK_GFX909, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32},
100100 {{"gfx1010"}, {"gfx1010"}, GK_GFX1010, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32},
101 {{"gfx1011"}, {"gfx1011"}, GK_GFX1011, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32},
102 {{"gfx1012"}, {"gfx1012"}, GK_GFX1012, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32},
101103 };
102104
103105 const GPUInfo *getArchEntry(AMDGPU::GPUKind AK, ArrayRef Table) {
196198 case GK_GFX906: return {9, 0, 6};
197199 case GK_GFX909: return {9, 0, 9};
198200 case GK_GFX1010: return {10, 1, 0};
201 case GK_GFX1011: return {10, 1, 1};
202 case GK_GFX1012: return {10, 1, 2};
199203 default: return {0, 0, 0};
200204 }
201205 }
375375 "HasDot2Insts",
376376 "true",
377377 "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions"
378 >;
379
380 def FeatureDot5Insts : SubtargetFeature<"dot5-insts",
381 "HasDot5Insts",
382 "true",
383 "Has v_dot2c_f32_f16 instruction"
384 >;
385
386 def FeatureDot6Insts : SubtargetFeature<"dot6-insts",
387 "HasDot6Insts",
388 "true",
389 "Has v_dot4c_i32_i8 instruction"
378390 >;
379391
380392 def FeatureDoesNotSupportSRAMECC : SubtargetFeature<"no-sram-ecc-support",
772784 FeatureDoesNotSupportXNACK,
773785 FeatureCodeObjectV3])>;
774786
787 def FeatureISAVersion10_1_1 : FeatureSet<
788 !listconcat(FeatureGroup.GFX10_1_Bugs,
789 [FeatureGFX10,
790 FeatureLDSBankCount32,
791 FeatureDLInsts,
792 FeatureDot1Insts,
793 FeatureDot2Insts,
794 FeatureDot5Insts,
795 FeatureDot6Insts,
796 FeatureNSAEncoding,
797 FeatureWavefrontSize64,
798 FeatureScalarStores,
799 FeatureScalarAtomics,
800 FeatureScalarFlatScratchInsts,
801 FeatureDoesNotSupportXNACK,
802 FeatureCodeObjectV3])>;
803
804 def FeatureISAVersion10_1_2 : FeatureSet<
805 !listconcat(FeatureGroup.GFX10_1_Bugs,
806 [FeatureGFX10,
807 FeatureLDSBankCount32,
808 FeatureDLInsts,
809 FeatureDot1Insts,
810 FeatureDot2Insts,
811 FeatureDot5Insts,
812 FeatureDot6Insts,
813 FeatureNSAEncoding,
814 FeatureWavefrontSize64,
815 FeatureScalarStores,
816 FeatureScalarAtomics,
817 FeatureScalarFlatScratchInsts,
818 FeatureLdsMisalignedBug,
819 FeatureDoesNotSupportXNACK,
820 FeatureCodeObjectV3])>;
821
775822 //===----------------------------------------------------------------------===//
776823
777824 def AMDGPUInstrInfo : InstrInfo {
10141061 def HasDot2Insts : Predicate<"Subtarget->hasDot2Insts()">,
10151062 AssemblerPredicate<"FeatureDot2Insts">;
10161063
1064 def HasDot5Insts : Predicate<"Subtarget->hasDot5Insts()">,
1065 AssemblerPredicate<"FeatureDot5Insts">;
1066
1067 def HasDot6Insts : Predicate<"Subtarget->hasDot6Insts()">,
1068 AssemblerPredicate<"FeatureDot6Insts">;
10171069
10181070 def EnableLateCFGStructurize : Predicate<
10191071 "EnableLateStructurizeCFG">;
233233 HasDLInsts(false),
234234 HasDot1Insts(false),
235235 HasDot2Insts(false),
236 HasDot5Insts(false),
237 HasDot6Insts(false),
236238 EnableSRAMECC(false),
237239 DoesNotSupportSRAMECC(false),
238240 HasNoSdstCMPX(false),
336336 bool HasDLInsts;
337337 bool HasDot1Insts;
338338 bool HasDot2Insts;
339 bool HasDot5Insts;
340 bool HasDot6Insts;
339341 bool EnableSRAMECC;
340342 bool DoesNotSupportSRAMECC;
341343 bool HasNoSdstCMPX;
704706 return HasDot2Insts;
705707 }
706708
709 bool hasDot5Insts() const {
710 return HasDot5Insts;
711 }
712
713 bool hasDot6Insts() const {
714 return HasDot6Insts;
715 }
716
707717 bool isSRAMECCEnabled() const {
708718 return EnableSRAMECC;
709719 }
170170 def : ProcessorModel<"gfx1010", GFX10SpeedModel,
171171 FeatureISAVersion10_1_0.Features
172172 >;
173
174 def : ProcessorModel<"gfx1011", GFX10SpeedModel,
175 FeatureISAVersion10_1_1.Features
176 >;
177
178 def : ProcessorModel<"gfx1012", GFX10SpeedModel,
179 FeatureISAVersion10_1_2.Features
180 >;
9292 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX906: AK = GK_GFX906; break;
9393 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX909: AK = GK_GFX909; break;
9494 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1010: AK = GK_GFX1010; break;
95 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1011: AK = GK_GFX1011; break;
96 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1012: AK = GK_GFX1012; break;
9597 case ELF::EF_AMDGPU_MACH_NONE: AK = GK_NONE; break;
9698 }
9799
140142 case GK_GFX906: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX906;
141143 case GK_GFX909: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX909;
142144 case GK_GFX1010: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1010;
145 case GK_GFX1011: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1011;
146 case GK_GFX1012: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1012;
143147 case GK_NONE: return ELF::EF_AMDGPU_MACH_NONE;
144148 }
145149
316316
317317 def VOP_MAC_F16 : VOP_MAC ;
318318 def VOP_MAC_F32 : VOP_MAC ;
319
320 class VOP_DOT_ACC : VOP_MAC {
321 let HasClamp = 0;
322 let HasExtSDWA = 0;
323 let HasModifiers = 1;
324 let HasOpSel = 0;
325 let IsPacked = 0;
326 }
327
328 def VOP_DOT_ACC_F32_V2F16 : VOP_DOT_ACC {
329 let Src0ModDPP = FPVRegInputMods;
330 let Src1ModDPP = FPVRegInputMods;
331 }
332 def VOP_DOT_ACC_I32_I32 : VOP_DOT_ACC;
319333
320334 // Write out to vcc or arbitrary SGPR.
321335 def VOP2b_I32_I1_I32_I32 : VOPProfile<[i32, i32, i32, untyped], 0, /*EnableClamp=*/1> {
632646 }
633647
634648 } // End SubtargetPredicate = HasDLInsts
649
650 let Constraints = "$vdst = $src2",
651 DisableEncoding="$src2",
652 isConvertibleToThreeAddress = 1,
653 isCommutable = 1 in {
654 let SubtargetPredicate = HasDot5Insts in
655 defm V_DOT2C_F32_F16 : VOP2Inst_e32<"v_dot2c_f32_f16", VOP_DOT_ACC_F32_V2F16>;
656 let SubtargetPredicate = HasDot6Insts in
657 defm V_DOT4C_I32_I8 : VOP2Inst_e32<"v_dot4c_i32_i8", VOP_DOT_ACC_I32_I32>;
658 }
659
660 let AddedComplexity = 30 in {
661 def : GCNPat<
662 (f32 (AMDGPUfdot2 v2f16:$src0, v2f16:$src1, f32:$src2, (i1 DSTCLAMP.NONE))),
663 (f32 (V_DOT2C_F32_F16_e32 $src0, $src1, $src2))
664 > {
665 let SubtargetPredicate = HasDot5Insts;
666 }
667 def : GCNPat<
668 (i32 (int_amdgcn_sdot4 i32:$src0, i32:$src1, i32:$src2, (i1 DSTCLAMP.NONE))),
669 (i32 (V_DOT4C_I32_I8_e32 $src0, $src1, $src2))
670 > {
671 let SubtargetPredicate = HasDot6Insts;
672 }
673 } // End AddedComplexity = 30
635674
636675 let SubtargetPredicate = isGFX10Plus in {
637676
14911530 defm V_XNOR_B32 : VOP2_Real_e32e64_vi <0x3d>;
14921531
14931532 } // End SubtargetPredicate = HasDLInsts
1533
1534 multiclass VOP2_Real_DOT_ACC_gfx10 op> :
1535 VOP2_Real_e32_gfx10,
1536 VOP2_Real_dpp_gfx10,
1537 VOP2_Real_dpp8_gfx10;
1538
1539 let SubtargetPredicate = HasDot5Insts in {
1540 // NB: Opcode conflicts with V_DOT8C_I32_I4
1541 // This opcode exists in gfx 10.1* only
1542 defm V_DOT2C_F32_F16 : VOP2_Real_DOT_ACC_gfx10<0x02>;
1543 }
1544
1545 let SubtargetPredicate = HasDot6Insts in {
1546 defm V_DOT4C_I32_I8 : VOP2_Real_DOT_ACC_gfx10<0x0d>;
1547 }
411411 defm V_FMA_MIX_F32 : VOP3P_Real_gfx10<0x020>;
412412 defm V_FMA_MIXLO_F16 : VOP3P_Real_gfx10<0x021>;
413413 defm V_FMA_MIXHI_F16 : VOP3P_Real_gfx10<0x022>;
414
415 let SubtargetPredicate = HasDot2Insts in {
416
417 defm V_DOT2_F32_F16 : VOP3P_Real_gfx10 <0x013>;
418 defm V_DOT2_I32_I16 : VOP3P_Real_gfx10 <0x014>;
419 defm V_DOT2_U32_U16 : VOP3P_Real_gfx10 <0x015>;
420 defm V_DOT4_U32_U8 : VOP3P_Real_gfx10 <0x017>;
421 defm V_DOT8_U32_U4 : VOP3P_Real_gfx10 <0x019>;
422
423 } // End SubtargetPredicate = HasDot2Insts
424
425 let SubtargetPredicate = HasDot1Insts in {
426
427 defm V_DOT4_I32_I8 : VOP3P_Real_gfx10 <0x016>;
428 defm V_DOT8_I32_I4 : VOP3P_Real_gfx10 <0x018>;
429
430 } // End SubtargetPredicate = HasDot1Insts
4747 ; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx906 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX906 %s
4848 ; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx909 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX909 %s
4949 ; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx1010 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1010 %s
50 ; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx1011 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1011 %s
51 ; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx1012 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1012 %s
5052
5153 ; ARCH-R600: Arch: r600
5254 ; ARCH-GCN: Arch: amdgcn
8890 ; GFX906: EF_AMDGPU_MACH_AMDGCN_GFX906 (0x2F)
8991 ; GFX909: EF_AMDGPU_MACH_AMDGCN_GFX909 (0x31)
9092 ; GFX1010: EF_AMDGPU_MACH_AMDGCN_GFX1010 (0x33)
93 ; GFX1011: EF_AMDGPU_MACH_AMDGCN_GFX1011 (0x34)
94 ; GFX1012: EF_AMDGPU_MACH_AMDGCN_GFX1012 (0x35)
9195 ; ALL: ]
9296
9397 define amdgpu_kernel void @elf_header() {
0 ; RUN: llc -march=amdgcn -mcpu=gfx900 -enable-unsafe-fp-math -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GCN,GFX900
1 ; RUN: llc -march=amdgcn -mcpu=gfx906 -enable-unsafe-fp-math -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GCN,GFX906-UNSAFE
1 ; RUN: llc -march=amdgcn -mcpu=gfx906 -enable-unsafe-fp-math -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GCN,GCN-DL-UNSAFE,GFX906-DL-UNSAFE
2 ; RUN: llc -march=amdgcn -mcpu=gfx1011 -enable-unsafe-fp-math -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GCN,GCN-DL-UNSAFE,GFX10-DL-UNSAFE,GFX10-CONTRACT
3 ; RUN: llc -march=amdgcn -mcpu=gfx1012 -enable-unsafe-fp-math -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GCN,GCN-DL-UNSAFE,GFX10-DL-UNSAFE,GFX10-CONTRACT
24 ; RUN: llc -march=amdgcn -mcpu=gfx906 -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GCN,GFX906
35 ; RUN: llc -march=amdgcn -mcpu=gfx906 -mattr=-fp64-fp16-denormals,-fp32-denormals -fp-contract=fast -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GCN,GFX906-CONTRACT
46 ; RUN: llc -march=amdgcn -mcpu=gfx906 -mattr=+fp64-fp16-denormals,+fp32-denormals -fp-contract=fast -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GCN,GFX906-DENORM-CONTRACT
1315 ; GFX906: v_mul_f16_e32
1416 ; GFX906: v_mul_f16_e32
1517
16 ; GFX906-UNSAFE: v_fma_f16
18 ; GFX906-DL-UNSAFE: v_fma_f16
19 ; GFX10-CONTRACT: v_fmac_f16
1720
1821 ; GFX906-CONTRACT: v_mac_f16_e32
1922 ; GFX906-DENORM-CONTRACT: v_fma_f16
4952 ; GFX906: v_mad_f32
5053 ; GFX906: v_mac_f32_e32
5154
52 ; GFX906-UNSAFE: v_dot2_f32_f16
55 ; GFX906-DL-UNSAFE: v_dot2_f32_f16
56 ; GFX10-DL-UNSAFE: v_dot2c_f32_f16_e32
5357
5458 ; GFX906-CONTRACT: v_dot2_f32_f16
5559
8993 ; GFX906: v_mad_f32
9094 ; GFX906: v_mac_f32_e32
9195
92 ; GFX906-UNSAFE: v_dot2_f32_f16
96 ; GFX906-DL-UNSAFE: v_dot2_f32_f16
97 ; GFX10-DL-UNSAFE: v_dot2c_f32_f16_e32
9398
9499 ; GFX906-CONTRACT: v_dot2_f32_f16
95100 ; GFX906-DENORM-CONTRACT: v_dot2_f32_f16
126131 ; GFX906: v_mad_f32
127132 ; GFX906: v_mac_f32_e32
128133
129 ; GFX906-UNSAFE: v_fma_mix_f32
134 ; GCN-DL-UNSAFE: v_fma_mix_f32
130135
131136 ; GFX906-CONTRACT: v_fma_mix_f32
132137 ; GFX906-DENORM-CONTRACT: v_fma_mix_f32
163168 ; GFX906: v_mad_f32
164169 ; GFX906: v_mac_f32_e32
165170
166 ; GFX906-UNSAFE: v_fma_mix_f32
171 ; GCN-DL-UNSAFE: v_fma_mix_f32
167172
168173 ; GFX906-CONTRACT: v_fma_mix_f32
169174 ; GFX906-DENORM-CONTRACT: v_fma_mix_f32
200205 ; GFX906: v_mad_f32
201206 ; GFX906: v_mac_f32_e32
202207
203 ; GFX906-UNSAFE: v_fma_mix_f32
208 ; GCN-DL-UNSAFE: v_fma_mix_f32
204209
205210 ; GFX906-CONTRACT: v_fma_mix_f32
206211 ; GFX906-DENORM-CONTRACT: v_fma_mix_f32
2424 ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx906 -mattr=-code-object-v3 | FileCheck --check-prefix=HSA --check-prefix=HSA-GFX906 %s
2525 ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx909 -mattr=-code-object-v3 | FileCheck --check-prefix=HSA --check-prefix=HSA-GFX909 %s
2626 ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx1010 -mattr=-code-object-v3 | FileCheck --check-prefix=HSA --check-prefix=HSA-GFX1010 %s
27 ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx1011 -mattr=-code-object-v3 | FileCheck --check-prefix=HSA --check-prefix=HSA-GFX1011 %s
28 ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx1012 -mattr=-code-object-v3 | FileCheck --check-prefix=HSA --check-prefix=HSA-GFX1012 %s
2729
2830 ; HSA: .hsa_code_object_version 2,1
2931 ; HSA-SI600: .hsa_code_object_isa 6,0,0,"AMD","AMDGPU"
4345 ; HSA-GFX906: .hsa_code_object_isa 9,0,6,"AMD","AMDGPU"
4446 ; HSA-GFX909: .hsa_code_object_isa 9,0,9,"AMD","AMDGPU"
4547 ; HSA-GFX1010: .hsa_code_object_isa 10,1,0,"AMD","AMDGPU"
48 ; HSA-GFX1011: .hsa_code_object_isa 10,1,1,"AMD","AMDGPU"
49 ; HSA-GFX1012: .hsa_code_object_isa 10,1,2,"AMD","AMDGPU"
0 ; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,SPLIT %s
1 ; RUN: llc -march=amdgcn -mcpu=gfx1011 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,VECT %s
2 ; RUN: llc -march=amdgcn -mcpu=gfx1012 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,SPLIT %s
13 ; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs -mattr=+cumode < %s | FileCheck -check-prefixes=GCN,VECT %s
24
35 ; GCN-LABEL: test_local_misaligned_v2:
111113 ret void
112114 }
113115
116 ; TODO: Reinstate the test below once v3i32/v3f32 is reinstated.
117
114118 ; GCN-LABEL: test_flat_misaligned_v3:
115 ; VECT-DAG: flat_load_dwordx3 v
116 ; VECT-DAG: flat_store_dwordx3 v
117 ; SPLIT-DAG: flat_load_dword v
118 ; SPLIT-DAG: flat_load_dword v
119 ; SPLIT-DAG: flat_load_dword v
120 ; SPLIT-DAG: flat_store_dword v
121 ; SPLIT-DAG: flat_store_dword v
122 ; SPLIT-DAG: flat_store_dword v
119 ; xVECT-DAG: flat_load_dwordx3 v
120 ; xVECT-DAG: flat_store_dwordx3 v
121 ; xSPLIT-DAG: flat_load_dword v
122 ; xSPLIT-DAG: flat_load_dword v
123 ; xSPLIT-DAG: flat_load_dword v
124 ; xSPLIT-DAG: flat_store_dword v
125 ; xSPLIT-DAG: flat_store_dword v
126 ; xSPLIT-DAG: flat_store_dword v
123127 define amdgpu_kernel void @test_flat_misaligned_v3(i32* %arg) {
124128 bb:
125129 %lid = tail call i32 @llvm.amdgcn.workitem.id.x()
None ; RUN: llc -march=amdgcn -mcpu=gfx906 -verify-machineinstrs < %s | FileCheck %s --check-prefix=GFX906
0 ; RUN: llc -march=amdgcn -mcpu=gfx906 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX906
1 ; RUN: llc -march=amdgcn -mcpu=gfx1011 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX10
2 ; RUN: llc -march=amdgcn -mcpu=gfx1012 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX10
13
24 declare float @llvm.amdgcn.fdot2(<2 x half> %a, <2 x half> %b, float %c, i1 %clamp)
35
4 ; GFX906-LABEL: {{^}}test_llvm_amdgcn_fdot2_clamp
6 ; GCN-LABEL: {{^}}test_llvm_amdgcn_fdot2_clamp
57 ; GFX906: v_dot2_f32_f16 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} clamp{{$}}
8 ; GFX10: v_dot2_f32_f16 v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}} clamp{{$}}
69 define amdgpu_kernel void @test_llvm_amdgcn_fdot2_clamp(
710 float addrspace(1)* %r,
811 <2 x half> addrspace(1)* %a,
1720 ret void
1821 }
1922
20 ; GFX906-LABEL: {{^}}test_llvm_amdgcn_fdot2_no_clamp
23 ; GCN-LABEL: {{^}}test_llvm_amdgcn_fdot2_no_clamp
2124 ; GFX906: v_dot2_f32_f16 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}{{$}}
25 ; GFX10: v_dot2c_f32_f16_e32 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}{{$}}
2226 define amdgpu_kernel void @test_llvm_amdgcn_fdot2_no_clamp(
2327 float addrspace(1)* %r,
2428 <2 x half> addrspace(1)* %a,
None ; RUN: llc -march=amdgcn -mcpu=gfx906 -verify-machineinstrs < %s | FileCheck %s --check-prefix=GCN --check-prefix=GFX906
0 ; RUN: llc -march=amdgcn -mcpu=gfx906 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX906
1 ; RUN: llc -march=amdgcn -mcpu=gfx1011 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX10
2 ; RUN: llc -march=amdgcn -mcpu=gfx1012 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX10
13
24 declare i32 @llvm.amdgcn.sdot2(<2 x i16> %a, <2 x i16> %b, i32 %c, i1 %clamp)
35
46 ; GCN-LABEL: {{^}}test_llvm_amdgcn_sdot2_clamp
57 ; GFX906: v_dot2_i32_i16 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} clamp{{$}}
8 ; GFX10: v_dot2_i32_i16 v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}} clamp{{$}}
69 define amdgpu_kernel void @test_llvm_amdgcn_sdot2_clamp(
710 i32 addrspace(1)* %r,
811 <2 x i16> addrspace(1)* %a,
1922
2023 ; GCN-LABEL: {{^}}test_llvm_amdgcn_sdot2_no_clamp
2124 ; GFX906: v_dot2_i32_i16 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}{{$}}
25 ; GFX10: v_dot2_i32_i16 v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}{{$}}
2226 define amdgpu_kernel void @test_llvm_amdgcn_sdot2_no_clamp(
2327 i32 addrspace(1)* %r,
2428 <2 x i16> addrspace(1)* %a,
None ; RUN: llc -march=amdgcn -mcpu=gfx906 -verify-machineinstrs < %s | FileCheck %s --check-prefix=GCN --check-prefix=GFX906
0 ; RUN: llc -march=amdgcn -mcpu=gfx906 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX906
1 ; RUN: llc -march=amdgcn -mcpu=gfx1011 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX10
2 ; RUN: llc -march=amdgcn -mcpu=gfx1012 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX10
13
24 declare i32 @llvm.amdgcn.sdot4(i32 %a, i32 %b, i32 %c, i1 %clamp)
35
46 ; GCN-LABEL: {{^}}test_llvm_amdgcn_sdot4_clamp
57 ; GFX906: v_dot4_i32_i8 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} clamp{{$}}
8 ; GFX10: v_dot4_i32_i8 v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}} clamp{{$}}
69 define amdgpu_kernel void @test_llvm_amdgcn_sdot4_clamp(
710 i32 addrspace(1)* %r,
811 <4 x i8> addrspace(1)* %a,
2124
2225 ; GCN-LABEL: {{^}}test_llvm_amdgcn_sdot4_no_clamp
2326 ; GFX906: v_dot4_i32_i8 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}{{$}}
27 ; GFX10: v_dot4c_i32_i8_e32 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}{{$}}
2428 define amdgpu_kernel void @test_llvm_amdgcn_sdot4_no_clamp(
2529 i32 addrspace(1)* %r,
2630 <4 x i8> addrspace(1)* %a,
None ; RUN: llc -march=amdgcn -mcpu=gfx906 -verify-machineinstrs < %s | FileCheck %s --check-prefix=GCN --check-prefix=GFX906
0 ; RUN: llc -march=amdgcn -mcpu=gfx906 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX906
1 ; RUN: llc -march=amdgcn -mcpu=gfx1011 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX10,GFX1011
2 ; RUN: llc -march=amdgcn -mcpu=gfx1012 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX10,GFX1011
13
24 declare i32 @llvm.amdgcn.sdot8(i32 %a, i32 %b, i32 %c, i1 %clamp)
35
46 ; GCN-LABEL: {{^}}test_llvm_amdgcn_sdot8_clamp
57 ; GFX906: v_dot8_i32_i4 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} clamp{{$}}
8 ; GFX10: v_dot8_i32_i4 v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}} clamp{{$}}
69 define amdgpu_kernel void @test_llvm_amdgcn_sdot8_clamp(
710 i32 addrspace(1)* %r,
811 <8 x i4> addrspace(1)* %a,
2124
2225 ; GCN-LABEL: {{^}}test_llvm_amdgcn_sdot8_no_clamp
2326 ; GFX906: v_dot8_i32_i4 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}{{$}}
27 ; GFX1011: v_dot8_i32_i4 v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}{{$}}
2428 define amdgpu_kernel void @test_llvm_amdgcn_sdot8_no_clamp(
2529 i32 addrspace(1)* %r,
2630 <8 x i4> addrspace(1)* %a,
None ; RUN: llc -march=amdgcn -mcpu=gfx906 -verify-machineinstrs < %s | FileCheck %s --check-prefix=GCN --check-prefix=GFX906
0 ; RUN: llc -march=amdgcn -mcpu=gfx906 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX906
1 ; RUN: llc -march=amdgcn -mcpu=gfx1011 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX10
2 ; RUN: llc -march=amdgcn -mcpu=gfx1012 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX10
13
24 declare i32 @llvm.amdgcn.udot2(<2 x i16> %a, <2 x i16> %b, i32 %c, i1 %clamp)
35
46 ; GCN-LABEL: {{^}}test_llvm_amdgcn_udot2_clamp
57 ; GFX906: v_dot2_u32_u16 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} clamp{{$}}
8 ; GFX10: v_dot2_u32_u16 v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}} clamp{{$}}
69 define amdgpu_kernel void @test_llvm_amdgcn_udot2_clamp(
710 i32 addrspace(1)* %r,
811 <2 x i16> addrspace(1)* %a,
1922
2023 ; GCN-LABEL: {{^}}test_llvm_amdgcn_udot2_no_clamp
2124 ; GFX906: v_dot2_u32_u16 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}{{$}}
25 ; GFX10: v_dot2_u32_u16 v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}{{$}}
2226 define amdgpu_kernel void @test_llvm_amdgcn_udot2_no_clamp(
2327 i32 addrspace(1)* %r,
2428 <2 x i16> addrspace(1)* %a,
None ; RUN: llc -march=amdgcn -mcpu=gfx906 -verify-machineinstrs < %s | FileCheck %s --check-prefix=GCN --check-prefix=GFX906
0 ; RUN: llc -march=amdgcn -mcpu=gfx906 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX906
1 ; RUN: llc -march=amdgcn -mcpu=gfx1011 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX10
2 ; RUN: llc -march=amdgcn -mcpu=gfx1012 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX10
13
24 declare i32 @llvm.amdgcn.udot4(i32 %a, i32 %b, i32 %c, i1 %clamp)
35
46 ; GCN-LABEL: {{^}}test_llvm_amdgcn_udot4_clamp
57 ; GFX906: v_dot4_u32_u8 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} clamp{{$}}
8 ; GFX10: v_dot4_u32_u8 v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}} clamp{{$}}
69 define amdgpu_kernel void @test_llvm_amdgcn_udot4_clamp(
710 i32 addrspace(1)* %r,
811 <4 x i8> addrspace(1)* %a,
2124
2225 ; GCN-LABEL: {{^}}test_llvm_amdgcn_udot4_no_clamp
2326 ; GFX906: v_dot4_u32_u8 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}{{$}}
27 ; GFX10: v_dot4_u32_u8 v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}{{$}}
2428 define amdgpu_kernel void @test_llvm_amdgcn_udot4_no_clamp(
2529 i32 addrspace(1)* %r,
2630 <4 x i8> addrspace(1)* %a,
None ; RUN: llc -march=amdgcn -mcpu=gfx906 -verify-machineinstrs < %s | FileCheck %s --check-prefix=GCN --check-prefix=GFX906
0 ; RUN: llc -march=amdgcn -mcpu=gfx906 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX906
1 ; RUN: llc -march=amdgcn -mcpu=gfx1011 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX10
2 ; RUN: llc -march=amdgcn -mcpu=gfx1012 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX10
13
24 declare i32 @llvm.amdgcn.udot8(i32 %a, i32 %b, i32 %c, i1 %clamp)
35
46 ; GCN-LABEL: {{^}}test_llvm_amdgcn_udot8_clamp
57 ; GFX906: v_dot8_u32_u4 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} clamp{{$}}
8 ; GFX10: v_dot8_u32_u4 v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}} clamp{{$}}
69 define amdgpu_kernel void @test_llvm_amdgcn_udot8_clamp(
710 i32 addrspace(1)* %r,
811 <8 x i4> addrspace(1)* %a,
2124
2225 ; GCN-LABEL: {{^}}test_llvm_amdgcn_udot8_no_clamp
2326 ; GFX906: v_dot8_u32_u4 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}{{$}}
27 ; GFX10: v_dot8_u32_u4 v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}{{$}}
2428 define amdgpu_kernel void @test_llvm_amdgcn_udot8_no_clamp(
2529 i32 addrspace(1)* %r,
2630 <8 x i4> addrspace(1)* %a,
0 // RUN: llvm-mc -arch=amdgcn -mcpu=gfx1011 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
1 // RUN: llvm-mc -arch=amdgcn -mcpu=gfx1012 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
2
3 v_dot2_f32_f16 v0, v1, v2, v3
4 // GFX10: encoding: [0x00,0x40,0x13,0xcc,0x01,0x05,0x0e,0x1c]
5
6 v_dot2_i32_i16 v0, v1, v2, v3
7 // GFX10: encoding: [0x00,0x40,0x14,0xcc,0x01,0x05,0x0e,0x1c]
8
9 v_dot2_u32_u16 v0, v1, v2, v3
10 // GFX10: encoding: [0x00,0x40,0x15,0xcc,0x01,0x05,0x0e,0x1c]
11
12 v_dot4_i32_i8 v0, v1, v2, v3
13 // GFX10: encoding: [0x00,0x40,0x16,0xcc,0x01,0x05,0x0e,0x1c]
14
15 v_dot4_u32_u8 v0, v1, v2, v3
16 // GFX10: encoding: [0x00,0x40,0x17,0xcc,0x01,0x05,0x0e,0x1c]
17
18 v_dot8_i32_i4 v0, v1, v2, v3
19 // GFX10: encoding: [0x00,0x40,0x18,0xcc,0x01,0x05,0x0e,0x1c]
20
21 v_dot8_u32_u4 v0, v1, v2, v3
22 // GFX10: encoding: [0x00,0x40,0x19,0xcc,0x01,0x05,0x0e,0x1c]
23
24 v_dot2c_f32_f16 v5, v1, v2
25 // GFX10: encoding: [0x01,0x05,0x0a,0x04]
26
27 v_dot2c_f32_f16 v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
28 // GFX10: encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x00]
29
30 v_dot2c_f32_f16 v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 fi:1
31 // GFX10: encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x04,0x00]
32
33 v_dot2c_f32_f16 v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
34 // GFX10: encoding: [0xe9,0x04,0x0a,0x04,0x01,0x77,0x39,0x05]
35
36 v_dot2c_f32_f16 v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
37 // GFX10: encoding: [0xea,0x04,0x0a,0x04,0x01,0x77,0x39,0x05]
38
39 v_dot4c_i32_i8 v5, v1, v2
40 // GFX10: encoding: [0x01,0x05,0x0a,0x1a]
41
42 v_dot4c_i32_i8 v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
43 // GFX10: encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x00]
44
45 v_dot4c_i32_i8 v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 fi:1
46 // GFX10: encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x04,0x00]
47
48 v_dot4c_i32_i8 v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
49 // GFX10: encoding: [0xe9,0x04,0x0a,0x1a,0x01,0x77,0x39,0x05]
50
51 v_dot4c_i32_i8 v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
52 // GFX10: encoding: [0xea,0x04,0x0a,0x1a,0x01,0x77,0x39,0x05]
0 // RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1011 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX10 %s
1 // RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1012 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX10 %s
2
3 v_dot8c_i32_i4 v5, v1, v2
4 // GFX10: error:
5
6 v_dot8c_i32_i4 v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7 // GFX10: error:
8
9 v_dot8c_i32_i4 v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 fi:1
10 // GFX10: error:
11
12 v_dot8c_i32_i4 v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
13 // GFX10: error:
14
15 v_dot8c_i32_i4 v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
16 // GFX10: error:
17
18 s_getreg_b32 s2, hwreg(HW_REG_SHADER_CYCLES)
19 // GFX10: error:
20
21 v_fma_legacy_f32 v0, v1, v2, v3
22 // GFX10: error:
23
24 image_bvh_intersect_ray v[4:7], v[9:24], s[4:7]
25 // GFX10: error:
26
27 image_bvh_intersect_ray v[4:7], v[9:16], s[4:7] a16
28 // GFX10: error:
29
30 image_bvh64_intersect_ray v[4:7], v[9:24], s[4:7]
31 // GFX10: error:
32
33 image_bvh64_intersect_ray v[4:7], v[9:24], s[4:7] a16
34 // GFX10: error:
35
36 image_msaa_load v[1:4], v5, s[8:15] dmask:0xf dim:SQ_RSRC_IMG_1D
37 // GFX10: error:
38
39 image_msaa_load v[1:4], v5, s[8:15] dmask:0xf dim:SQ_RSRC_IMG_1D glc
40 // GFX10: error:
41
42 image_msaa_load v5, v[1:2], s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_2D d16
43 // GFX10: error:
44
45 image_msaa_load v[1:4], v5, s[8:15] dmask:0xf dim:SQ_RSRC_IMG_1D
46 // GFX10: error:
47
48 image_msaa_load v14, [v204,v11,v14,v19], s[40:47] dmask:0x1 dim:SQ_RSRC_IMG_2D_MSAA_ARRAY
49 // GFX10: error:
11 // RUN: not llvm-mc -arch=amdgcn -mcpu=kaveri -show-encoding %s | FileCheck -check-prefix=GCN -check-prefix=SICI %s
22 // RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=GCN -check-prefix=VI -check-prefix=GFX89 %s
33 // RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GCN -check-prefix=GFX89 -check-prefix=GFX9 %s
4 // RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=NOSICI -check-prefix=NOSICIVI %s
5 // RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck -check-prefix=NOSICI -check-prefix=NOSICIVI %s
6 // RUN: not llvm-mc -arch=amdgcn -mcpu=kaveri %s 2>&1 | FileCheck -check-prefix=NOSICI -check-prefix=NOSICIVI %s
7 // RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=NOSICIVI -check-prefix=NOVI %s
4 // RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1012 -show-encoding %s | FileCheck -check-prefix=GCN -check-prefix=GFX10 -check-prefix=GFX1012 %s
5 // RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=NOSICI -check-prefix=NOSICIVI -check-prefix=NOSICIGFX10 -check-prefix=NOSICIVIGFX10 %s
6 // RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck -check-prefix=NOSICI -check-prefix=NOSICIVI -check-prefix=NOSICIGFX10 -check-prefix=NOSICIVIGFX10 %s
7 // RUN: not llvm-mc -arch=amdgcn -mcpu=kaveri %s 2>&1 | FileCheck -check-prefix=NOSICI -check-prefix=NOSICIVI -check-prefix=NOSICIGFX10 -check-prefix=NOSICIVIGFX10 %s
8 // RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=NOSICIVI -check-prefix=NOVI -check-prefix=NOSICIVIGFX10 %s
89 // RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefix=NOGFX9 %s
10 // RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1012 %s 2>&1 | FileCheck -check-prefix=NOSICIGFX10 -check-prefix=NOGFX9 %s
911
1012 s_dcache_wb
1113 // GFX89: s_dcache_wb ; encoding: [0x00,0x00,0x84,0xc0,0x00,0x00,0x00,0x00]
14 // GFX1012: s_dcache_wb ; encoding: [0x00,0x00,0x84,0xf4,0x00,0x00,0x00,0x00]
1215 // NOSICI: error: instruction not supported on this GPU
1316
1417 s_dcache_wb_vol
1518 // GFX89: s_dcache_wb_vol ; encoding: [0x00,0x00,0x8c,0xc0,0x00,0x00,0x00,0x00]
16 // NOSICI: error: instruction not supported on this GPU
19 // NOSICIGFX10: error: instruction not supported on this GPU
1720
1821 s_atc_probe 0x7, s[4:5], s0
1922 // GFX89: s_atc_probe 7, s[4:5], s0 ; encoding: [0xc2,0x01,0x98,0xc0,0x00,0x00,0x00,0x00]
23 // GFX10: s_atc_probe 7, s[4:5], s0 ; encoding: [0xc2,0x01,0x98,0xf4,0x00,0x00,0x00,0x00]
2024 // NOSICI: error: instruction not supported on this GPU
2125
2226 s_atc_probe 0x0, s[4:5], 0x0
2327 // GFX89: s_atc_probe 0, s[4:5], 0x0 ; encoding: [0x02,0x00,0x9a,0xc0,0x00,0x00,0x00,0x00]
28 // GFX10: s_atc_probe 0, s[4:5], 0x0 ; encoding: [0x02,0x00,0x98,0xf4,0x00,0x00,0x00,0xfa]
2429 // NOSICI: error: instruction not supported on this GPU
2530
2631 s_atc_probe_buffer 0x1, s[8:11], s0
2732 // GFX89: s_atc_probe_buffer 1, s[8:11], s0 ; encoding: [0x44,0x00,0x9c,0xc0,0x00,0x00,0x00,0x00]
33 // GFX10: s_atc_probe_buffer 1, s[8:11], s0 ; encoding: [0x44,0x00,0x9c,0xf4,0x00,0x00,0x00,0x00]
2834 // NOSICI: error: instruction not supported on this GPU
2935
3036 s_atc_probe_buffer 0x0, s[8:11], s101
3137 // GFX89: s_atc_probe_buffer 0, s[8:11], s101 ; encoding: [0x04,0x00,0x9c,0xc0,0x65,0x00,0x00,0x00]
38 // GFX10: s_atc_probe_buffer 0, s[8:11], s101 ; encoding: [0x04,0x00,0x9c,0xf4,0x00,0x00,0x00,0xca]
3239 // NOSICI: error: instruction not supported on this GPU
3340
3441 s_memrealtime s[4:5]
3542 // GFX89: s_memrealtime s[4:5] ; encoding: [0x00,0x01,0x94,0xc0,0x00,0x00,0x00,0x00]
43 // GFX10: s_memrealtime s[4:5] ; encoding: [0x00,0x01,0x94,0xf4,0x00,0x00,0x00,0x00]
3644 // NOSICI: error: instruction not supported on this GPU
3745
3846 s_memrealtime tba
4654 // NOGFX9: error: not a valid operand.
4755
4856 s_memrealtime ttmp[0:1]
49 // VI: s_memrealtime ttmp[0:1] ; encoding: [0x00,0x1c,0x94,0xc0,0x00,0x00,0x00,0x00]
50 // GFX9: s_memrealtime ttmp[0:1] ; encoding: [0x00,0x1b,0x94,0xc0,0x00,0x00,0x00,0x00]
57 // VI: s_memrealtime ttmp[0:1] ; encoding: [0x00,0x1c,0x94,0xc0,0x00,0x00,0x00,0x00]
58 // GFX9: s_memrealtime ttmp[0:1] ; encoding: [0x00,0x1b,0x94,0xc0,0x00,0x00,0x00,0x00]
59 // GFX10: s_memrealtime ttmp[0:1] ; encoding: [0x00,0x1b,0x94,0xf4,0x00,0x00,0x00,0x00]
5160 // NOSICI: error: instruction not supported on this GPU
5261
5362 // FIXME: Should error about instruction on GPU
5463 s_store_dword s1, s[2:3], 0xfc
5564 // GFX89: s_store_dword s1, s[2:3], 0xfc ; encoding: [0x41,0x00,0x42,0xc0,0xfc,0x00,0x00,0x00]
65 // GFX1012: s_store_dword s1, s[2:3], 0xfc ; encoding: [0x41,0x00,0x40,0xf4,0xfc,0x00,0x00,0xfa]
5666 // NOSICI: error: instruction not supported on this GPU
5767
5868 s_store_dword s1, s[2:3], 0xfc glc
5969 // GFX89: s_store_dword s1, s[2:3], 0xfc glc ; encoding: [0x41,0x00,0x43,0xc0,0xfc,0x00,0x00,0x00]
70 // GFX1012: s_store_dword s1, s[2:3], 0xfc glc ; encoding: [0x41,0x00,0x41,0xf4,0xfc,0x00,0x00,0xfa]
6071 // NOSICI: error: invalid operand for instruction
6172
6273 s_store_dword s1, s[2:3], s4
6374 // GFX89: s_store_dword s1, s[2:3], s4 ; encoding: [0x41,0x00,0x40,0xc0,0x04,0x00,0x00,0x00]
75 // GFX1012: s_store_dword s1, s[2:3], s4 ; encoding: [0x41,0x00,0x40,0xf4,0x00,0x00,0x00,0x08]
6476 // NOSICI: error: instruction not supported on this GPU
6577
6678 s_store_dword s1, s[2:3], s4 glc
6779 // GFX89: s_store_dword s1, s[2:3], s4 glc ; encoding: [0x41,0x00,0x41,0xc0,0x04,0x00,0x00,0x00]
80 // GFX1012: s_store_dword s1, s[2:3], s4 glc ; encoding: [0x41,0x00,0x41,0xf4,0x00,0x00,0x00,0x08]
6881 // NOSICI: error: invalid operand for instruction
6982
7083 s_store_dword tba_lo, s[2:3], s4
90103 // FIXME: Should error on SI instead of silently ignoring glc
91104 s_load_dword s1, s[2:3], 0xfc glc
92105 // GFX89: s_load_dword s1, s[2:3], 0xfc glc ; encoding: [0x41,0x00,0x03,0xc0,0xfc,0x00,0x00,0x00]
106 // GFX10: s_load_dword s1, s[2:3], 0xfc glc ; encoding: [0x41,0x00,0x01,0xf4,0xfc,0x00,0x00,0xfa]
93107
94108 s_load_dword s1, s[2:3], s4 glc
95109 // GFX89: s_load_dword s1, s[2:3], s4 glc ; encoding: [0x41,0x00,0x01,0xc0,0x04,0x00,0x00,0x00]
110 // GFX10: s_load_dword s1, s[2:3], s4 glc ; encoding: [0x41,0x00,0x01,0xf4,0x00,0x00,0x00,0x08]
96111
97112 s_buffer_store_dword s10, s[92:95], m0
98113 // GFX89: s_buffer_store_dword s10, s[92:95], m0 ; encoding: [0xae,0x02,0x60,0xc0,0x7c,0x00,0x00,0x00]
138153
139154 s_buffer_load_dword s10, s[92:95], m0
140155 // GFX89: s_buffer_load_dword s10, s[92:95], m0 ; encoding: [0xae,0x02,0x20,0xc0,0x7c,0x00,0x00,0x00]
141 // SICI: s_buffer_load_dword s10, s[92:95], m0 ; encoding: [0x7c,0x5c,0x05,0xc2]
156 // SICIGFX10: s_buffer_load_dword s10, s[92:95], m0 ; encoding: [0x7c,0x5c,0x05,0xc2]
142157
143158 s_buffer_load_dword tba_lo, s[92:95], m0
144159 // VI: s_buffer_load_dword tba_lo, s[92:95], m0 ; encoding: [0x2e,0x1b,0x20,0xc0,0x7c,0x00,0x00,0x00]
161176 // NOGFX9: error: not a valid operand.
162177
163178 s_buffer_load_dword ttmp0, s[92:95], m0
164 // VI: s_buffer_load_dword ttmp0, s[92:95], m0 ; encoding: [0x2e,0x1c,0x20,0xc0,0x7c,0x00,0x00,0x00]
165 // GFX9: s_buffer_load_dword ttmp0, s[92:95], m0 ; encoding: [0x2e,0x1b,0x20,0xc0,0x7c,0x00,0x00,0x00]
166 // SICI: s_buffer_load_dword ttmp0, s[92:95], m0 ; encoding: [0x7c,0x5c,0x38,0xc2]
179 // VI: s_buffer_load_dword ttmp0, s[92:95], m0 ; encoding: [0x2e,0x1c,0x20,0xc0,0x7c,0x00,0x00,0x00]
180 // GFX9: s_buffer_load_dword ttmp0, s[92:95], m0 ; encoding: [0x2e,0x1b,0x20,0xc0,0x7c,0x00,0x00,0x00]
181 // SICI: s_buffer_load_dword ttmp0, s[92:95], m0 ; encoding: [0x7c,0x5c,0x38,0xc2]
182 // GFX10: s_buffer_load_dword ttmp0, s[92:95], m0 ; encoding: [0x2e,0x1b,0x20,0xf4,0x00,0x00,0x00,0xf8]
167183
168184 s_buffer_load_dwordx2 s[10:11], s[92:95], m0
169185 // GFX89: s_buffer_load_dwordx2 s[10:11], s[92:95], m0 ; encoding: [0xae,0x02,0x24,0xc0,0x7c,0x00,0x00,0x00]
170 // SICI: s_buffer_load_dwordx2 s[10:11], s[92:95], m0 ; encoding: [0x7c,0x5c,0x45,0xc2]
186 // SICI: s_buffer_load_dwordx2 s[10:11], s[92:95], m0 ; encoding: [0x7c,0x5c,0x45,0xc2]
187 // GFX10: s_buffer_load_dwordx2 s[10:11], s[92:95], m0 ; encoding: [0xae,0x02,0x24,0xf4,0x00,0x00,0x00,0xf8]
171188
172189 s_buffer_load_dwordx2 tba, s[92:95], m0
173190 // VI: s_buffer_load_dwordx2 tba, s[92:95], m0 ; encoding: [0x2e,0x1b,0x24,0xc0,0x7c,0x00,0x00,0x00]
180197 // NOGFX9: error: not a valid operand.
181198
182199 s_buffer_load_dwordx2 ttmp[0:1], s[92:95], m0
183 // VI: s_buffer_load_dwordx2 ttmp[0:1], s[92:95], m0 ; encoding: [0x2e,0x1c,0x24,0xc0,0x7c,0x00,0x00,0x00]
184 // GFX9: s_buffer_load_dwordx2 ttmp[0:1], s[92:95], m0 ; encoding: [0x2e,0x1b,0x24,0xc0,0x7c,0x00,0x00,0x00]
185 // SICI: s_buffer_load_dwordx2 ttmp[0:1], s[92:95], m0 ; encoding: [0x7c,0x5c,0x78,0xc2]
200 // VI: s_buffer_load_dwordx2 ttmp[0:1], s[92:95], m0 ; encoding: [0x2e,0x1c,0x24,0xc0,0x7c,0x00,0x00,0x00]
201 // GFX9: s_buffer_load_dwordx2 ttmp[0:1], s[92:95], m0 ; encoding: [0x2e,0x1b,0x24,0xc0,0x7c,0x00,0x00,0x00]
202 // SICI: s_buffer_load_dwordx2 ttmp[0:1], s[92:95], m0 ; encoding: [0x7c,0x5c,0x78,0xc2]
203 // GFX10: s_buffer_load_dwordx2 ttmp[0:1], s[92:95], m0 ; encoding: [0x2e,0x1b,0x24,0xf4,0x00,0x00,0x00,0xf8]
186204
187205 // FIXME: Should error on SI instead of silently ignoring glc
188206 s_buffer_load_dwordx4 s[8:11], s[92:95], m0 glc
189207 // GFX89: s_buffer_load_dwordx4 s[8:11], s[92:95], m0 glc ; encoding: [0x2e,0x02,0x29,0xc0,0x7c,0x00,0x00,0x00]
208 // GFX10: s_buffer_load_dwordx4 s[8:11], s[92:95], m0 glc ; encoding: [0x2e,0x02,0x29,0xf4,0x00,0x00,0x00,0xf8]
190209
191210 //===----------------------------------------------------------------------===//
192211 // s_scratch instructions
194213
195214 s_scratch_load_dword s5, s[2:3], s101
196215 // GFX9: s_scratch_load_dword s5, s[2:3], s101 ; encoding: [0x41,0x01,0x14,0xc0,0x65,0x00,0x00,0x00]
216 // GFX1012: s_scratch_load_dword s5, s[2:3], s101 ; encoding: [0x41,0x01,0x14,0xf4,0x00,0x00,0x00,0xca]
197217 // NOSICIVI: error: instruction not supported on this GPU
198218
199219 s_scratch_load_dword s5, s[2:3], s0 glc
200220 // GFX9: s_scratch_load_dword s5, s[2:3], s0 glc ; encoding: [0x41,0x01,0x15,0xc0,0x00,0x00,0x00,0x00]
221 // GFX1012: s_scratch_load_dword s5, s[2:3], s0 glc ; encoding: [0x41,0x01,0x15,0xf4,0x00,0x00,0x00,0x00]
201222 // NOSICIVI: error
202223
203224 s_scratch_load_dwordx2 s[100:101], s[2:3], s0
204225 // GFX9: s_scratch_load_dwordx2 s[100:101], s[2:3], s0 ; encoding: [0x01,0x19,0x18,0xc0,0x00,0x00,0x00,0x00]
226 // GFX1012: s_scratch_load_dwordx2 s[100:101], s[2:3], s0 ; encoding: [0x01,0x19,0x18,0xf4,0x00,0x00,0x00,0x00]
205227 // NOSICIVI: error: instruction not supported on this GPU
206228
207229 s_scratch_load_dwordx2 s[10:11], s[2:3], 0x1 glc
208230 // GFX9: s_scratch_load_dwordx2 s[10:11], s[2:3], 0x1 glc ; encoding: [0x81,0x02,0x1b,0xc0,0x01,0x00,0x00,0x00]
231 // GFX1012: s_scratch_load_dwordx2 s[10:11], s[2:3], 0x1 glc ; encoding: [0x81,0x02,0x19,0xf4,0x01,0x00,0x00,0xfa]
209232 // NOSICIVI: error
210233
211234 s_scratch_load_dwordx4 s[20:23], s[4:5], s0
212235 // GFX9: s_scratch_load_dwordx4 s[20:23], s[4:5], s0 ; encoding: [0x02,0x05,0x1c,0xc0,0x00,0x00,0x00,0x00]
236 // GFX1012: s_scratch_load_dwordx4 s[20:23], s[4:5], s0 ; encoding: [0x02,0x05,0x1c,0xf4,0x00,0x00,0x00,0x00]
213237 // NOSICIVI: error: instruction not supported on this GPU
214238
215239 s_scratch_store_dword s101, s[4:5], s0
216240 // GFX9: s_scratch_store_dword s101, s[4:5], s0 ; encoding: [0x42,0x19,0x54,0xc0,0x00,0x00,0x00,0x00]
241 // GFX1012: s_scratch_store_dword s101, s[4:5], s0 ; encoding: [0x42,0x19,0x54,0xf4,0x00,0x00,0x00,0x00]
217242 // NOSICIVI: error: instruction not supported on this GPU
218243
219244 s_scratch_store_dword s1, s[4:5], 0x123 glc
220245 // GFX9: s_scratch_store_dword s1, s[4:5], 0x123 glc ; encoding: [0x42,0x00,0x57,0xc0,0x23,0x01,0x00,0x00]
246 // GFX1012: s_scratch_store_dword s1, s[4:5], 0x123 glc ; encoding: [0x42,0x00,0x55,0xf4,0x23,0x01,0x00,0xfa]
221247 // NOSICIVI: error
222248
223249 s_scratch_store_dwordx2 s[2:3], s[4:5], s101 glc
224250 // GFX9: s_scratch_store_dwordx2 s[2:3], s[4:5], s101 glc ; encoding: [0x82,0x00,0x59,0xc0,0x65,0x00,0x00,0x00]
251 // GFX1012: s_scratch_store_dwordx2 s[2:3], s[4:5], s101 glc ; encoding: [0x82,0x00,0x59,0xf4,0x00,0x00,0x00,0xca]
225252 // NOSICIVI: error
226253
227254 s_scratch_store_dwordx4 s[4:7], s[4:5], s0 glc
228255 // GFX9: s_scratch_store_dwordx4 s[4:7], s[4:5], s0 glc ; encoding: [0x02,0x01,0x5d,0xc0,0x00,0x00,0x00,0x00]
256 // GFX1012: s_scratch_store_dwordx4 s[4:7], s[4:5], s0 glc ; encoding: [0x02,0x01,0x5d,0xf4,0x00,0x00,0x00,0x00]
229257 // NOSICIVI: error
230258
231259 //===----------------------------------------------------------------------===//
234262
235263 s_dcache_discard s[2:3], s0
236264 // GFX9: s_dcache_discard s[2:3], s0 ; encoding: [0x01,0x00,0xa0,0xc0,0x00,0x00,0x00,0x00]
265 // GFX1012: s_dcache_discard s[2:3], s0 ; encoding: [0x01,0x00,0xa0,0xf4,0x00,0x00,0x00,0x00]
237266 // NOSICIVI: error: instruction not supported on this GPU
238267
239268 s_dcache_discard s[2:3], 0x0
240269 // GFX9: s_dcache_discard s[2:3], 0x0 ; encoding: [0x01,0x00,0xa2,0xc0,0x00,0x00,0x00,0x00]
270 // GFX1012: s_dcache_discard s[2:3], 0x0 ; encoding: [0x01,0x00,0xa0,0xf4,0x00,0x00,0x00,0xfa]
241271 // NOSICIVI: error: instruction not supported on this GPU
242272
243273 s_dcache_discard_x2 s[2:3], s101
244274 // GFX9: s_dcache_discard_x2 s[2:3], s101 ; encoding: [0x01,0x00,0xa4,0xc0,0x65,0x00,0x00,0x00]
275 // GFX1012: s_dcache_discard_x2 s[2:3], s101 ; encoding: [0x01,0x00,0xa4,0xf4,0x00,0x00,0x00,0xca]
245276 // NOSICIVI: error: instruction not supported on this GPU
246277
247278 s_dcache_discard_x2 s[2:3], 0x0
248279 // GFX9: s_dcache_discard_x2 s[2:3], 0x0 ; encoding: [0x01,0x00,0xa6,0xc0,0x00,0x00,0x00,0x00]
280 // GFX1012: s_dcache_discard_x2 s[2:3], 0x0 ; encoding: [0x01,0x00,0xa4,0xf4,0x00,0x00,0x00,0xfa]
249281 // NOSICIVI: error: instruction not supported on this GPU
250282
251283 //===----------------------------------------------------------------------===//
254286
255287 s_atomic_add s5, s[2:3], s101
256288 // GFX9: s_atomic_add s5, s[2:3], s101 ; encoding: [0x41,0x01,0x08,0xc2,0x65,0x00,0x00,0x00]
289 // GFX1012: s_atomic_add s5, s[2:3], s101 ; encoding: [0x41,0x01,0x08,0xf6,0x00,0x00,0x00,0xca]
257290 // NOSICIVI: error:
258291
259292 s_atomic_add s5, s[2:3], 0x0
260293 // GFX9: s_atomic_add s5, s[2:3], 0x0 ; encoding: [0x41,0x01,0x0a,0xc2,0x00,0x00,0x00,0x00]
294 // GFX1012: s_atomic_add s5, s[2:3], 0x0 ; encoding: [0x41,0x01,0x08,0xf6,0x00,0x00,0x00,0xfa]
261295 // NOSICIVI: error:
262296
263297 s_atomic_add s5, s[2:3], s0 glc
264298 // GFX9: s_atomic_add s5, s[2:3], s0 glc ; encoding: [0x41,0x01,0x09,0xc2,0x00,0x00,0x00,0x00]
299 // GFX1012: s_atomic_add s5, s[2:3], s0 glc ; encoding: [0x41,0x01,0x09,0xf6,0x00,0x00,0x00,0x00]
265300 // NOSICIVI: error:
266301
267302 s_atomic_add_x2 s[10:11], s[2:3], s101
268303 // GFX9: s_atomic_add_x2 s[10:11], s[2:3], s101 ; encoding: [0x81,0x02,0x88,0xc2,0x65,0x00,0x00,0x00]
304 // GFX1012: s_atomic_add_x2 s[10:11], s[2:3], s101 ; encoding: [0x81,0x02,0x88,0xf6,0x00,0x00,0x00,0xca]
269305 // NOSICIVI: error:
270306
271307 s_atomic_and s5, s[2:3], s101
272308 // GFX9: s_atomic_and s5, s[2:3], s101 ; encoding: [0x41,0x01,0x20,0xc2,0x65,0x00,0x00,0x00]
309 // GFX1012: s_atomic_and s5, s[2:3], s101 ; encoding: [0x41,0x01,0x20,0xf6,0x00,0x00,0x00,0xca]
273310 // NOSICIVI: error:
274311
275312 s_atomic_and_x2 s[10:11], s[2:3], 0x0
276313 // GFX9: s_atomic_and_x2 s[10:11], s[2:3], 0x0 ; encoding: [0x81,0x02,0xa2,0xc2,0x00,0x00,0x00,0x00]
314 // GFX1012: s_atomic_and_x2 s[10:11], s[2:3], 0x0 ; encoding: [0x81,0x02,0xa0,0xf6,0x00,0x00,0x00,0xfa]
277315 // NOSICIVI: error:
278316
279317 s_atomic_cmpswap s[10:11], s[2:3], s101
280318 // GFX9: s_atomic_cmpswap s[10:11], s[2:3], s101 ; encoding: [0x81,0x02,0x04,0xc2,0x65,0x00,0x00,0x00]
319 // GFX1012: s_atomic_cmpswap s[10:11], s[2:3], s101 ; encoding: [0x81,0x02,0x04,0xf6,0x00,0x00,0x00,0xca]
281320 // NOSICIVI: error:
282321
283322 s_atomic_cmpswap s[10:11], s[2:3], 0x0
284323 // GFX9: s_atomic_cmpswap s[10:11], s[2:3], 0x0 ; encoding: [0x81,0x02,0x06,0xc2,0x00,0x00,0x00,0x00]
324 // GFX1012: s_atomic_cmpswap s[10:11], s[2:3], 0x0 ; encoding: [0x81,0x02,0x04,0xf6,0x00,0x00,0x00,0xfa]
285325 // NOSICIVI: error:
286326
287327 s_atomic_cmpswap s[10:11], s[2:3], s0 glc
288328 // GFX9: s_atomic_cmpswap s[10:11], s[2:3], s0 glc ; encoding: [0x81,0x02,0x05,0xc2,0x00,0x00,0x00,0x00]
329 // GFX1012: s_atomic_cmpswap s[10:11], s[2:3], s0 glc ; encoding: [0x81,0x02,0x05,0xf6,0x00,0x00,0x00,0x00]
289330 // NOSICIVI: error:
290331
291332 s_atomic_cmpswap_x2 s[20:23], s[2:3], s101
292333 // GFX9: s_atomic_cmpswap_x2 s[20:23], s[2:3], s101 ; encoding: [0x01,0x05,0x84,0xc2,0x65,0x00,0x00,0x00]
334 // GFX1012: s_atomic_cmpswap_x2 s[20:23], s[2:3], s101 ; encoding: [0x01,0x05,0x84,0xf6,0x00,0x00,0x00,0xca]
293335 // NOSICIVI: error:
294336
295337 s_atomic_cmpswap_x2 s[20:23], s[2:3], 0x0
296338 // GFX9: s_atomic_cmpswap_x2 s[20:23], s[2:3], 0x0 ; encoding: [0x01,0x05,0x86,0xc2,0x00,0x00,0x00,0x00]
339 // GFX1012: s_atomic_cmpswap_x2 s[20:23], s[2:3], 0x0 ; encoding: [0x01,0x05,0x84,0xf6,0x00,0x00,0x00,0xfa]
297340 // NOSICIVI: error:
298341
299342 s_atomic_cmpswap_x2 s[20:23], s[2:3], s0 glc
300343 // GFX9: s_atomic_cmpswap_x2 s[20:23], s[2:3], s0 glc ; encoding: [0x01,0x05,0x85,0xc2,0x00,0x00,0x00,0x00]
344 // GFX1012: s_atomic_cmpswap_x2 s[20:23], s[2:3], s0 glc ; encoding: [0x01,0x05,0x85,0xf6,0x00,0x00,0x00,0x00]
301345 // NOSICIVI: error:
302346
303347 s_atomic_dec s5, s[2:3], s0 glc
304348 // GFX9: s_atomic_dec s5, s[2:3], s0 glc ; encoding: [0x41,0x01,0x31,0xc2,0x00,0x00,0x00,0x00]
349 // GFX1012: s_atomic_dec s5, s[2:3], s0 glc ; encoding: [0x41,0x01,0x31,0xf6,0x00,0x00,0x00,0x00]
305350 // NOSICIVI: error:
306351
307352 s_atomic_dec_x2 s[10:11], s[2:3], s101
308353 // GFX9: s_atomic_dec_x2 s[10:11], s[2:3], s101 ; encoding: [0x81,0x02,0xb0,0xc2,0x65,0x00,0x00,0x00]
354 // GFX1012: s_atomic_dec_x2 s[10:11], s[2:3], s101 ; encoding: [0x81,0x02,0xb0,0xf6,0x00,0x00,0x00,0xca]
309355 // NOSICIVI: error:
310356
311357 s_atomic_inc s5, s[2:3], s0 glc
312358 // GFX9: s_atomic_inc s5, s[2:3], s0 glc ; encoding: [0x41,0x01,0x2d,0xc2,0x00,0x00,0x00,0x00]
359 // GFX1012: s_atomic_inc s5, s[2:3], s0 glc ; encoding: [0x41,0x01,0x2d,0xf6,0x00,0x00,0x00,0x00]
313360 // NOSICIVI: error:
314361
315362 s_atomic_inc_x2 s[10:11], s[2:3], s101
316363 // GFX9: s_atomic_inc_x2 s[10:11], s[2:3], s101 ; encoding: [0x81,0x02,0xac,0xc2,0x65,0x00,0x00,0x00]
364 // GFX1012: s_atomic_inc_x2 s[10:11], s[2:3], s101 ; encoding: [0x81,0x02,0xac,0xf6,0x00,0x00,0x00,0xca]
317365 // NOSICIVI: error:
318366
319367 s_atomic_or s5, s[2:3], 0x0
320368 // GFX9: s_atomic_or s5, s[2:3], 0x0 ; encoding: [0x41,0x01,0x26,0xc2,0x00,0x00,0x00,0x00]
369 // GFX1012: s_atomic_or s5, s[2:3], 0x0 ; encoding: [0x41,0x01,0x24,0xf6,0x00,0x00,0x00,0xfa]
321370 // NOSICIVI: error:
322371
323372 s_atomic_or_x2 s[10:11], s[2:3], s0 glc
324373 // GFX9: s_atomic_or_x2 s[10:11], s[2:3], s0 glc ; encoding: [0x81,0x02,0xa5,0xc2,0x00,0x00,0x00,0x00]
374 // GFX1012: s_atomic_or_x2 s[10:11], s[2:3], s0 glc ; encoding: [0x81,0x02,0xa5,0xf6,0x00,0x00,0x00,0x00]
325375 // NOSICIVI: error:
326376
327377 s_atomic_smax s5, s[2:3], s101
328378 // GFX9: s_atomic_smax s5, s[2:3], s101 ; encoding: [0x41,0x01,0x18,0xc2,0x65,0x00,0x00,0x00]
379 // GFX1012: s_atomic_smax s5, s[2:3], s101 ; encoding: [0x41,0x01,0x18,0xf6,0x00,0x00,0x00,0xca]
329380 // NOSICIVI: error:
330381
331382 s_atomic_smax_x2 s[10:11], s[2:3], s0 glc
332383 // GFX9: s_atomic_smax_x2 s[10:11], s[2:3], s0 glc ; encoding: [0x81,0x02,0x99,0xc2,0x00,0x00,0x00,0x00]
384 // GFX1012: s_atomic_smax_x2 s[10:11], s[2:3], s0 glc ; encoding: [0x81,0x02,0x99,0xf6,0x00,0x00,0x00,0x00]
333385 // NOSICIVI: error:
334386
335387 s_atomic_smin s5, s[2:3], s101
336388 // GFX9: s_atomic_smin s5, s[2:3], s101 ; encoding: [0x41,0x01,0x10,0xc2,0x65,0x00,0x00,0x00]
389 // GFX1012: s_atomic_smin s5, s[2:3], s101 ; encoding: [0x41,0x01,0x10,0xf6,0x00,0x00,0x00,0xca]
337390 // NOSICIVI: error:
338391
339392 s_atomic_smin_x2 s[10:11], s[2:3], s0 glc
340393 // GFX9: s_atomic_smin_x2 s[10:11], s[2:3], s0 glc ; encoding: [0x81,0x02,0x91,0xc2,0x00,0x00,0x00,0x00]
394 // GFX1012: s_atomic_smin_x2 s[10:11], s[2:3], s0 glc ; encoding: [0x81,0x02,0x91,0xf6,0x00,0x00,0x00,0x00]
341395 // NOSICIVI: error:
342396
343397 s_atomic_sub s5, s[2:3], s101
344398 // GFX9: s_atomic_sub s5, s[2:3], s101 ; encoding: [0x41,0x01,0x0c,0xc2,0x65,0x00,0x00,0x00]
399 // GFX1012: s_atomic_sub s5, s[2:3], s101 ; encoding: [0x41,0x01,0x0c,0xf6,0x00,0x00,0x00,0xca]
345400 // NOSICIVI: error:
346401
347402 s_atomic_sub_x2 s[10:11], s[2:3], s0 glc
348403 // GFX9: s_atomic_sub_x2 s[10:11], s[2:3], s0 glc ; encoding: [0x81,0x02,0x8d,0xc2,0x00,0x00,0x00,0x00]
404 // GFX1012: s_atomic_sub_x2 s[10:11], s[2:3], s0 glc ; encoding: [0x81,0x02,0x8d,0xf6,0x00,0x00,0x00,0x00]
349405 // NOSICIVI: error:
350406
351407 s_atomic_swap s5, s[2:3], s101
352408 // GFX9: s_atomic_swap s5, s[2:3], s101 ; encoding: [0x41,0x01,0x00,0xc2,0x65,0x00,0x00,0x00]
409 // GFX1012: s_atomic_swap s5, s[2:3], s101 ; encoding: [0x41,0x01,0x00,0xf6,0x00,0x00,0x00,0xca]
353410 // NOSICIVI: error:
354411
355412 s_atomic_swap_x2 s[10:11], s[2:3], s0 glc
356413 // GFX9: s_atomic_swap_x2 s[10:11], s[2:3], s0 glc ; encoding: [0x81,0x02,0x81,0xc2,0x00,0x00,0x00,0x00]
414 // GFX1012: s_atomic_swap_x2 s[10:11], s[2:3], s0 glc ; encoding: [0x81,0x02,0x81,0xf6,0x00,0x00,0x00,0x00]
357415 // NOSICIVI: error:
358416
359417 s_atomic_umax s5, s[2:3], s0 glc
360418 // GFX9: s_atomic_umax s5, s[2:3], s0 glc ; encoding: [0x41,0x01,0x1d,0xc2,0x00,0x00,0x00,0x00]
419 // GFX1012: s_atomic_umax s5, s[2:3], s0 glc ; encoding: [0x41,0x01,0x1d,0xf6,0x00,0x00,0x00,0x00]
361420 // NOSICIVI: error:
362421
363422 s_atomic_umax_x2 s[10:11], s[2:3], s101
364423 // GFX9: s_atomic_umax_x2 s[10:11], s[2:3], s101 ; encoding: [0x81,0x02,0x9c,0xc2,0x65,0x00,0x00,0x00]
424 // GFX1012: s_atomic_umax_x2 s[10:11], s[2:3], s101 ; encoding: [0x81,0x02,0x9c,0xf6,0x00,0x00,0x00,0xca]
365425 // NOSICIVI: error:
366426
367427 s_atomic_umin s5, s[2:3], s101
368428 // GFX9: s_atomic_umin s5, s[2:3], s101 ; encoding: [0x41,0x01,0x14,0xc2,0x65,0x00,0x00,0x00]
429 // GFX1012: s_atomic_umin s5, s[2:3], s101 ; encoding: [0x41,0x01,0x14,0xf6,0x00,0x00,0x00,0xca]
369430 // NOSICIVI: error:
370431
371432 s_atomic_umin_x2 s[10:11], s[2:3], s0 glc
372433 // GFX9: s_atomic_umin_x2 s[10:11], s[2:3], s0 glc ; encoding: [0x81,0x02,0x95,0xc2,0x00,0x00,0x00,0x00]
434 // GFX1012: s_atomic_umin_x2 s[10:11], s[2:3], s0 glc ; encoding: [0x81,0x02,0x95,0xf6,0x00,0x00,0x00,0x00]
373435 // NOSICIVI: error:
374436
375437 s_atomic_xor s5, s[2:3], s101
376438 // GFX9: s_atomic_xor s5, s[2:3], s101 ; encoding: [0x41,0x01,0x28,0xc2,0x65,0x00,0x00,0x00]
439 // GFX1012: s_atomic_xor s5, s[2:3], s101 ; encoding: [0x41,0x01,0x28,0xf6,0x00,0x00,0x00,0xca]
377440 // NOSICIVI: error:
378441
379442 s_atomic_xor_x2 s[10:11], s[2:3], s0 glc
380443 // GFX9: s_atomic_xor_x2 s[10:11], s[2:3], s0 glc ; encoding: [0x81,0x02,0xa9,0xc2,0x00,0x00,0x00,0x00]
444 // GFX1012: s_atomic_xor_x2 s[10:11], s[2:3], s0 glc ; encoding: [0x81,0x02,0xa9,0xf6,0x00,0x00,0x00,0x00]
381445 // NOSICIVI: error:
382446
383447 //===----------------------------------------------------------------------===//
386450
387451 s_buffer_atomic_add s5, s[4:7], s101
388452 // GFX9: s_buffer_atomic_add s5, s[4:7], s101 ; encoding: [0x42,0x01,0x08,0xc1,0x65,0x00,0x00,0x00]
453 // GFX1012: s_buffer_atomic_add s5, s[4:7], s101 ; encoding: [0x42,0x01,0x08,0xf5,0x00,0x00,0x00,0xca]
389454 // NOSICIVI: error:
390455
391456 s_buffer_atomic_add s5, s[4:7], 0x0
392457 // GFX9: s_buffer_atomic_add s5, s[4:7], 0x0 ; encoding: [0x42,0x01,0x0a,0xc1,0x00,0x00,0x00,0x00]
458 // GFX1012: s_buffer_atomic_add s5, s[4:7], 0x0 ; encoding: [0x42,0x01,0x08,0xf5,0x00,0x00,0x00,0xfa]
393459 // NOSICIVI: error:
394460
395461 s_buffer_atomic_add s5, s[4:7], s0 glc
396462 // GFX9: s_buffer_atomic_add s5, s[4:7], s0 glc ; encoding: [0x42,0x01,0x09,0xc1,0x00,0x00,0x00,0x00]
463 // GFX1012: s_buffer_atomic_add s5, s[4:7], s0 glc ; encoding: [0x42,0x01,0x09,0xf5,0x00,0x00,0x00,0x00]
397464 // NOSICIVI: error:
398465
399466 s_buffer_atomic_add_x2 s[10:11], s[4:7], s0
400467 // GFX9: s_buffer_atomic_add_x2 s[10:11], s[4:7], s0 ; encoding: [0x82,0x02,0x88,0xc1,0x00,0x00,0x00,0x00]
468 // GFX1012: s_buffer_atomic_add_x2 s[10:11], s[4:7], s0 ; encoding: [0x82,0x02,0x88,0xf5,0x00,0x00,0x00,0x00]
401469 // NOSICIVI: error:
402470
403471 s_buffer_atomic_and s101, s[4:7], s0
404472 // GFX9: s_buffer_atomic_and s101, s[4:7], s0 ; encoding: [0x42,0x19,0x20,0xc1,0x00,0x00,0x00,0x00]
473 // GFX1012: s_buffer_atomic_and s101, s[4:7], s0 ; encoding: [0x42,0x19,0x20,0xf5,0x00,0x00,0x00,0x00]
405474 // NOSICIVI: error:
406475
407476 s_buffer_atomic_and_x2 s[10:11], s[8:11], s0
408477 // GFX9: s_buffer_atomic_and_x2 s[10:11], s[8:11], s0 ; encoding: [0x84,0x02,0xa0,0xc1,0x00,0x00,0x00,0x00]
478 // GFX1012: s_buffer_atomic_and_x2 s[10:11], s[8:11], s0 ; encoding: [0x84,0x02,0xa0,0xf5,0x00,0x00,0x00,0x00]
409479 // NOSICIVI: error:
410480
411481 s_buffer_atomic_cmpswap s[10:11], s[4:7], s0
412482 // GFX9: s_buffer_atomic_cmpswap s[10:11], s[4:7], s0 ; encoding: [0x82,0x02,0x04,0xc1,0x00,0x00,0x00,0x00]
483 // GFX1012: s_buffer_atomic_cmpswap s[10:11], s[4:7], s0 ; encoding: [0x82,0x02,0x04,0xf5,0x00,0x00,0x00,0x00]
413484 // NOSICIVI: error:
414485
415486 s_buffer_atomic_cmpswap s[10:11], s[4:7], 0x0
416487 // GFX9: s_buffer_atomic_cmpswap s[10:11], s[4:7], 0x0 ; encoding: [0x82,0x02,0x06,0xc1,0x00,0x00,0x00,0x00]
488 // GFX1012: s_buffer_atomic_cmpswap s[10:11], s[4:7], 0x0 ; encoding: [0x82,0x02,0x04,0xf5,0x00,0x00,0x00,0xfa]
417489 // NOSICIVI: error:
418490
419491 s_buffer_atomic_cmpswap s[10:11], s[4:7], s0 glc
420492 // GFX9: s_buffer_atomic_cmpswap s[10:11], s[4:7], s0 glc ; encoding: [0x82,0x02,0x05,0xc1,0x00,0x00,0x00,0x00]
493 // GFX1012: s_buffer_atomic_cmpswap s[10:11], s[4:7], s0 glc ; encoding: [0x82,0x02,0x05,0xf5,0x00,0x00,0x00,0x00]
421494 // NOSICIVI: error:
422495
423496 s_buffer_atomic_cmpswap_x2 s[20:23], s[4:7], s101
424497 // GFX9: s_buffer_atomic_cmpswap_x2 s[20:23], s[4:7], s101 ; encoding: [0x02,0x05,0x84,0xc1,0x65,0x00,0x00,0x00]
498 // GFX1012: s_buffer_atomic_cmpswap_x2 s[20:23], s[4:7], s101 ; encoding: [0x02,0x05,0x84,0xf5,0x00,0x00,0x00,0xca]
425499 // NOSICIVI: error:
426500
427501 s_buffer_atomic_cmpswap_x2 s[20:23], s[4:7], 0x0
428502 // GFX9: s_buffer_atomic_cmpswap_x2 s[20:23], s[4:7], 0x0 ; encoding: [0x02,0x05,0x86,0xc1,0x00,0x00,0x00,0x00]
503 // GFX1012: s_buffer_atomic_cmpswap_x2 s[20:23], s[4:7], 0x0 ; encoding: [0x02,0x05,0x84,0xf5,0x00,0x00,0x00,0xfa]
429504 // NOSICIVI: error:
430505
431506 s_buffer_atomic_cmpswap_x2 s[20:23], s[4:7], s0 glc
432507 // GFX9: s_buffer_atomic_cmpswap_x2 s[20:23], s[4:7], s0 glc ; encoding: [0x02,0x05,0x85,0xc1,0x00,0x00,0x00,0x00]
508 // GFX1012: s_buffer_atomic_cmpswap_x2 s[20:23], s[4:7], s0 glc ; encoding: [0x02,0x05,0x85,0xf5,0x00,0x00,0x00,0x00]
433509 // NOSICIVI: error:
434510
435511 s_buffer_atomic_dec s5, s[4:7], s0
436512 // GFX9: s_buffer_atomic_dec s5, s[4:7], s0 ; encoding: [0x42,0x01,0x30,0xc1,0x00,0x00,0x00,0x00]
513 // GFX1012: s_buffer_atomic_dec s5, s[4:7], s0 ; encoding: [0x42,0x01,0x30,0xf5,0x00,0x00,0x00,0x00]
437514 // NOSICIVI: error:
438515
439516 s_buffer_atomic_dec_x2 s[10:11], s[4:7], s0 glc
440517 // GFX9: s_buffer_atomic_dec_x2 s[10:11], s[4:7], s0 glc ; encoding: [0x82,0x02,0xb1,0xc1,0x00,0x00,0x00,0x00]
518 // GFX1012: s_buffer_atomic_dec_x2 s[10:11], s[4:7], s0 glc ; encoding: [0x82,0x02,0xb1,0xf5,0x00,0x00,0x00,0x00]
441519 // NOSICIVI: error:
442520
443521 s_buffer_atomic_inc s101, s[4:7], s0
444522 // GFX9: s_buffer_atomic_inc s101, s[4:7], s0 ; encoding: [0x42,0x19,0x2c,0xc1,0x00,0x00,0x00,0x00]
523 // GFX1012: s_buffer_atomic_inc s101, s[4:7], s0 ; encoding: [0x42,0x19,0x2c,0xf5,0x00,0x00,0x00,0x00]
445524 // NOSICIVI: error:
446525
447526 s_buffer_atomic_inc_x2 s[10:11], s[4:7], 0x0
448527 // GFX9: s_buffer_atomic_inc_x2 s[10:11], s[4:7], 0x0 ; encoding: [0x82,0x02,0xae,0xc1,0x00,0x00,0x00,0x00]
528 // GFX1012: s_buffer_atomic_inc_x2 s[10:11], s[4:7], 0x0 ; encoding: [0x82,0x02,0xac,0xf5,0x00,0x00,0x00,0xfa]
449529 // NOSICIVI: error:
450530
451531 s_buffer_atomic_or s5, s[8:11], s0
452532 // GFX9: s_buffer_atomic_or s5, s[8:11], s0 ; encoding: [0x44,0x01,0x24,0xc1,0x00,0x00,0x00,0x00]
533 // GFX1012: s_buffer_atomic_or s5, s[8:11], s0 ; encoding: [0x44,0x01,0x24,0xf5,0x00,0x00,0x00,0x00]
453534 // NOSICIVI: error:
454535
455536 s_buffer_atomic_or_x2 s[10:11], s[96:99], s0
456537 // GFX9: s_buffer_atomic_or_x2 s[10:11], s[96:99], s0 ; encoding: [0xb0,0x02,0xa4,0xc1,0x00,0x00,0x00,0x00]
538 // GFX1012: s_buffer_atomic_or_x2 s[10:11], s[96:99], s0 ; encoding: [0xb0,0x02,0xa4,0xf5,0x00,0x00,0x00,0x00]
457539 // NOSICIVI: error:
458540
459541 s_buffer_atomic_smax s5, s[4:7], s101
460542 // GFX9: s_buffer_atomic_smax s5, s[4:7], s101 ; encoding: [0x42,0x01,0x18,0xc1,0x65,0x00,0x00,0x00]
543 // GFX1012: s_buffer_atomic_smax s5, s[4:7], s101 ; encoding: [0x42,0x01,0x18,0xf5,0x00,0x00,0x00,0xca]
461544 // NOSICIVI: error:
462545
463546 s_buffer_atomic_smax_x2 s[100:101], s[4:7], s0
464547 // GFX9: s_buffer_atomic_smax_x2 s[100:101], s[4:7], s0 ; encoding: [0x02,0x19,0x98,0xc1,0x00,0x00,0x00,0x00]
548 // GFX1012: s_buffer_atomic_smax_x2 s[100:101], s[4:7], s0 ; encoding: [0x02,0x19,0x98,0xf5,0x00,0x00,0x00,0x00]
465549 // NOSICIVI: error:
466550
467551 s_buffer_atomic_smin s5, s[4:7], 0x0
468552 // GFX9: s_buffer_atomic_smin s5, s[4:7], 0x0 ; encoding: [0x42,0x01,0x12,0xc1,0x00,0x00,0x00,0x00]
553 // GFX1012: s_buffer_atomic_smin s5, s[4:7], 0x0 ; encoding: [0x42,0x01,0x10,0xf5,0x00,0x00,0x00,0xfa]
469554 // NOSICIVI: error:
470555
471556 s_buffer_atomic_smin_x2 s[12:13], s[4:7], s0
472557 // GFX9: s_buffer_atomic_smin_x2 s[12:13], s[4:7], s0 ; encoding: [0x02,0x03,0x90,0xc1,0x00,0x00,0x00,0x00]
558 // GFX1012: s_buffer_atomic_smin_x2 s[12:13], s[4:7], s0 ; encoding: [0x02,0x03,0x90,0xf5,0x00,0x00,0x00,0x00]
473559 // NOSICIVI: error:
474560
475561 s_buffer_atomic_sub s5, s[4:7], s0 glc
476562 // GFX9: s_buffer_atomic_sub s5, s[4:7], s0 glc ; encoding: [0x42,0x01,0x0d,0xc1,0x00,0x00,0x00,0x00]
563 // GFX1012: s_buffer_atomic_sub s5, s[4:7], s0 glc ; encoding: [0x42,0x01,0x0d,0xf5,0x00,0x00,0x00,0x00]
477564 // NOSICIVI: error:
478565
479566 s_buffer_atomic_sub_x2 s[10:11], s[4:7], s0
480567 // GFX9: s_buffer_atomic_sub_x2 s[10:11], s[4:7], s0 ; encoding: [0x82,0x02,0x8c,0xc1,0x00,0x00,0x00,0x00]
568 // GFX1012: s_buffer_atomic_sub_x2 s[10:11], s[4:7], s0 ; encoding: [0x82,0x02,0x8c,0xf5,0x00,0x00,0x00,0x00]
481569 // NOSICIVI: error:
482570
483571 s_buffer_atomic_swap s5, s[4:7], s0
484572 // GFX9: s_buffer_atomic_swap s5, s[4:7], s0 ; encoding: [0x42,0x01,0x00,0xc1,0x00,0x00,0x00,0x00]
573 // GFX1012: s_buffer_atomic_swap s5, s[4:7], s0 ; encoding: [0x42,0x01,0x00,0xf5,0x00,0x00,0x00,0x00]
485574 // NOSICIVI: error:
486575
487576 s_buffer_atomic_swap_x2 s[10:11], s[4:7], s0 glc
488577 // GFX9: s_buffer_atomic_swap_x2 s[10:11], s[4:7], s0 glc ; encoding: [0x82,0x02,0x81,0xc1,0x00,0x00,0x00,0x00]
578 // GFX1012: s_buffer_atomic_swap_x2 s[10:11], s[4:7], s0 glc ; encoding: [0x82,0x02,0x81,0xf5,0x00,0x00,0x00,0x00]
489579 // NOSICIVI: error:
490580
491581 s_buffer_atomic_umax s5, s[4:7], s0
492582 // GFX9: s_buffer_atomic_umax s5, s[4:7], s0 ; encoding: [0x42,0x01,0x1c,0xc1,0x00,0x00,0x00,0x00]
583 // GFX1012: s_buffer_atomic_umax s5, s[4:7], s0 ; encoding: [0x42,0x01,0x1c,0xf5,0x00,0x00,0x00,0x00]
493584 // NOSICIVI: error:
494585
495586 s_buffer_atomic_umax_x2 s[10:11], s[4:7], s0 glc
496587 // GFX9: s_buffer_atomic_umax_x2 s[10:11], s[4:7], s0 glc ; encoding: [0x82,0x02,0x9d,0xc1,0x00,0x00,0x00,0x00]
588 // GFX1012: s_buffer_atomic_umax_x2 s[10:11], s[4:7], s0 glc ; encoding: [0x82,0x02,0x9d,0xf5,0x00,0x00,0x00,0x00]
497589 // NOSICIVI: error:
498590
499591 s_buffer_atomic_umin s5, s[4:7], s0
500592 // GFX9: s_buffer_atomic_umin s5, s[4:7], s0 ; encoding: [0x42,0x01,0x14,0xc1,0x00,0x00,0x00,0x00]
593 // GFX1012: s_buffer_atomic_umin s5, s[4:7], s0 ; encoding: [0x42,0x01,0x14,0xf5,0x00,0x00,0x00,0x00]
501594 // NOSICIVI: error:
502595
503596 s_buffer_atomic_umin_x2 s[10:11], s[4:7], s0 glc
504597 // GFX9: s_buffer_atomic_umin_x2 s[10:11], s[4:7], s0 glc ; encoding: [0x82,0x02,0x95,0xc1,0x00,0x00,0x00,0x00]
598 // GFX1012: s_buffer_atomic_umin_x2 s[10:11], s[4:7], s0 glc ; encoding: [0x82,0x02,0x95,0xf5,0x00,0x00,0x00,0x00]
505599 // NOSICIVI: error:
506600
507601 s_buffer_atomic_xor s5, s[4:7], s0
508602 // GFX9: s_buffer_atomic_xor s5, s[4:7], s0 ; encoding: [0x42,0x01,0x28,0xc1,0x00,0x00,0x00,0x00]
603 // GFX1012: s_buffer_atomic_xor s5, s[4:7], s0 ; encoding: [0x42,0x01,0x28,0xf5,0x00,0x00,0x00,0x00]
509604 // NOSICIVI: error:
510605
511606 s_buffer_atomic_xor_x2 s[10:11], s[4:7], s0 glc
512607 // GFX9: s_buffer_atomic_xor_x2 s[10:11], s[4:7], s0 glc ; encoding: [0x82,0x02,0xa9,0xc1,0x00,0x00,0x00,0x00]
513 // NOSICIVI: error:
608 // GFX1012: s_buffer_atomic_xor_x2 s[10:11], s[4:7], s0 glc ; encoding: [0x82,0x02,0xa9,0xf5,0x00,0x00,0x00,0x00]
609 // NOSICIVI: error:
0 // RUN: llvm-mc -arch=amdgcn -mcpu=gfx1011 -show-encoding %s | FileCheck %s
1 // RUN: llvm-mc -arch=amdgcn -mcpu=gfx1012 -show-encoding %s | FileCheck %s
2
3 v_dot2c_f32_f16_e32 v5, v1, v2
4 // CHECK: encoding: [0x01,0x05,0x0a,0x04]
5
6 v_dot2c_f32_f16_e32 v255, v1, v2
7 // CHECK: encoding: [0x01,0x05,0xfe,0x05]
8
9 v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10 // CHECK: encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x00]
11
12 v_dot2c_f32_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
13 // CHECK: encoding: [0xfa,0x04,0xfe,0x05,0x01,0xe4,0x00,0x00]
14
15 v_dot2c_f32_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
16 // CHECK: encoding: [0xfa,0x04,0x0a,0x04,0xff,0xe4,0x00,0x00]
17
18 v_dot2c_f32_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
19 // CHECK: encoding: [0xfa,0xfe,0x0b,0x04,0x01,0xe4,0x00,0x00]
20
21 v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
22 // CHECK: encoding: [0xfa,0x04,0x0a,0x04,0x01,0x1b,0x00,0x00]
23
24 v_dot2c_f32_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
25 // CHECK: encoding: [0xfa,0x04,0x0a,0x04,0x01,0x40,0x01,0x00]
26
27 v_dot2c_f32_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
28 // CHECK: encoding: [0xfa,0x04,0x0a,0x04,0x01,0x41,0x01,0x00]
29
30 v_dot2c_f32_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
31 // CHECK: encoding: [0xfa,0x04,0x0a,0x04,0x01,0x01,0x01,0x00]
32
33 v_dot2c_f32_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
34 // CHECK: encoding: [0xfa,0x04,0x0a,0x04,0x01,0x0f,0x01,0x00]
35
36 v_dot2c_f32_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
37 // CHECK: encoding: [0xfa,0x04,0x0a,0x04,0x01,0x11,0x01,0x00]
38
39 v_dot2c_f32_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
40 // CHECK: encoding: [0xfa,0x04,0x0a,0x04,0x01,0x1f,0x01,0x00]
41
42 v_dot2c_f32_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
43 // CHECK: encoding: [0xfa,0x04,0x0a,0x04,0x01,0x21,0x01,0x00]
44
45 v_dot2c_f32_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
46 // CHECK: encoding: [0xfa,0x04,0x0a,0x04,0x01,0x2f,0x01,0x00]
47
48 v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
49 // CHECK: encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x10]
50
51 v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
52 // CHECK: encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x30]
53
54 v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
55 // CHECK: encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0xf0]
56
57 v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
58 // CHECK: encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0xf0]
59
60 v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
61 // CHECK: encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x01]
62
63 v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
64 // CHECK: encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x03]
65
66 v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
67 // CHECK: encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x0f]
68
69 v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
70 // CHECK: encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x0f]
71
72 v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
73 // CHECK: encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x08,0x00]
74
75 v_dot2c_f32_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
76 // CHECK: encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x10,0x00]
77
78 v_dot2c_f32_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
79 // CHECK: encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x20,0x00]
80
81 v_dot2c_f32_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
82 // CHECK: encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x40,0x00]
83
84 v_dot2c_f32_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
85 // CHECK: encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x80,0x00]
86
87 v_dot4c_i32_i8_e32 v5, v1, v2
88 // CHECK: encoding: [0x01,0x05,0x0a,0x1a]
89
90 v_dot4c_i32_i8_e32 v255, v1, v2
91 // CHECK: encoding: [0x01,0x05,0xfe,0x1b]
92
93 v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
94 // CHECK: encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x00]
95
96 v_dot4c_i32_i8_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
97 // CHECK: encoding: [0xfa,0x04,0xfe,0x1b,0x01,0xe4,0x00,0x00]
98
99 v_dot4c_i32_i8_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
100 // CHECK: encoding: [0xfa,0x04,0x0a,0x1a,0xff,0xe4,0x00,0x00]
101
102 v_dot4c_i32_i8_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
103 // CHECK: encoding: [0xfa,0xfe,0x0b,0x1a,0x01,0xe4,0x00,0x00]
104
105 v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
106 // CHECK: encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x1b,0x00,0x00]
107
108 v_dot4c_i32_i8_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
109 // CHECK: encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x40,0x01,0x00]
110
111 v_dot4c_i32_i8_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
112 // CHECK: encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x41,0x01,0x00]
113
114 v_dot4c_i32_i8_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
115 // CHECK: encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x01,0x01,0x00]
116
117 v_dot4c_i32_i8_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
118 // CHECK: encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x0f,0x01,0x00]
119
120 v_dot4c_i32_i8_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
121 // CHECK: encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x11,0x01,0x00]
122
123 v_dot4c_i32_i8_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
124 // CHECK: encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x1f,0x01,0x00]
125
126 v_dot4c_i32_i8_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
127 // CHECK: encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x21,0x01,0x00]
128
129 v_dot4c_i32_i8_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
130 // CHECK: encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x2f,0x01,0x00]
131
132 v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
133 // CHECK: encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x10]
134
135 v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
136 // CHECK: encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x30]
137
138 v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
139 // CHECK: encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0xf0]
140
141 v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
142 // CHECK: encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0xf0]
143
144 v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
145 // CHECK: encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x01]
146
147 v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
148 // CHECK: encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x03]
149
150 v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
151 // CHECK: encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x0f]
152
153 v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
154 // CHECK: encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x0f]
155
156 v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
157 // CHECK: encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x08,0x00]
0 # RUN: llvm-mc -arch=amdgcn -mcpu=gfx1011 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
1 # RUN: llvm-mc -arch=amdgcn -mcpu=gfx1012 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
2
3 # GFX10: v_dot2_f32_f16 v0, v1, v2, v3 ; encoding: [0x00,0x40,0x13,0xcc,0x01,0x05,0x0e,0x1c]
4 0x00,0x40,0x13,0xcc,0x01,0x05,0x0e,0x1c
5
6 # GFX10: v_dot2_i32_i16 v0, v1, v2, v3 ; encoding: [0x00,0x40,0x14,0xcc,0x01,0x05,0x0e,0x1c]
7 0x00,0x40,0x14,0xcc,0x01,0x05,0x0e,0x1c
8
9 # GFX10: v_dot2_u32_u16 v0, v1, v2, v3 ; encoding: [0x00,0x40,0x15,0xcc,0x01,0x05,0x0e,0x1c]
10 0x00,0x40,0x15,0xcc,0x01,0x05,0x0e,0x1c
11
12 # GFX10: v_dot4_i32_i8 v0, v1, v2, v3 ; encoding: [0x00,0x40,0x16,0xcc,0x01,0x05,0x0e,0x1c]
13 0x00,0x40,0x16,0xcc,0x01,0x05,0x0e,0x1c
14
15 # GFX10: v_dot4_u32_u8 v0, v1, v2, v3 ; encoding: [0x00,0x40,0x17,0xcc,0x01,0x05,0x0e,0x1c]
16 0x00,0x40,0x17,0xcc,0x01,0x05,0x0e,0x1c
17
18 # GFX10: v_dot8_i32_i4 v0, v1, v2, v3 ; encoding: [0x00,0x40,0x18,0xcc,0x01,0x05,0x0e,0x1c]
19 0x00,0x40,0x18,0xcc,0x01,0x05,0x0e,0x1c
20
21 # GFX10: v_dot8_u32_u4 v0, v1, v2, v3 ; encoding: [0x00,0x40,0x19,0xcc,0x01,0x05,0x0e,0x1c]
22 0x00,0x40,0x19,0xcc,0x01,0x05,0x0e,0x1c
23
24 # GFX10: v_dot2c_f32_f16_e32 v5, v1, v2
25 0x01,0x05,0x0a,0x04
26
27 # GFX10: v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
28 0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x00
29
30 # GFX10: v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 fi:1
31 0xfa,0x04,0x0a,0x04,0x01,0xe4,0x04,0x00
32
33 # GFX10: v_dot2c_f32_f16_dpp v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
34 0xe9,0x04,0x0a,0x04,0x01,0x77,0x39,0x05
35
36 # GFX10: v_dot2c_f32_f16_dpp v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
37 0xea,0x04,0x0a,0x04,0x01,0x77,0x39,0x05
38
39 # GFX10: v_dot4c_i32_i8_e32 v5, v1, v2
40 0x01,0x05,0x0a,0x1a
41
42 # GFX10: v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
43 0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x00
44
45 # GFX10: v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 fi:1
46 0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x04,0x00
47
48 # GFX10: v_dot4c_i32_i8_dpp v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
49 0xe9,0x04,0x0a,0x1a,0x01,0x77,0x39,0x05
50
51 # GFX10: v_dot4c_i32_i8_dpp v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
52 0xea,0x04,0x0a,0x1a,0x01,0x77,0x39,0x05
0 # RUN: llvm-mc -arch=amdgcn -mcpu=gfx1011 -disassemble -show-encoding < %s | FileCheck %s
1 # RUN: llvm-mc -arch=amdgcn -mcpu=gfx1012 -disassemble -show-encoding < %s | FileCheck %s
2
3 # CHECK: v_dot2c_f32_f16_e32 v5, v1, v2 ; encoding: [0x01,0x05,0x0a,0x04]
4 0x01,0x05,0x0a,0x04
5
6 # CHECK: v_dot2c_f32_f16_e32 v255, v1, v2 ; encoding: [0x01,0x05,0xfe,0x05]
7 0x01,0x05,0xfe,0x05
8
9 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x00]
10 0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x00
11
12 # CHECK: v_dot2c_f32_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x05,0x01,0xe4,0x00,0x00]
13 0xfa,0x04,0xfe,0x05,0x01,0xe4,0x00,0x00
14
15 # CHECK: v_dot2c_f32_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0xff,0xe4,0x00,0x00]
16 0xfa,0x04,0x0a,0x04,0xff,0xe4,0x00,0x00
17
18 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x04,0x01,0xe4,0x00,0x00]
19 0xfa,0xfe,0x0b,0x04,0x01,0xe4,0x00,0x00
20
21 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x1b,0x00,0x00]
22 0xfa,0x04,0x0a,0x04,0x01,0x1b,0x00,0x00
23
24 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x40,0x01,0x00]
25 0xfa,0x04,0x0a,0x04,0x01,0x40,0x01,0x00
26
27 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x41,0x01,0x00]
28 0xfa,0x04,0x0a,0x04,0x01,0x41,0x01,0x00
29
30 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x01,0x01,0x00]
31 0xfa,0x04,0x0a,0x04,0x01,0x01,0x01,0x00
32
33 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x0f,0x01,0x00]
34 0xfa,0x04,0x0a,0x04,0x01,0x0f,0x01,0x00
35
36 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x11,0x01,0x00]
37 0xfa,0x04,0x0a,0x04,0x01,0x11,0x01,0x00
38
39 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x1f,0x01,0x00]
40 0xfa,0x04,0x0a,0x04,0x01,0x1f,0x01,0x00
41
42 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x21,0x01,0x00]
43 0xfa,0x04,0x0a,0x04,0x01,0x21,0x01,0x00
44
45 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x2f,0x01,0x00]
46 0xfa,0x04,0x0a,0x04,0x01,0x2f,0x01,0x00
47
48 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x10]
49 0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x10
50
51 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x30]
52 0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x30
53
54 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0xf0]
55 0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0xf0
56
57 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0xf0]
58 0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0xf0
59
60 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x01]
61 0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x01
62
63 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x03]
64 0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x03
65
66 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x0f]
67 0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x0f
68
69 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x0f]
70 0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x0f
71
72 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x08,0x00]
73 0xfa,0x04,0x0a,0x04,0x01,0xe4,0x08,0x00
74
75 # CHECK: v_dot2c_f32_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x10,0x00]
76 0xfa,0x04,0x0a,0x04,0x01,0xe4,0x10,0x00
77
78 # CHECK: v_dot2c_f32_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x20,0x00]
79 0xfa,0x04,0x0a,0x04,0x01,0xe4,0x20,0x00
80
81 # CHECK: v_dot2c_f32_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x40,0x00]
82 0xfa,0x04,0x0a,0x04,0x01,0xe4,0x40,0x00
83
84 # CHECK: v_dot2c_f32_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x80,0x00]
85 0xfa,0x04,0x0a,0x04,0x01,0xe4,0x80,0x00
86
87 # CHECK: v_dot4c_i32_i8_e32 v5, v1, v2 ; encoding: [0x01,0x05,0x0a,0x1a]
88 0x01,0x05,0x0a,0x1a
89
90 # CHECK: v_dot4c_i32_i8_e32 v255, v1, v2 ; encoding: [0x01,0x05,0xfe,0x1b]
91 0x01,0x05,0xfe,0x1b
92
93 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x00]
94 0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x00
95
96 # CHECK: v_dot4c_i32_i8_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x1b,0x01,0xe4,0x00,0x00]
97 0xfa,0x04,0xfe,0x1b,0x01,0xe4,0x00,0x00
98
99 # CHECK: v_dot4c_i32_i8_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0xff,0xe4,0x00,0x00]
100 0xfa,0x04,0x0a,0x1a,0xff,0xe4,0x00,0x00
101
102 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x1a,0x01,0xe4,0x00,0x00]
103 0xfa,0xfe,0x0b,0x1a,0x01,0xe4,0x00,0x00
104
105 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x1b,0x00,0x00]
106 0xfa,0x04,0x0a,0x1a,0x01,0x1b,0x00,0x00
107
108 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x40,0x01,0x00]
109 0xfa,0x04,0x0a,0x1a,0x01,0x40,0x01,0x00
110
111 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x41,0x01,0x00]
112 0xfa,0x04,0x0a,0x1a,0x01,0x41,0x01,0x00
113
114 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x01,0x01,0x00]
115 0xfa,0x04,0x0a,0x1a,0x01,0x01,0x01,0x00
116
117 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x0f,0x01,0x00]
118 0xfa,0x04,0x0a,0x1a,0x01,0x0f,0x01,0x00
119
120 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x11,0x01,0x00]
121 0xfa,0x04,0x0a,0x1a,0x01,0x11,0x01,0x00
122
123 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x1f,0x01,0x00]
124 0xfa,0x04,0x0a,0x1a,0x01,0x1f,0x01,0x00
125
126 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x21,0x01,0x00]
127 0xfa,0x04,0x0a,0x1a,0x01,0x21,0x01,0x00
128
129 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x2f,0x01,0x00]
130 0xfa,0x04,0x0a,0x1a,0x01,0x2f,0x01,0x00
131
132 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x10]
133 0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x10
134
135 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x30]
136 0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x30
137
138 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0xf0]
139 0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0xf0
140
141 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0xf0]
142 0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0xf0
143
144 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x01]
145 0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x01
146
147 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x03]
148 0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x03
149
150 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x0f]
151 0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x0f
152
153 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x0f]
154 0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x0f
155
156 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x08,0x00]
157 0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x08,0x00
12961296 LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX906),
12971297 LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX909),
12981298 LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1010),
1299 LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1011),
1300 LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1012),
12991301 LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_XNACK),
13001302 LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_SRAM_ECC)
13011303 };