llvm.org GIT mirror llvm / ea1d9cd
Now that I am told MachineRegisterInfo also tracks physical register uses / defs, I can do away with the horribleness I introduced a while back. It's impossible to detect if there is any use of a physical register below an instruction (and before any def of the register) with some cheap book keeping. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49105 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 12 years ago
2 changed file(s) with 74 addition(s) and 26 deletion(s). Raw diff Collapse all Expand all
3030
3131 #include "llvm/CodeGen/MachineFunctionPass.h"
3232 #include "llvm/ADT/BitVector.h"
33 #include "llvm/ADT/DenseMap.h"
3334 #include "llvm/ADT/SmallSet.h"
3435 #include "llvm/ADT/SmallVector.h"
3536
3637 namespace llvm {
3738
39 class MachineRegisterInfo;
3840 class TargetRegisterInfo;
3941
4042 class LiveVariables : public MachineFunctionPass {
127129 private: // Intermediate data structures
128130 MachineFunction *MF;
129131
132 MachineRegisterInfo* MRI;
133
130134 const TargetRegisterInfo *TRI;
131135
132136 // PhysRegInfo - Keep track of which instruction was the last def/use of a
150154 SmallVector *PhysRegPartDef;
151155
152156 SmallVector *PHIVarInfo;
157
158 // DistanceMap - Keep track the distance of a MI from the start of the
159 // current basic block.
160 DenseMap DistanceMap;
153161
154162 void addRegisterKills(unsigned Reg, MachineInstr *MI,
155163 SmallSet &SubKills);
117117
118118 void LiveVariables::HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB,
119119 MachineInstr *MI) {
120 const MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo();
121 assert(MRI.getVRegDef(reg) && "Register use before def!");
120 assert(MRI->getVRegDef(reg) && "Register use before def!");
122121
123122 unsigned BBNum = MBB->getNumber();
124123
139138 assert(VRInfo.Kills[i]->getParent() != MBB && "entry should be at end!");
140139 #endif
141140
142 assert(MBB != MRI.getVRegDef(reg)->getParent() &&
141 assert(MBB != MRI->getVRegDef(reg)->getParent() &&
143142 "Should have kill for defblock!");
144143
145144 // Add a new kill entry for this basic block. If this virtual register is
151150 // Update all dominating blocks to mark them as "known live".
152151 for (MachineBasicBlock::const_pred_iterator PI = MBB->pred_begin(),
153152 E = MBB->pred_end(); PI != E; ++PI)
154 MarkVirtRegAliveInBlock(VRInfo, MRI.getVRegDef(reg)->getParent(), *PI);
153 MarkVirtRegAliveInBlock(VRInfo, MRI->getVRegDef(reg)->getParent(), *PI);
155154 }
156155
157156 /// HandlePhysRegUse - Turn previous partial def's into read/mod/writes. Add
304303 MachineBasicBlock *MBB) {
305304 if (I == MBB->end())
306305 return false;
307 ++I;
308 // FIXME: This is slow. We probably need a smarter solution. Possibilities:
309 // 1. Scan all instructions once and build def / use information of physical
310 // registers. We also need a fast way to compare relative ordering of
311 // instructions.
312 // 2. Cache information so this function only has to scan instructions that
313 // read / def physical instructions.
314 for (MachineBasicBlock::iterator E = MBB->end(); I != E; ++I) {
315 MachineInstr *MI = I;
316 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
317 const MachineOperand &MO = MI->getOperand(i);
318 if (!MO.isRegister() || MO.getReg() != Reg)
319 continue;
320 if (MO.isDef())
321 return false;
322 return true;
323 }
324 }
325 return false;
306
307 // First find out if there are any uses / defs below.
308 bool hasDistInfo = true;
309 unsigned CurDist = DistanceMap[I];
310 SmallVector Uses;
311 SmallVector Defs;
312 for (MachineRegisterInfo::reg_iterator RI = MRI->reg_begin(Reg),
313 RE = MRI->reg_end(); RI != RE; ++RI) {
314 MachineOperand &UDO = RI.getOperand();
315 MachineInstr *UDMI = &*RI;
316 if (UDMI->getParent() != MBB)
317 continue;
318 DenseMap::iterator DI = DistanceMap.find(UDMI);
319 bool isBelow = false;
320 if (DI == DistanceMap.end()) {
321 // Must be below if it hasn't been assigned a distance yet.
322 isBelow = true;
323 hasDistInfo = false;
324 } else if (DI->second > CurDist)
325 isBelow = true;
326 if (isBelow) {
327 if (UDO.isUse())
328 Uses.push_back(UDMI);
329 if (UDO.isDef())
330 Defs.push_back(UDMI);
331 }
332 }
333
334 if (Uses.empty())
335 // No uses below.
336 return false;
337 else if (!Uses.empty() && Defs.empty())
338 // There are uses below but no defs below.
339 return true;
340 // There are both uses and defs below. We need to know which comes first.
341 if (!hasDistInfo) {
342 // Complete DistanceMap for this MBB. This information is computed only
343 // once per MBB.
344 ++I;
345 ++CurDist;
346 for (MachineBasicBlock::iterator E = MBB->end(); I != E; ++I, ++CurDist)
347 DistanceMap.insert(std::make_pair(I, CurDist));
348 }
349
350 unsigned EarliestUse = CurDist;
351 for (unsigned i = 0, e = Uses.size(); i != e; ++i) {
352 unsigned Dist = DistanceMap[Uses[i]];
353 if (Dist < EarliestUse)
354 EarliestUse = Dist;
355 }
356 for (unsigned i = 0, e = Defs.size(); i != e; ++i) {
357 unsigned Dist = DistanceMap[Defs[i]];
358 if (Dist < EarliestUse)
359 // The register is defined before its first use below.
360 return false;
361 }
362 return true;
326363 }
327364
328365 void LiveVariables::HandlePhysRegDef(unsigned Reg, MachineInstr *MI) {
407444
408445 bool LiveVariables::runOnMachineFunction(MachineFunction &mf) {
409446 MF = &mf;
447 MRI = &mf.getRegInfo();
410448 TRI = MF->getTarget().getRegisterInfo();
411 MachineRegisterInfo& MRI = mf.getRegInfo();
412449
413450 ReservedRegisters = TRI->getReservedRegs(mf);
414451
448485 }
449486
450487 // Loop over all of the instructions, processing them.
488 DistanceMap.clear();
489 unsigned Dist = 0;
451490 for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
452491 I != E; ++I) {
453492 MachineInstr *MI = I;
493 DistanceMap.insert(std::make_pair(MI, Dist++));
454494
455495 // Process all of the operands of the instruction...
456496 unsigned NumOperandsToProcess = MI->getNumOperands();
506546 for (SmallVector::iterator I = VarInfoVec.begin(),
507547 E = VarInfoVec.end(); I != E; ++I)
508548 // Mark it alive only in the block we are representing.
509 MarkVirtRegAliveInBlock(getVarInfo(*I), MRI.getVRegDef(*I)->getParent(),
549 MarkVirtRegAliveInBlock(getVarInfo(*I),MRI->getVRegDef(*I)->getParent(),
510550 MBB);
511551 }
512552
548588 for (unsigned i = 0, e1 = VirtRegInfo.size(); i != e1; ++i)
549589 for (unsigned j = 0, e2 = VirtRegInfo[i].Kills.size(); j != e2; ++j)
550590 if (VirtRegInfo[i].Kills[j] ==
551 MRI.getVRegDef(i + TargetRegisterInfo::FirstVirtualRegister))
591 MRI->getVRegDef(i + TargetRegisterInfo::FirstVirtualRegister))
552592 VirtRegInfo[i]
553593 .Kills[j]->addRegisterDead(i +
554594 TargetRegisterInfo::FirstVirtualRegister,