llvm.org GIT mirror llvm / e96f501
Data structure change to improve compile time (especially in debug mode). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36447 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 13 years ago
2 changed file(s) with 36 addition(s) and 29 deletion(s). Raw diff Collapse all Expand all
3030
3131 #include "llvm/CodeGen/MachineFunctionPass.h"
3232 #include "llvm/ADT/BitVector.h"
33 #include "llvm/ADT/SmallVector.h"
3334 #include
3435
3536 namespace llvm {
3637
3738 class MRegisterInfo;
38 class BitVector;
3939
4040 class LiveVariables : public MachineFunctionPass {
4141 public:
126126 // PhysRegInfo - Keep track of which instruction was the last def/use of a
127127 // physical register. This is a purely local property, because all physical
128128 // register references as presumed dead across basic blocks.
129 std::vector PhysRegInfo;
129 MachineInstr **PhysRegInfo;
130130
131131 // PhysRegUsed - Keep track whether the physical register has been used after
132132 // its last definition. This is local property.
133 BitVector PhysRegUsed;
133 bool *PhysRegUsed;
134
135 // PhysRegPartUse - Keep track of which instruction was the last partial use
136 // of a physical register (e.g. on X86 a def of EAX followed by a use of AX).
137 // This is a purely local property.
138 MachineInstr **PhysRegPartUse;
134139
135140 // PhysRegPartDef - Keep track of a list of instructions which "partially"
136141 // defined the physical register (e.g. on X86 AX partially defines EAX).
137142 // These are turned into use/mod/write if there is a use of the register
138143 // later in the same block. This is local property.
139 std::vector > PhysRegPartDef;
140
141 // PhysRegPartUse - Keep track of which instruction was the last partial use
142 // of a physical register (e.g. on X86 a def of EAX followed by a use of AX).
143 // This is a purely local property.
144 std::vector PhysRegPartUse;
145
146 typedef std::map
147 std::vector > PHIVarInfoMap;
148
149 PHIVarInfoMap PHIVarInfo;
150
144 SmallVector *PhysRegPartDef;
145
146 SmallVector *PHIVarInfo;
151147
152148 /// addRegisterKilled - We have determined MI kills a register. Look for the
153149 /// operand that uses it and mark it as IsKill.
320320
321321 ReservedRegisters = RegInfo->getReservedRegs(mf);
322322
323 PhysRegInfo.resize(RegInfo->getNumRegs(), (MachineInstr*)NULL);
324 PhysRegUsed.resize(RegInfo->getNumRegs());
325 PhysRegPartDef.resize(RegInfo->getNumRegs());
326 PhysRegPartUse.resize(RegInfo->getNumRegs(), (MachineInstr*)NULL);
323 unsigned NumRegs = RegInfo->getNumRegs();
324 PhysRegInfo = new MachineInstr*[NumRegs];
325 PhysRegUsed = new bool[NumRegs];
326 PhysRegPartUse = new MachineInstr*[NumRegs];
327 PhysRegPartDef = new SmallVector[NumRegs];
328 PHIVarInfo = new SmallVector[MF->getNumBlockIDs()];
329 std::fill(PhysRegInfo, PhysRegInfo + NumRegs, (MachineInstr*)0);
330 std::fill(PhysRegUsed, PhysRegUsed + NumRegs, false);
331 std::fill(PhysRegPartUse, PhysRegPartUse + NumRegs, (MachineInstr*)0);
327332
328333 /// Get some space for a respectable number of registers...
329334 VirtRegInfo.resize(64);
398403 // bottom of this basic block. We check all of our successor blocks to see
399404 // if they have PHI nodes, and if so, we simulate an assignment at the end
400405 // of the current block.
401 if (!PHIVarInfo[MBB].empty()) {
402 std::vector& VarInfoVec = PHIVarInfo[MBB];
403
404 for (std::vector::iterator I = VarInfoVec.begin(),
406 if (!PHIVarInfo[MBB->getNumber()].empty()) {
407 SmallVector& VarInfoVec = PHIVarInfo[MBB->getNumber()];
408
409 for (SmallVector::iterator I = VarInfoVec.begin(),
405410 E = VarInfoVec.end(); I != E; ++I) {
406411 VarInfo& VRInfo = getVarInfo(*I);
407412 assert(VRInfo.DefInst && "Register use before def (or no def)!");
427432
428433 // Loop over PhysRegInfo, killing any registers that are available at the
429434 // end of the basic block. This also resets the PhysRegInfo map.
430 for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i)
435 for (unsigned i = 0; i != NumRegs; ++i)
431436 if (PhysRegInfo[i])
432437 HandlePhysRegDef(i, 0);
433438
434439 // Clear some states between BB's. These are purely local information.
435 for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i) {
440 for (unsigned i = 0; i != NumRegs; ++i) {
436441 PhysRegPartDef[i].clear();
437 PhysRegPartUse[i] = NULL;
438 }
442 //PhysRegPartUse[i] = NULL;
443 }
444 std::fill(PhysRegPartUse, PhysRegPartUse + NumRegs, (MachineInstr*)0);
439445 }
440446
441447 // Convert and transfer the dead / killed information we have gathered into
459465 assert(Visited.count(&*i) != 0 && "unreachable basic block found");
460466 #endif
461467
462 PHIVarInfo.clear();
468 delete[] PhysRegInfo;
469 delete[] PhysRegUsed;
470 delete[] PhysRegPartUse;
471 delete[] PhysRegPartDef;
472 delete[] PHIVarInfo;
473
463474 return false;
464475 }
465476
542553 for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end();
543554 BBI != BBE && BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI)
544555 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2)
545 PHIVarInfo[BBI->getOperand(i + 1).getMachineBasicBlock()].
556 PHIVarInfo[BBI->getOperand(i + 1).getMachineBasicBlock()->getNumber()].
546557 push_back(BBI->getOperand(i).getReg());
547558 }