llvm.org GIT mirror llvm / e90a3bc
[mips] Custom-lower ISD::FRAME_TO_ARGS_OFFSET node. Patch by Sasa Stankovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167548 91177308-0d34-0410-b5e6-96231b3b80d8 Akira Hatanaka 7 years ago
3 changed file(s) with 90 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
246246 setOperationAction(ISD::SRL_PARTS, MVT::i32, Custom);
247247 }
248248
249 setOperationAction(ISD::ADD, MVT::i32, Custom);
250 if (HasMips64)
251 setOperationAction(ISD::ADD, MVT::i64, Custom);
252
249253 setOperationAction(ISD::SDIV, MVT::i32, Expand);
250254 setOperationAction(ISD::SREM, MVT::i32, Expand);
251255 setOperationAction(ISD::UDIV, MVT::i32, Expand);
913917 case ISD::STORE: return LowerSTORE(Op, DAG);
914918 case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG);
915919 case ISD::INTRINSIC_W_CHAIN: return LowerINTRINSIC_W_CHAIN(Op, DAG);
920 case ISD::ADD: return LowerADD(Op, DAG);
916921 }
917922 return SDValue();
918923 }
25382543 case Intrinsic::mips_dpsqx_sa_w_ph:
25392544 return LowerDSPIntr(Op, DAG, MipsISD::DPSQX_SA_W_PH, true, true);
25402545 }
2546 }
2547
2548 SDValue MipsTargetLowering::LowerADD(SDValue Op, SelectionDAG &DAG) const {
2549 if (Op->getOperand(0).getOpcode() != ISD::FRAMEADDR
2550 || cast
2551 (Op->getOperand(0).getOperand(0))->getZExtValue() != 0
2552 || Op->getOperand(1).getOpcode() != ISD::FRAME_TO_ARGS_OFFSET)
2553 return SDValue();
2554
2555 // The pattern
2556 // (add (frameaddr 0), (frame_to_args_offset))
2557 // results from lowering llvm.eh.dwarf.cfa intrinsic. Transform it to
2558 // (add FrameObject, 0)
2559 // where FrameObject is a fixed StackObject with offset 0 which points to
2560 // the old stack pointer.
2561 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
2562 EVT ValTy = Op->getValueType(0);
2563 int FI = MFI->CreateFixedObject(Op.getValueSizeInBits() / 8, 0, false);
2564 SDValue InArgsAddr = DAG.getFrameIndex(FI, ValTy);
2565 return DAG.getNode(ISD::ADD, Op->getDebugLoc(), ValTy, InArgsAddr,
2566 DAG.getConstant(0, ValTy));
25412567 }
25422568
25432569 //===----------------------------------------------------------------------===//
271271 SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const;
272272 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
273273 SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG) const;
274 SDValue LowerADD(SDValue Op, SelectionDAG &DAG) const;
274275
275276 /// IsEligibleForTailCallOptimization - Check whether the call is eligible
276277 /// for tail call optimization.
0 ; RUN: llc -march=mipsel -mcpu=mips32 < %s | FileCheck %s
1 ; RUN: llc -march=mips64el -mcpu=mips64 < %s | \
2 ; RUN: FileCheck %s -check-prefix=CHECK-MIPS64
3
4 declare i8* @llvm.eh.dwarf.cfa(i32) nounwind
5 declare i8* @llvm.frameaddress(i32) nounwind readnone
6
7 define i8* @f1() nounwind {
8 entry:
9 %x = alloca [32 x i8], align 1
10 %0 = call i8* @llvm.eh.dwarf.cfa(i32 0)
11 ret i8* %0
12
13 ; CHECK: addiu $sp, $sp, -32
14 ; CHECK: addiu $2, $sp, 32
15 }
16
17
18 define i8* @f2() nounwind {
19 entry:
20 %x = alloca [65536 x i8], align 1
21 %0 = call i8* @llvm.eh.dwarf.cfa(i32 0)
22 ret i8* %0
23
24 ; check stack size (65536 + 8)
25 ; CHECK: lui $[[R0:[a-z0-9]+]], 65535
26 ; CHECK: addiu $[[R0]], $[[R0]], -8
27 ; CHECK: addu $sp, $sp, $[[R0]]
28
29 ; check return value ($sp + stack size)
30 ; CHECK: lui $[[R1:[a-z0-9]+]], 1
31 ; CHECK: addu $[[R1]], $sp, $[[R1]]
32 ; CHECK: addiu $2, $[[R1]], 8
33 }
34
35
36 define i32 @f3() nounwind {
37 entry:
38 %x = alloca [32 x i8], align 1
39 %0 = call i8* @llvm.eh.dwarf.cfa(i32 0)
40 %1 = ptrtoint i8* %0 to i32
41 %2 = call i8* @llvm.frameaddress(i32 0)
42 %3 = ptrtoint i8* %2 to i32
43 %add = add i32 %1, %3
44 ret i32 %add
45
46 ; CHECK: addiu $sp, $sp, -40
47
48 ; check return value ($fp + stack size + $fp)
49 ; CHECK: addiu $[[R0:[a-z0-9]+]], $fp, 40
50 ; CHECK: addu $2, $[[R0]], $fp
51 }
52
53
54 define i8* @f4() nounwind {
55 entry:
56 %x = alloca [32 x i8], align 1
57 %0 = call i8* @llvm.eh.dwarf.cfa(i32 0)
58 ret i8* %0
59
60 ; CHECK-MIPS64: daddiu $sp, $sp, -32
61 ; CHECK-MIPS64: daddiu $2, $sp, 32
62 }