llvm.org GIT mirror llvm / e8660ea
[globalisel][tablegen] Import SelectionDAG's rule predicates and support the equivalent in GIRule. Summary: The SelectionDAG importer now imports rules with Predicate's attached via Requires, PredicateControl, etc. These predicates are implemented as bitset's to allow multiple predicates to be tested together. However, unlike the MC layer subtarget features, each target only pays for it's own predicates (e.g. AArch64 doesn't have 192 feature bits just because X86 needs a lot). Both AArch64 and X86 derive at least one predicate from the MachineFunction or Function so they must re-initialize AvailableFeatures before each function. They also declare locals in <Target>InstructionSelector so that computeAvailableFeatures() can use the code from SelectionDAG without modification. Reviewers: rovka, qcolombet, aditya_nandakumar, t.p.northover, ab Reviewed By: rovka Subscribers: aemerson, rengolin, dberris, kristof.beyls, llvm-commits, igorb Differential Revision: https://reviews.llvm.org/D31418 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300993 91177308-0d34-0410-b5e6-96231b3b80d8 Daniel Sanders 3 years ago
12 changed file(s) with 258 addition(s) and 40 deletion(s). Raw diff Collapse all Expand all
1717
1818 #include "llvm/ADT/Optional.h"
1919 #include
20 #include
2021
2122 namespace llvm {
2223 class MachineInstr;
24 class MachineFunction;
2325 class MachineOperand;
2426 class MachineRegisterInfo;
2527 class RegisterBankInfo;
2628 class TargetInstrInfo;
2729 class TargetRegisterInfo;
2830
31 /// Container class for CodeGen predicate results.
32 /// This is convenient because std::bitset does not have a constructor
33 /// with an initializer list of set bits.
34 ///
35 /// Each InstructionSelector subclass should define a PredicateBitset class with:
36 /// const unsigned MAX_SUBTARGET_PREDICATES = 192;
37 /// using PredicateBitset = PredicateBitsetImpl;
38 /// and updating the constant to suit the target. Tablegen provides a suitable
39 /// definition for the predicates in use in GenGlobalISel.inc when
40 /// GET_GLOBALISEL_PREDICATE_BITSET is defined.
41 template
42 class PredicateBitsetImpl : public std::bitset {
43 public:
44 // Cannot inherit constructors because it's not supported by VC++..
45 PredicateBitsetImpl() = default;
46
47 PredicateBitsetImpl(const std::bitset &B)
48 : std::bitset(B) {}
49
50 PredicateBitsetImpl(std::initializer_list Init) {
51 for (auto I : Init)
52 std::bitset::set(I);
53 }
54 };
55
2956 /// Provides the logic to select generic machine instructions.
3057 class InstructionSelector {
3158 public:
3259 virtual ~InstructionSelector() {}
60
61 /// This is executed before selecting a function.
62 virtual void beginFunction(const MachineFunction &MF) {}
3363
3464 /// Select the (possibly generic) instruction \p I to only use target-specific
3565 /// opcodes. It is OK to insert multiple instructions, but they cannot be
4040
4141 namespace {
4242
43 #define GET_GLOBALISEL_PREDICATE_BITSET
44 #include "AArch64GenGlobalISel.inc"
45 #undef GET_GLOBALISEL_PREDICATE_BITSET
46
4347 class AArch64InstructionSelector : public InstructionSelector {
4448 public:
4549 AArch64InstructionSelector(const AArch64TargetMachine &TM,
4650 const AArch64Subtarget &STI,
4751 const AArch64RegisterBankInfo &RBI);
4852
53 void beginFunction(const MachineFunction &MF) override;
4954 bool select(MachineInstr &I) const override;
5055
5156 private:
6974 const AArch64InstrInfo &TII;
7075 const AArch64RegisterInfo &TRI;
7176 const AArch64RegisterBankInfo &RBI;
77 bool ForCodeSize;
78
79 PredicateBitset AvailableFeatures;
80 PredicateBitset
81 computeAvailableFeatures(const MachineFunction *MF,
82 const AArch64Subtarget *Subtarget) const;
7283
7384 // We declare the temporaries used by selectImpl() in the class to minimize the
7485 // cost of constructing placeholder values.
8798 const AArch64TargetMachine &TM, const AArch64Subtarget &STI,
8899 const AArch64RegisterBankInfo &RBI)
89100 : InstructionSelector(), TM(TM), STI(STI), TII(*STI.getInstrInfo()),
90 TRI(*STI.getRegisterInfo()), RBI(RBI)
101 TRI(*STI.getRegisterInfo()), RBI(RBI), ForCodeSize(), AvailableFeatures()
91102 #define GET_GLOBALISEL_TEMPORARIES_INIT
92103 #include "AArch64GenGlobalISel.inc"
93104 #undef GET_GLOBALISEL_TEMPORARIES_INIT
566577 return true;
567578 }
568579
580 void AArch64InstructionSelector::beginFunction(
581 const MachineFunction &MF) {
582 ForCodeSize = MF.getFunction()->optForSize();
583 AvailableFeatures = computeAvailableFeatures(&MF, &STI);
584 }
585
569586 bool AArch64InstructionSelector::select(MachineInstr &I) const {
570587 assert(I.getParent() && "Instruction should be in a basic block!");
571588 assert(I.getParent()->getParent() && "Instruction should be in a function!");
9494 /// encoding when possible in order to reduce code size.
9595 FunctionPass *createX86EvexToVexInsts();
9696
97 InstructionSelector *createX86InstructionSelector(X86Subtarget &,
97 InstructionSelector *createX86InstructionSelector(const X86TargetMachine &TM,
98 X86Subtarget &,
9899 X86RegisterBankInfo &);
99100
100101 void initializeEvexToVexInstPassPass(PassRegistry &);
3838
3939 namespace {
4040
41 #define GET_GLOBALISEL_PREDICATE_BITSET
42 #include "X86GenGlobalISel.inc"
43 #undef GET_GLOBALISEL_PREDICATE_BITSET
44
4145 class X86InstructionSelector : public InstructionSelector {
4246 public:
43 X86InstructionSelector(const X86Subtarget &STI,
47 X86InstructionSelector(const X86TargetMachine &TM, const X86Subtarget &STI,
4448 const X86RegisterBankInfo &RBI);
4549
50 void beginFunction(const MachineFunction &MF) override;
4651 bool select(MachineInstr &I) const override;
4752
4853 private:
6974 bool selectTrunc(MachineInstr &I, MachineRegisterInfo &MRI,
7075 MachineFunction &MF) const;
7176
77 const X86TargetMachine &TM;
7278 const X86Subtarget &STI;
7379 const X86InstrInfo &TII;
7480 const X86RegisterInfo &TRI;
7581 const X86RegisterBankInfo &RBI;
82 bool OptForSize;
83 bool OptForMinSize;
84
85 PredicateBitset AvailableFeatures;
86 PredicateBitset computeAvailableFeatures(const MachineFunction *MF,
87 const X86Subtarget *Subtarget) const;
7688
7789 #define GET_GLOBALISEL_TEMPORARIES_DECL
7890 #include "X86GenGlobalISel.inc"
8597 #include "X86GenGlobalISel.inc"
8698 #undef GET_GLOBALISEL_IMPL
8799
88 X86InstructionSelector::X86InstructionSelector(const X86Subtarget &STI,
100 X86InstructionSelector::X86InstructionSelector(const X86TargetMachine &TM,
101 const X86Subtarget &STI,
89102 const X86RegisterBankInfo &RBI)
90 : InstructionSelector(), STI(STI), TII(*STI.getInstrInfo()),
91 TRI(*STI.getRegisterInfo()), RBI(RBI)
103 : InstructionSelector(), TM(TM), STI(STI), TII(*STI.getInstrInfo()),
104 TRI(*STI.getRegisterInfo()), RBI(RBI), OptForSize(false),
105 OptForMinSize(false), AvailableFeatures()
92106 #define GET_GLOBALISEL_TEMPORARIES_INIT
93107 #include "X86GenGlobalISel.inc"
94108 #undef GET_GLOBALISEL_TEMPORARIES_INIT
178192 }
179193 I.setDesc(TII.get(X86::COPY));
180194 return true;
195 }
196
197 void X86InstructionSelector::beginFunction(const MachineFunction &MF) {
198 OptForSize = MF.getFunction()->optForSize();
199 OptForMinSize = MF.getFunction()->optForMinSize();
200 AvailableFeatures = computeAvailableFeatures(&MF, &STI);
181201 }
182202
183203 bool X86InstructionSelector::select(MachineInstr &I) const {
570590 }
571591
572592 InstructionSelector *
573 llvm::createX86InstructionSelector(X86Subtarget &Subtarget,
593 llvm::createX86InstructionSelector(const X86TargetMachine &TM,
594 X86Subtarget &Subtarget,
574595 X86RegisterBankInfo &RBI) {
575 return new X86InstructionSelector(Subtarget, RBI);
576 }
596 return new X86InstructionSelector(TM, Subtarget, RBI);
597 }
285285
286286 auto *RBI = new X86RegisterBankInfo(*I->getRegisterInfo());
287287 GISel->RegBankInfo.reset(RBI);
288 GISel->InstSelector.reset(createX86InstructionSelector(*I, *RBI));
288 GISel->InstSelector.reset(createX86InstructionSelector(*this, *I, *RBI));
289289 #endif
290290 I->setGISelAccessor(*GISel);
291291 }
2828 def Z : OperandWithDefaultOps ;
2929 def m1Z : OperandWithDefaultOps ;
3030
31 //===- Test the function definition boilerplate. --------------------------===//
31 def HasA : Predicate<"Subtarget->hasA()">;
32 def HasB : Predicate<"Subtarget->hasB()">;
33
34 //===- Test the function boilerplate. -------------------------------------===//
35
36 // CHECK-LABEL: enum SubtargetFeatureBits : uint8_t {
37 // CHECK-NEXT: Feature_HasABit = 0,
38 // CHECK-NEXT: Feature_HasBBit = 1,
39 // CHECK-NEXT: };
40
41 // CHECK-LABEL: static const char *SubtargetFeatureNames[] = {
42 // CHECK-NEXT: "Feature_HasA",
43 // CHECK-NEXT: "Feature_HasB",
44 // CHECK-NEXT: nullptr
45 // CHECK-NEXT: };
46
47 // CHECK-LABEL: PredicateBitset MyTargetInstructionSelector::
48 // CHECK-NEXT: computeAvailableFeatures(const MachineFunction *MF, const MyTargetSubtarget *Subtarget) const {
49 // CHECK-NEXT: PredicateBitset Features;
50 // CHECK-NEXT: if (Subtarget->hasA())
51 // CHECK-NEXT: Features[Feature_HasABit] = 1;
52 // CHECK-NEXT: if (Subtarget->hasB())
53 // CHECK-NEXT: Features[Feature_HasBBit] = 1;
54 // CHECK-NEXT: return Features;
55 // CHECK-NEXT: }
3256
3357 // CHECK: bool MyTargetInstructionSelector::selectImpl(MachineInstr &I) const {
3458 // CHECK: MachineFunction &MF = *I.getParent()->getParent();
102126 //===- Test a nested instruction match. -----------------------------------===//
103127
104128 // CHECK-LABEL: if ([&]() {
129 // CHECK-NEXT: PredicateBitset ExpectedFeatures = {Feature_HasABit};
130 // CHECK-NEXT: if ((AvailableFeatures & ExpectedFeatures) != ExpectedFeatures)
131 // CHECK-NEXT: return false;
105132 // CHECK-NEXT: MachineInstr &MI0 = I;
106133 // CHECK-NEXT: if (MI0.getNumOperands() < 3)
107134 // CHECK-NEXT: return false;
141168
142169 // We also get a second rule by commutativity.
143170 // CHECK-LABEL: if ([&]() {
171 // CHECK-NEXT: PredicateBitset ExpectedFeatures = {Feature_HasABit};
172 // CHECK-NEXT: if ((AvailableFeatures & ExpectedFeatures) != ExpectedFeatures)
173 // CHECK-NEXT: return false;
144174 // CHECK-NEXT: MachineInstr &MI0 = I;
145175 // CHECK-NEXT: if (MI0.getNumOperands() < 3)
146176 // CHECK-NEXT: return false;
180210
181211 def MULADD : I<(outs GPR32:$dst), (ins GPR32:$src1, GPR32:$src2, GPR32:$src3),
182212 [(set GPR32:$dst,
183 (mul (add GPR32:$src1, GPR32:$src2), GPR32:$src3))]>;
213 (mul (add GPR32:$src1, GPR32:$src2), GPR32:$src3))]>,
214 Requires<[HasA]>;
184215
185216 //===- Test another simple pattern with regclass operands. ----------------===//
186217
187218 // CHECK-LABEL: if ([&]() {
219 // CHECK-NEXT: PredicateBitset ExpectedFeatures = {Feature_HasABit, Feature_HasBBit};
220 // CHECK-NEXT: if ((AvailableFeatures & ExpectedFeatures) != ExpectedFeatures)
221 // CHECK-NEXT: return false;
188222 // CHECK-NEXT: MachineInstr &MI0 = I;
189223 // CHECK-NEXT: if (MI0.getNumOperands() < 3)
190224 // CHECK-NEXT: return false;
212246 // CHECK-NEXT: }()) { return true; }
213247
214248 def MUL : I<(outs GPR32:$dst), (ins GPR32:$src2, GPR32:$src1),
215 [(set GPR32:$dst, (mul GPR32:$src1, GPR32:$src2))]>;
249 [(set GPR32:$dst, (mul GPR32:$src1, GPR32:$src2))]>,
250 Requires<[HasA, HasB]>;
216251
217252 //===- Test a pattern with ComplexPattern operands. -----------------------===//
218253 //
28602860 emitValidateOperandClass(Info, OS);
28612861
28622862 // Emit the available features compute function.
2863 SubtargetFeatureInfo::emitComputeAvailableFeatures(
2863 SubtargetFeatureInfo::emitComputeAssemblerAvailableFeatures(
28642864 Info.Target.getName(), ClassName, "ComputeAvailableFeatures",
28652865 Info.SubtargetFeatures, OS);
28662866
335335 o << "#endif // NDEBUG\n";
336336
337337 // Emit the available features compute function.
338 SubtargetFeatureInfo::emitComputeAvailableFeatures(
338 SubtargetFeatureInfo::emitComputeAssemblerAvailableFeatures(
339339 Target.getName(), "MCCodeEmitter", "computeAvailableFeatures",
340340 SubtargetFeatures, o);
341341
3030 //===----------------------------------------------------------------------===//
3131
3232 #include "CodeGenDAGPatterns.h"
33 #include "SubtargetFeatureInfo.h"
3334 #include "llvm/ADT/Optional.h"
3435 #include "llvm/ADT/SmallSet.h"
3536 #include "llvm/ADT/Statistic.h"
160161 return Explanation;
161162 }
162163
163 static std::string explainRulePredicates(const ArrayRef Predicates) {
164 std::string Explanation = "";
165 StringRef Separator = "";
166 for (const auto *P : Predicates) {
167 Explanation += Separator;
168
169 if (const DefInit *PDef = dyn_cast(P)) {
170 Explanation += PDef->getDef()->getName();
171 } else
172 Explanation += "";
173 }
174 return Explanation;
175 }
176
177164 std::string explainOperator(Record *Operator) {
178165 if (Operator->isSubClassOf("SDNode"))
179166 return " (" + Operator->getValueAsString("Opcode") + ")";
237224 /// ID for the next instruction variable defined with defineInsnVar()
238225 unsigned NextInsnVarID;
239226
227 std::vector RequiredFeatures;
228
240229 public:
241230 RuleMatcher()
242231 : Matchers(), Actions(), InsnVariableNames(), NextInsnVarID(0) {}
244233 RuleMatcher &operator=(RuleMatcher &&Other) = default;
245234
246235 InstructionMatcher &addInstructionMatcher();
236 void addRequiredFeature(Record *Feature);
247237
248238 template Kind &addAction(Args &&... args);
249239
254244 void emitCxxCapturedInsnList(raw_ostream &OS);
255245 void emitCxxCaptureStmts(raw_ostream &OS, StringRef Expr);
256246
257 void emit(raw_ostream &OS);
247 void emit(raw_ostream &OS,
248 std::map
249 SubtargetFeatures);
258250
259251 /// Compare the priority of this object and B.
260252 ///
10911083 return *Matchers.back();
10921084 }
10931085
1086 void RuleMatcher::addRequiredFeature(Record *Feature) {
1087 RequiredFeatures.push_back(Feature);
1088 }
1089
10941090 template
10951091 Kind &RuleMatcher::addAction(Args &&... args) {
10961092 Actions.emplace_back(llvm::make_unique(std::forward(args)...));
11341130 Matchers.front()->emitCxxCaptureStmts(OS, *this, InsnVarName);
11351131 }
11361132
1137 void RuleMatcher::emit(raw_ostream &OS) {
1133 void RuleMatcher::emit(raw_ostream &OS,
1134 std::map
1135 SubtargetFeatures) {
11381136 if (Matchers.empty())
11391137 llvm_unreachable("Unexpected empty matcher!");
11401138
11481146 // %elt0(s32), %elt1(s32) = TGT_LOAD_PAIR %ptr
11491147 // on some targets but we don't need to make use of that yet.
11501148 assert(Matchers.size() == 1 && "Cannot handle multi-root matchers yet");
1151 OS << "if ([&]() {\n";
1149
1150 OS << "if (";
1151 OS << "[&]() {\n";
1152 if (!RequiredFeatures.empty()) {
1153 OS << " PredicateBitset ExpectedFeatures = {";
1154 StringRef Separator = "";
1155 for (const auto &Predicate : RequiredFeatures) {
1156 const auto &I = SubtargetFeatures.find(Predicate);
1157 assert(I != SubtargetFeatures.end() && "Didn't import predicate?");
1158 OS << Separator << I->second.getEnumBitName();
1159 Separator = ", ";
1160 }
1161 OS << "};\n";
1162 OS << "if ((AvailableFeatures & ExpectedFeatures) != ExpectedFeatures)\n"
1163 << " return false;\n";
1164 }
11521165
11531166 emitCxxCaptureStmts(OS, "I");
11541167
12631276 /// GIComplexPatternEquiv.
12641277 DenseMap ComplexPatternEquivs;
12651278
1279 // Map of predicates to their subtarget features.
1280 std::map SubtargetFeatures;
1281
12661282 void gatherNodeEquivs();
12671283 const CodeGenInstruction *findNodeEquiv(Record *N) const;
12681284
1269 Error importRulePredicates(RuleMatcher &M, ArrayRef Predicates) const;
1285 Error importRulePredicates(RuleMatcher &M, ArrayRef Predicates);
12701286 Expected
12711287 createAndImportSelDAGMatcher(InstructionMatcher &InsnMatcher,
12721288 const TreePatternNode *Src) const;
12861302 /// Analyze pattern \p P, returning a matcher for it if possible.
12871303 /// Otherwise, return an Error explaining why we don't support it.
12881304 Expected runOnPattern(const PatternToMatch &P);
1305
1306 void declareSubtargetFeature(Record *Predicate);
12891307 };
12901308
12911309 void GlobalISelEmitter::gatherNodeEquivs() {
13141332
13151333 Error
13161334 GlobalISelEmitter::importRulePredicates(RuleMatcher &M,
1317 ArrayRef Predicates) const {
1318 if (!Predicates.empty())
1319 return failedImport("Pattern has a rule predicate (" +
1320 explainRulePredicates(Predicates) + ")");
1335 ArrayRef Predicates) {
1336 for (const Init *Predicate : Predicates) {
1337 const DefInit *PredicateDef = static_cast(Predicate);
1338 declareSubtargetFeature(PredicateDef->getDef());
1339 M.addRequiredFeature(PredicateDef->getDef());
1340 }
1341
13211342 return Error::success();
13221343 }
13231344
17241745 for (const auto &Rule : Rules)
17251746 MaxTemporaries = std::max(MaxTemporaries, Rule.countTemporaryOperands());
17261747
1748 OS << "#ifdef GET_GLOBALISEL_PREDICATE_BITSET\n"
1749 << "const unsigned MAX_SUBTARGET_PREDICATES = " << SubtargetFeatures.size()
1750 << ";\n"
1751 << "using PredicateBitset = "
1752 "llvm::PredicateBitsetImpl;\n"
1753 << "#endif // ifdef GET_GLOBALISEL_PREDICATE_BITSET\n\n";
1754
17271755 OS << "#ifdef GET_GLOBALISEL_TEMPORARIES_DECL\n";
17281756 for (unsigned I = 0; I < MaxTemporaries; ++I)
17291757 OS << " mutable MachineOperand TempOp" << I << ";\n";
17341762 OS << ", TempOp" << I << "(MachineOperand::CreatePlaceholder())\n";
17351763 OS << "#endif // ifdef GET_GLOBALISEL_TEMPORARIES_INIT\n\n";
17361764
1737 OS << "#ifdef GET_GLOBALISEL_IMPL\n"
1738 << "bool " << Target.getName()
1765 OS << "#ifdef GET_GLOBALISEL_IMPL\n";
1766 SubtargetFeatureInfo::emitSubtargetFeatureBitEnumeration(SubtargetFeatures,
1767 OS);
1768 SubtargetFeatureInfo::emitNameTable(SubtargetFeatures, OS);
1769 SubtargetFeatureInfo::emitComputeAvailableFeatures(
1770 Target.getName(), "InstructionSelector", "computeAvailableFeatures",
1771 SubtargetFeatures, OS);
1772
1773 OS << "bool " << Target.getName()
17391774 << "InstructionSelector::selectImpl(MachineInstr &I) const {\n"
17401775 << " MachineFunction &MF = *I.getParent()->getParent();\n"
17411776 << " const MachineRegisterInfo &MRI = MF.getRegInfo();\n";
17421777
17431778 for (auto &Rule : Rules) {
1744 Rule.emit(OS);
1779 Rule.emit(OS, SubtargetFeatures);
17451780 ++NumPatternEmitted;
17461781 }
17471782
17501785 << "#endif // ifdef GET_GLOBALISEL_IMPL\n";
17511786 }
17521787
1788 void GlobalISelEmitter::declareSubtargetFeature(Record *Predicate) {
1789 if (SubtargetFeatures.count(Predicate) == 0)
1790 SubtargetFeatures.emplace(
1791 Predicate, SubtargetFeatureInfo(Predicate, SubtargetFeatures.size()));
1792 }
1793
17531794 } // end anonymous namespace
17541795
17551796 //===----------------------------------------------------------------------===//
5858 OS << "};\n\n";
5959 }
6060
61 void SubtargetFeatureInfo::emitSubtargetFeatureBitEnumeration(
62 std::map &SubtargetFeatures,
63 raw_ostream &OS) {
64 OS << "// Bits for subtarget features that participate in "
65 << "instruction matching.\n";
66 OS << "enum SubtargetFeatureBits : "
67 << getMinimalTypeForRange(SubtargetFeatures.size()) << " {\n";
68 for (const auto &SF : SubtargetFeatures) {
69 const SubtargetFeatureInfo &SFI = SF.second;
70 OS << " " << SFI.getEnumBitName() << " = " << SFI.Index << ",\n";
71 }
72 OS << "};\n\n";
73 }
74
6175 void SubtargetFeatureInfo::emitNameTable(
6276 std::map &SubtargetFeatures,
6377 raw_ostream &OS) {
86100 }
87101
88102 void SubtargetFeatureInfo::emitComputeAvailableFeatures(
103 StringRef TargetName, StringRef ClassName, StringRef FuncName,
104 std::map &SubtargetFeatures,
105 raw_ostream &OS) {
106 OS << "PredicateBitset " << TargetName << ClassName << "::\n"
107 << FuncName << "(const MachineFunction *MF, const " << TargetName
108 << "Subtarget *Subtarget) const {\n";
109 OS << " PredicateBitset Features;\n";
110 for (const auto &SF : SubtargetFeatures) {
111 const SubtargetFeatureInfo &SFI = SF.second;
112
113 OS << " if (" << SFI.TheDef->getValueAsString("CondString") << ")\n";
114 OS << " Features[" << SFI.getEnumBitName() << "] = 1;\n";
115 }
116 OS << " return Features;\n";
117 OS << "}\n\n";
118 }
119
120 void SubtargetFeatureInfo::emitComputeAssemblerAvailableFeatures(
89121 StringRef TargetName, StringRef ClassName, StringRef FuncName,
90122 std::map &SubtargetFeatures,
91123 raw_ostream &OS) {
3636 return "Feature_" + TheDef->getName().str();
3737 }
3838
39 /// \brief The name of the enumerated constant identifying the bitnumber for
40 /// this feature.
41 std::string getEnumBitName() const {
42 return "Feature_" + TheDef->getName().str() + "Bit";
43 }
44
3945 void dump() const;
4046 static std::vector>
4147 getAll(const RecordKeeper &Records);
4248
4349 /// Emit the subtarget feature flag definitions.
50 ///
51 /// This version emits the bit value for the feature and is therefore limited
52 /// to 64 feature bits.
4453 static void emitSubtargetFeatureFlagEnumeration(
54 std::map
55 &SubtargetFeatures,
56 raw_ostream &OS);
57
58 /// Emit the subtarget feature flag definitions.
59 ///
60 /// This version emits the bit index for the feature and can therefore support
61 /// more than 64 feature bits.
62 static void emitSubtargetFeatureBitEnumeration(
4563 std::map
4664 &SubtargetFeatures,
4765 raw_ostream &OS);
5270
5371 /// Emit the function to compute the list of available features given a
5472 /// subtarget.
73 ///
74 /// This version is used for subtarget features defined using Predicate<>
75 /// and supports more than 64 feature bits.
5576 ///
5677 /// \param TargetName The name of the target as used in class prefixes (e.g.
5778 /// Subtarget)
6586 std::map
6687 &SubtargetFeatures,
6788 raw_ostream &OS);
89
90 /// Emit the function to compute the list of available features given a
91 /// subtarget.
92 ///
93 /// This version is used for subtarget features defined using
94 /// AssemblerPredicate<> and supports up to 64 feature bits.
95 ///
96 /// \param TargetName The name of the target as used in class prefixes (e.g.
97 /// Subtarget)
98 /// \param ClassName The name of the class (without the prefix)
99 /// that will contain the generated functions.
100 /// \param FuncName The name of the function to emit.
101 /// \param SubtargetFeatures A map of TableGen records to the
102 /// SubtargetFeatureInfo equivalent.
103 static void emitComputeAssemblerAvailableFeatures(
104 StringRef TargetName, StringRef ClassName, StringRef FuncName,
105 std::map
106 &SubtargetFeatures,
107 raw_ostream &OS);
68108 };
69109 } // end namespace llvm
70110
3939 uint64_t MaxIndex = Size;
4040 if (MaxIndex > 0)
4141 MaxIndex--;
42 assert(MaxIndex <= 64 && "Too many bits");
4243 return getMinimalTypeForRange(1ULL << MaxIndex);
4344 }