llvm.org GIT mirror llvm / e859e41
Merging r370204: ------------------------------------------------------------------------ r370204 | hans | 2019-08-28 15:55:10 +0200 (Wed, 28 Aug 2019) | 6 lines [SelectionDAG] Don't generate libcalls for wide shifts on Windows (PR42711) Neither libgcc or compiler-rt are usually used on Windows, so these functions can't be called. Differential revision: https://reviews.llvm.org/D66880 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_90@370205 91177308-0d34-0410-b5e6-96231b3b80d8 Hans Wennborg 1 year, 3 months ago
6 changed file(s) with 31 addition(s) and 11 deletion(s). Raw diff Collapse all Expand all
1199411994 return Mask->getValue().isPowerOf2();
1199511995 }
1199611996
11997 bool AArch64TargetLowering::shouldExpandShift(SelectionDAG &DAG,
11998 SDNode *N) const {
11999 if (DAG.getMachineFunction().getFunction().hasMinSize() &&
12000 !Subtarget->isTargetWindows())
12001 return false;
12002 return true;
12003 }
12004
1199712005 void AArch64TargetLowering::initializeSplitCSR(MachineBasicBlock *Entry) const {
1199812006 // Update IsSplitCSR in AArch64unctionInfo.
1199912007 AArch64FunctionInfo *AFI = Entry->getParent()->getInfo();
479479 return VT.getSizeInBits() >= 64; // vector 'bic'
480480 }
481481
482 bool shouldExpandShift(SelectionDAG &DAG, SDNode *N) const override {
483 if (DAG.getMachineFunction().getFunction().hasMinSize())
484 return false;
485 return true;
486 }
482 bool shouldExpandShift(SelectionDAG &DAG, SDNode *N) const override;
487483
488484 bool shouldTransformSignedTruncationCheck(EVT XVT,
489485 unsigned KeptBits) const override {
50555055 if (VT == MVT::i64 && !Subtarget.is64Bit())
50565056 return false;
50575057
5058 return true;
5059 }
5060
5061 bool X86TargetLowering::shouldExpandShift(SelectionDAG &DAG,
5062 SDNode *N) const {
5063 if (DAG.getMachineFunction().getFunction().hasMinSize() &&
5064 !Subtarget.isOSWindows())
5065 return false;
50585066 return true;
50595067 }
50605068
862862 return VTIsOk(XVT) && VTIsOk(KeptBitsVT);
863863 }
864864
865 bool shouldExpandShift(SelectionDAG &DAG, SDNode *N) const override {
866 if (DAG.getMachineFunction().getFunction().hasMinSize())
867 return false;
868 return true;
869 }
865 bool shouldExpandShift(SelectionDAG &DAG, SDNode *N) const override;
870866
871867 bool shouldSplatInsEltVarIndex(EVT VT) const override;
872868
0 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
11 ; RUN: llc < %s -mtriple=aarch64-unknown-unknown | FileCheck %s
2 ; RUN: llc < %s -mtriple=aarch64-windows | FileCheck %s -check-prefix=CHECK-WIN
3
4 ; The Windows runtime doesn't have these.
5 ; CHECK-WIN-NOT: __ashlti3
6 ; CHECK-WIN-NOT: __ashrti3
27
38 define i64 @f0(i64 %val, i64 %amt) minsize optsize {
49 ; CHECK-LABEL: f0:
5257 ; CHECK-NEXT: bl __ashlti3
5358 ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
5459 ; CHECK-NEXT: ret
60
5561 entry:
5662 %x.sroa.2.0.insert.ext = zext i64 %x.coerce1 to i128
5763 %x.sroa.2.0.insert.shift = shl nuw i128 %x.sroa.2.0.insert.ext, 64
0 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
1 ; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s
1 ; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s
2 ; RUN: llc < %s -mtriple=x86_64--windows-msvc | FileCheck %s -check-prefix=CHECK-WIN
3
4 ; The Windows runtime doesn't have these.
5 ; CHECK-WIN-NOT: __ashlti3
6 ; CHECK-WIN-NOT: __ashrti3
7 ; CHECK-WIN-NOT: __lshrti3
28
39 define i64 @f0(i64 %val, i64 %amt) minsize optsize {
410 ; CHECK-LABEL: f0: