llvm.org GIT mirror llvm / e7f301e
[FastISel][AArch64] Use the correct register class for branches. Also constrain the register class for branches. This fixes rdar://problem/18181496. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216804 91177308-0d34-0410-b5e6-96231b3b80d8 Juergen Ributzka 6 years ago
2 changed file(s) with 24 addition(s) and 7 deletion(s). Raw diff Collapse all Expand all
21812181 // Issue the call.
21822182 MachineInstrBuilder MIB;
21832183 if (CM == CodeModel::Small) {
2184 unsigned CallOpc = Addr.getReg() ? AArch64::BLR : AArch64::BL;
2185 MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(CallOpc));
2184 const MCInstrDesc &II = TII.get(Addr.getReg() ? AArch64::BLR : AArch64::BL);
2185 MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II);
21862186 if (SymName)
21872187 MIB.addExternalSymbol(SymName, 0);
21882188 else if (Addr.getGlobalValue())
21892189 MIB.addGlobalAddress(Addr.getGlobalValue(), 0, 0);
2190 else if (Addr.getReg())
2191 MIB.addReg(Addr.getReg());
2192 else
2190 else if (Addr.getReg()) {
2191 unsigned Reg = constrainOperandRegClass(II, Addr.getReg(), 0);
2192 MIB.addReg(Reg);
2193 } else
21932194 return false;
21942195 } else {
21952196 unsigned CallReg = 0;
22132214 if (!CallReg)
22142215 return false;
22152216
2216 MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
2217 TII.get(AArch64::BLR)).addReg(CallReg);
2217 const MCInstrDesc &II = TII.get(AArch64::BLR);
2218 CallReg = constrainOperandRegClass(II, CallReg, 0);
2219 MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II).addReg(CallReg);
22182220 }
22192221
22202222 // Add implicit physical register uses to the call.
251251 ; CHECK-LABEL: call_arguments9
252252 ret void
253253 }
254
255 ; Test that we use the correct register class for the branch.
256 define void @call_blr(i64 %Fn, i1 %c) {
257 ; CHECK-LABEL: call_blr
258 ; CHECK: blr
259 br i1 %c, label %bb1, label %bb2
260 bb1:
261 %1 = inttoptr i64 %Fn to void (i64)*
262 br label %bb2
263 bb2:
264 %2 = phi void (i64)* [ %1, %bb1 ], [ undef, %0 ]
265 call void %2(i64 1)
266 ret void
267 }
268