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[ARM] Add support for armv7ve triple in llvm (PR31358). Gcc supports target armv7ve which is armv7-a with virtualization extensions. This change adds support for this in llvm for gcc compatibility. Also remove redundant FeatureHWDiv, FeatureHWDivARM for a few models as this is specified automatically by FeatureVirtualization. Patch by Manoj Gupta. Differential Revision: https://reviews.llvm.org/D29472 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294661 91177308-0d34-0410-b5e6-96231b3b80d8 George Burgess IV 2 years ago
9 changed file(s) with 69 addition(s) and 30 deletion(s). Raw diff Collapse all Expand all
109109 ARMSubArch_v7m,
110110 ARMSubArch_v7s,
111111 ARMSubArch_v7k,
112 ARMSubArch_v7ve,
112113 ARMSubArch_v6,
113114 ARMSubArch_v6m,
114115 ARMSubArch_v6k,
7575 FK_NONE, ARM::AEK_NONE)
7676 ARM_ARCH("armv7-a", AK_ARMV7A, "7-A", "v7", ARMBuildAttrs::CPUArch::v7,
7777 FK_NEON, ARM::AEK_DSP)
78 ARM_ARCH("armv7ve", AK_ARMV7VE, "7VE", "v7ve", ARMBuildAttrs::CPUArch::v7,
79 FK_NEON, (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT |
80 ARM::AEK_HWDIVARM | ARM::AEK_HWDIV | ARM::AEK_DSP))
7881 ARM_ARCH("armv7-r", AK_ARMV7R, "7-R", "v7r", ARMBuildAttrs::CPUArch::v7,
7982 FK_NONE, (ARM::AEK_HWDIV | ARM::AEK_DSP))
8083 ARM_ARCH("armv7-m", AK_ARMV7M, "7-M", "v7m", ARMBuildAttrs::CPUArch::v7,
724724 case ARM::AK_ARMV8R:
725725 return ARM::PK_R;
726726 case ARM::AK_ARMV7A:
727 case ARM::AK_ARMV7VE:
727728 case ARM::AK_ARMV7K:
728729 case ARM::AK_ARMV8A:
729730 case ARM::AK_ARMV8_1A:
760761 case ARM::AK_ARMV6M:
761762 return 6;
762763 case ARM::AK_ARMV7A:
764 case ARM::AK_ARMV7VE:
763765 case ARM::AK_ARMV7R:
764766 case ARM::AK_ARMV7M:
765767 case ARM::AK_ARMV7S:
550550 case ARM::AK_ARMV7A:
551551 case ARM::AK_ARMV7R:
552552 return Triple::ARMSubArch_v7;
553 case ARM::AK_ARMV7VE:
554 return Triple::ARMSubArch_v7ve;
553555 case ARM::AK_ARMV7K:
554556 return Triple::ARMSubArch_v7k;
555557 case ARM::AK_ARMV7M:
417417 FeatureAClass,
418418 FeatureT2XtPk]>;
419419
420 def ARMv7ve : Architecture<"armv7ve", "ARMv7ve", [HasV7Ops,
421 FeatureNEON,
422 FeatureDB,
423 FeatureDSP,
424 FeatureTrustZone,
425 FeatureMP,
426 FeatureVirtualization,
427 FeatureAClass,
428 FeatureT2XtPk]>;
429
420430 def ARMv7r : Architecture<"armv7-r", "ARMv7r", [HasV7Ops,
421431 FeatureDB,
422432 FeatureDSP,
480490 def ARMv8r : Architecture<"armv8-r", "ARMv8r", [HasV8Ops,
481491 FeatureRClass,
482492 FeatureDB,
483 FeatureHWDiv,
484 FeatureHWDivARM,
485493 FeatureT2XtPk,
486494 FeatureDSP,
487495 FeatureCRC,
602610 FeatureVMLxForwarding,
603611 FeatureMP,
604612 FeatureVFP4,
605 FeatureHWDiv,
606 FeatureHWDivARM,
607613 FeatureVirtualization]>;
608614
609615 def : ProcessorModel<"cortex-a8", CortexA8Model, [ARMv7a, ProcA8,
635641 FeatureTrustZone,
636642 FeatureVMLxForwarding,
637643 FeatureVFP4,
638 FeatureHWDiv,
639 FeatureHWDivARM,
640644 FeatureAvoidPartialCPSR,
641645 FeatureVirtualization,
642646 FeatureMP]>;
650654 FeatureVFP4,
651655 FeatureMP,
652656 FeatureCheckVLDnAlign,
653 FeatureHWDiv,
654 FeatureHWDivARM,
655657 FeatureAvoidPartialCPSR,
656658 FeatureVirtualization]>;
657659
662664 FeatureMP,
663665 FeatureVMLxForwarding,
664666 FeatureVFP4,
665 FeatureHWDiv,
666 FeatureHWDivARM,
667667 FeatureAvoidPartialCPSR,
668668 FeatureVirtualization]>;
669669
5050 };
5151 enum ARMArchEnum {
5252 ARMv2, ARMv2a, ARMv3, ARMv3m, ARMv4, ARMv4t, ARMv5, ARMv5t, ARMv5te,
53 ARMv5tej, ARMv6, ARMv6k, ARMv6kz, ARMv6t2, ARMv6m, ARMv6sm, ARMv7a, ARMv7r,
54 ARMv7m, ARMv7em, ARMv8a, ARMv81a, ARMv82a, ARMv8mMainline, ARMv8mBaseline,
55 ARMv8r
53 ARMv5tej, ARMv6, ARMv6k, ARMv6kz, ARMv6t2, ARMv6m, ARMv6sm, ARMv7a, ARMv7ve,
54 ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv81a, ARMv82a, ARMv8mMainline,
55 ARMv8mBaseline, ARMv8r
5656 };
5757
5858 public:
185185 ; ARMv7a
186186 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
187187 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
188 ; ARMv7ve
189 ; RUN: llc < %s -mtriple=armv7ve-none-linux-gnueabi | FileCheck %s --check-prefix=V7VE
188190 ; ARMv7r
189191 ; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
190192 ; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
377379 ; V7-FAST-NOT: .eabi_attribute 21
378380 ; V7-FAST-NOT: .eabi_attribute 22
379381 ; V7-FAST: .eabi_attribute 23, 1
382
383 ; V7VE: .syntax unified
384 ; V7VE: .eabi_attribute 6, 10 @ Tag_CPU_arch
385 ; V7VE: .eabi_attribute 7, 65 @ Tag_CPU_arch_profile
386 ; V7VE: .eabi_attribute 8, 1 @ Tag_ARM_ISA_use
387 ; V7VE: .eabi_attribute 9, 2 @ Tag_THUMB_ISA_use
388 ; V7VE: .eabi_attribute 17, 1 @ Tag_ABI_PCS_GOT_use
389 ; V7VE: .eabi_attribute 20, 1 @ Tag_ABI_FP_denormal
390 ; V7VE: .eabi_attribute 21, 1 @ Tag_ABI_FP_exceptions
391 ; V7VE: .eabi_attribute 23, 3 @ Tag_ABI_FP_number_model
392 ; V7VE: .eabi_attribute 24, 1 @ Tag_ABI_align_needed
393 ; V7VE: .eabi_attribute 25, 1 @ Tag_ABI_align_preserved
394 ; V7VE: .eabi_attribute 38, 1 @ Tag_ABI_FP_16bit_format
395 ; V7VE: .eabi_attribute 42, 1 @ Tag_MPextension_use
396 ; V7VE: .eabi_attribute 44, 2 @ Tag_DIV_use
397 ; V7VE: .eabi_attribute 68, 3 @ Tag_Virtualization_use
380398
381399 ; V8: .syntax unified
382400 ; V8: .eabi_attribute 67, "2.09"
99 ; RUN: FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-HWDIV
1010 ; RUN: llc < %s -mtriple=arm-none-eabi -mcpu=cortex-a8 | \
1111 ; RUN: FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-EABI
12 ; RUN: llc < %s -mtriple=armv7ve-none-linux-gnu | \
13 ; RUN: FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-HWDIV
14 ; RUN: llc < %s -mtriple=thumbv7ve-none-linux-gnu | \
15 ; RUN: FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-HWDIV \
16 ; RUN: -check-prefix=CHECK-THUMB
1217
1318 define i32 @f1(i32 %a, i32 %b) {
1419 entry:
1520 ; CHECK-LABEL: f1
1621 ; CHECK-SWDIV: __divsi3
1722
23 ; CHECK-THUMB: .thumb_func
1824 ; CHECK-HWDIV: sdiv
1925
2026 ; CHECK-EABI: __aeabi_idiv
2733 ; CHECK-LABEL: f2
2834 ; CHECK-SWDIV: __udivsi3
2935
36 ; CHECK-THUMB: .thumb_func
3037 ; CHECK-HWDIV: udiv
3138
3239 ; CHECK-EABI: __aeabi_uidiv
3946 ; CHECK-LABEL: f3
4047 ; CHECK-SWDIV: __modsi3
4148
49 ; CHECK-THUMB: .thumb_func
4250 ; CHECK-HWDIV: sdiv
4351 ; CHECK-HWDIV: mls
4452
5462 ; CHECK-LABEL: f4
5563 ; CHECK-SWDIV: __umodsi3
5664
65 ; CHECK-THUMB: .thumb_func
5766 ; CHECK-HWDIV: udiv
5867 ; CHECK-HWDIV: mls
5968
1616
1717 namespace {
1818 const char *ARMArch[] = {
19 "armv2", "armv2a", "armv3", "armv3m", "armv4",
20 "armv4t", "armv5", "armv5t", "armv5e", "armv5te",
21 "armv5tej", "armv6", "armv6j", "armv6k", "armv6hl",
22 "armv6t2", "armv6kz", "armv6z", "armv6zk", "armv6-m",
23 "armv6m", "armv6sm", "armv6s-m", "armv7-a", "armv7",
24 "armv7a", "armv7hl", "armv7l", "armv7-r", "armv7r",
25 "armv7-m", "armv7m", "armv7k", "armv7s", "armv7e-m",
26 "armv7em", "armv8-a", "armv8", "armv8a", "armv8.1-a",
27 "armv8.1a", "armv8.2-a", "armv8.2a", "armv8-r", "armv8r",
28 "armv8-m.base", "armv8m.base", "armv8-m.main", "armv8m.main", "iwmmxt",
29 "iwmmxt2", "xscale"};
19 "armv2", "armv2a", "armv3", "armv3m", "armv4",
20 "armv4t", "armv5", "armv5t", "armv5e", "armv5te",
21 "armv5tej", "armv6", "armv6j", "armv6k", "armv6hl",
22 "armv6t2", "armv6kz", "armv6z", "armv6zk", "armv6-m",
23 "armv6m", "armv6sm", "armv6s-m", "armv7-a", "armv7",
24 "armv7a", "armv7ve", "armv7hl", "armv7l", "armv7-r",
25 "armv7r", "armv7-m", "armv7m", "armv7k", "armv7s",
26 "armv7e-m", "armv7em", "armv8-a", "armv8", "armv8a",
27 "armv8.1-a", "armv8.1a", "armv8.2-a", "armv8.2a", "armv8-r",
28 "armv8r", "armv8-m.base", "armv8m.base", "armv8-m.main", "armv8m.main",
29 "iwmmxt", "iwmmxt2", "xscale"};
3030
3131 bool testARMCPU(StringRef CPUName, StringRef ExpectedArch,
3232 StringRef ExpectedFPU, unsigned ExpectedFlags,
314314 testARMArch("armv7-a", "cortex-a8", "v7",
315315 ARMBuildAttrs::CPUArch::v7));
316316 EXPECT_TRUE(
317 testARMArch("armv7ve", "generic", "v7ve",
318 ARMBuildAttrs::CPUArch::v7));
319 EXPECT_TRUE(
317320 testARMArch("armv7-r", "cortex-r4", "v7r",
318321 ARMBuildAttrs::CPUArch::v7));
319322 EXPECT_TRUE(
501504
502505 TEST(TargetParserTest, ARMparseArchEndianAndISA) {
503506 const char *Arch[] = {
504 "v2", "v2a", "v3", "v3m", "v4", "v4t", "v5", "v5t",
505 "v5e", "v5te", "v5tej", "v6", "v6j", "v6k", "v6hl", "v6t2",
506 "v6kz", "v6z", "v6zk", "v6-m", "v6m", "v6sm", "v6s-m", "v7-a",
507 "v7", "v7a", "v7hl", "v7l", "v7-r", "v7r", "v7-m", "v7m",
508 "v7k", "v7s", "v7e-m", "v7em", "v8-a", "v8", "v8a", "v8.1-a",
509 "v8.1a", "v8.2-a", "v8.2a", "v8-r"};
507 "v2", "v2a", "v3", "v3m", "v4", "v4t", "v5", "v5t",
508 "v5e", "v5te", "v5tej", "v6", "v6j", "v6k", "v6hl", "v6t2",
509 "v6kz", "v6z", "v6zk", "v6-m", "v6m", "v6sm", "v6s-m", "v7-a",
510 "v7", "v7a", "v7ve", "v7hl", "v7l", "v7-r", "v7r", "v7-m",
511 "v7m", "v7k", "v7s", "v7e-m", "v7em", "v8-a", "v8", "v8a",
512 "v8.1-a", "v8.1a", "v8.2-a", "v8.2a", "v8-r"};
510513
511514 for (unsigned i = 0; i < array_lengthof(Arch); i++) {
512515 std::string arm_1 = "armeb" + (std::string)(Arch[i]);
558561 EXPECT_EQ(ARM::PK_R, ARM::parseArchProfile(ARMArch[i]));
559562 continue;
560563 case ARM::AK_ARMV7A:
564 case ARM::AK_ARMV7VE:
561565 case ARM::AK_ARMV7K:
562566 case ARM::AK_ARMV8A:
563567 case ARM::AK_ARMV8_1A: