llvm.org GIT mirror llvm / e78085a
Combine all MC initialization routines into one. e.g. InitializeX86MCAsmInfo, InitializeX86MCInstrInfo, etc. are combined into InitializeX86TargetMC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135812 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 8 years ago
29 changed file(s) with 265 addition(s) and 421 deletion(s). Raw diff Collapse all Expand all
657657 [LLVM architecture name for the native architecture, if available])
658658 LLVM_NATIVE_TARGET="LLVMInitialize${LLVM_NATIVE_ARCH}Target"
659659 LLVM_NATIVE_TARGETINFO="LLVMInitialize${LLVM_NATIVE_ARCH}TargetInfo"
660 LLVM_NATIVE_MCASMINFO="LLVMInitialize${LLVM_NATIVE_ARCH}MCAsmInfo"
661 LLVM_NATIVE_MCCODEGENINFO="LLVMInitialize${LLVM_NATIVE_ARCH}MCCodeGenInfo"
660 LLVM_NATIVE_TARGETMC="LLVMInitialize${LLVM_NATIVE_ARCH}TargetMC"
662661 LLVM_NATIVE_ASMPRINTER="LLVMInitialize${LLVM_NATIVE_ARCH}AsmPrinter"
663662 if test -f ${srcdir}/lib/Target/${LLVM_NATIVE_ARCH}/AsmParser/Makefile ; then
664663 LLVM_NATIVE_ASMPARSER="LLVMInitialize${LLVM_NATIVE_ARCH}AsmParser"
667666 [LLVM name for the native Target init function, if available])
668667 AC_DEFINE_UNQUOTED(LLVM_NATIVE_TARGETINFO, $LLVM_NATIVE_TARGETINFO,
669668 [LLVM name for the native TargetInfo init function, if available])
670 AC_DEFINE_UNQUOTED(LLVM_NATIVE_MCASMINFO, $LLVM_NATIVE_MCASMINFO,
671 [LLVM name for the native MCAsmInfo init function, if available])
672 AC_DEFINE_UNQUOTED(LLVM_NATIVE_MCCODEGENINFO, $LLVM_NATIVE_MCCODEGENINFO,
673 [LLVM name for the native MCCodeGenInfo init function, if available])
669 AC_DEFINE_UNQUOTED(LLVM_NATIVE_TARGETMC, $LLVM_NATIVE_TARGETMC,
670 [LLVM name for the native target MC init function, if available])
674671 AC_DEFINE_UNQUOTED(LLVM_NATIVE_ASMPRINTER, $LLVM_NATIVE_ASMPRINTER,
675672 [LLVM name for the native AsmPrinter init function, if available])
676673 if test -f ${srcdir}/lib/Target/${LLVM_NATIVE_ARCH}/AsmParser/Makefile ; then
335335 message(STATUS "Native target architecture is ${LLVM_NATIVE_ARCH}")
336336 set(LLVM_NATIVE_TARGET LLVMInitialize${LLVM_NATIVE_ARCH}Target)
337337 set(LLVM_NATIVE_TARGETINFO LLVMInitialize${LLVM_NATIVE_ARCH}TargetInfo)
338 set(LLVM_NATIVE_MCASMINFO LLVMInitialize${LLVM_NATIVE_ARCH}MCAsmInfo)
339 set(LLVM_NATIVE_MCCODEGENINFO LLVMInitialize${LLVM_NATIVE_ARCH}MCCODEGENInfo)
338 set(LLVM_NATIVE_TARGETMC LLVMInitialize${LLVM_NATIVE_ARCH}TargetMC)
340339 set(LLVM_NATIVE_ASMPRINTER LLVMInitialize${LLVM_NATIVE_ARCH}AsmPrinter)
341340 endif ()
342341
51215121
51225122 LLVM_NATIVE_TARGET="LLVMInitialize${LLVM_NATIVE_ARCH}Target"
51235123 LLVM_NATIVE_TARGETINFO="LLVMInitialize${LLVM_NATIVE_ARCH}TargetInfo"
5124 LLVM_NATIVE_MCASMINFO="LLVMInitialize${LLVM_NATIVE_ARCH}MCAsmInfo"
5125 LLVM_NATIVE_MCCODEGENINFO="LLVMInitialize${LLVM_NATIVE_ARCH}MCCodeGenInfo"
5124 LLVM_NATIVE_TARGETMC="LLVMInitialize${LLVM_NATIVE_ARCH}TargetMC"
51265125 LLVM_NATIVE_ASMPRINTER="LLVMInitialize${LLVM_NATIVE_ARCH}AsmPrinter"
51275126 if test -f ${srcdir}/lib/Target/${LLVM_NATIVE_ARCH}/AsmParser/Makefile ; then
51285127 LLVM_NATIVE_ASMPARSER="LLVMInitialize${LLVM_NATIVE_ARCH}AsmParser"
51395138
51405139
51415140 cat >>confdefs.h <<_ACEOF
5142 #define LLVM_NATIVE_MCASMINFO $LLVM_NATIVE_MCASMINFO
5143 _ACEOF
5144
5145
5146 cat >>confdefs.h <<_ACEOF
5147 #define LLVM_NATIVE_MCCODEGENINFO $LLVM_NATIVE_MCCODEGENINFO
5141 #define LLVM_NATIVE_TARGETMC $LLVM_NATIVE_TARGETMC
51485142 _ACEOF
51495143
51505144
575575 /* LLVM name for the native AsmPrinter init function, if available */
576576 #undef LLVM_NATIVE_ASMPRINTER
577577
578 /* LLVM name for the native MCAsmInfo init function, if available */
579 #undef LLVM_NATIVE_MCASMINFO
580
581 /* LLVM name for the native MCCodeGenInfo init function, if available */
582 #undef LLVM_NATIVE_MCCODEGENINFO
578 /* LLVM name for the native TargetMC init function, if available */
579 #undef LLVM_NATIVE_TARGETMC
583580
584581 /* LLVM name for the native Target init function, if available */
585582 #undef LLVM_NATIVE_TARGET
5757 /* LLVM name for the native TargetInfo init function, if available */
5858 #undef LLVM_NATIVE_TARGETINFO
5959
60 /* LLVM name for the native MCAsmInfo init function, if available */
61 #undef LLVM_NATIVE_MCASMINFO
62
63 /* LLVM name for the native MCCodeGenInfo init function, if available */
64 #undef LLVM_NATIVE_MCCODEGENINFO
60 /* LLVM name for the native TargetMC init function, if available */
61 #undef LLVM_NATIVE_TARGETMC
6562
6663 /* LLVM name for the native AsmPrinter init function, if available */
6764 #undef LLVM_NATIVE_ASMPRINTER
2525 #define LLVM_TARGET(TargetName) void LLVMInitialize##TargetName##Target();
2626 #include "llvm/Config/Targets.def"
2727
28 #define LLVM_TARGET(TargetName) \
29 void LLVMInitialize##TargetName##MCAsmInfo();
28 // Declare all of the target-MC-initialization functions that are available.
29 #define LLVM_TARGET(TargetName) void LLVMInitialize##TargetName##TargetMC();
3030 #include "llvm/Config/Targets.def"
31
32 #define LLVM_TARGET(TargetName) \
33 void LLVMInitialize##TargetName##MCCodeGenInfo();
34 #include "llvm/Config/Targets.def"
35
36 #define LLVM_TARGET(TargetName) \
37 void LLVMInitialize##TargetName##MCInstrInfo();
38 #include "llvm/Config/Targets.def"
39
40 #define LLVM_TARGET(TargetName) \
41 void LLVMInitialize##TargetName##MCRegisterInfo();
42 #include "llvm/Config/Targets.def"
43
44 #define LLVM_TARGET(TargetName) \
45 void LLVMInitialize##TargetName##MCSubtargetInfo();
46 #include "llvm/Config/Targets.def"
47
31
4832 // Declare all of the available assembly printer initialization functions.
4933 #define LLVM_ASM_PRINTER(TargetName) void LLVMInitialize##TargetName##AsmPrinter();
5034 #include "llvm/Config/AsmPrinters.def"
8367 #include "llvm/Config/Targets.def"
8468 }
8569
86 /// InitializeAllMCAsmInfos - The main program should call this function
87 /// if it wants access to all available assembly infos for targets that
88 /// LLVM is configured to support, to make them available via the
89 /// TargetRegistry.
90 ///
91 /// It is legal for a client to make multiple calls to this function.
92 inline void InitializeAllMCAsmInfos() {
93 #define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##MCAsmInfo();
94 #include "llvm/Config/Targets.def"
95 }
96
97 /// InitializeAllMCCodeGenInfos - The main program should call this function
98 /// if it wants access to all targets machines that LLVM is configured to
70 /// InitializeAllTargetMCs - The main program should call this function if it
71 /// wants access to all available target MC that LLVM is configured to
9972 /// support, to make them available via the TargetRegistry.
10073 ///
10174 /// It is legal for a client to make multiple calls to this function.
102 inline void InitializeAllMCCodeGenInfos() {
103 #define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##MCCodeGenInfo();
104 #include "llvm/Config/Targets.def"
105 }
106
107 /// InitializeAllMCInstrInfos - The main program should call this function
108 /// if it wants access to all available instruction infos for targets that
109 /// LLVM is configured to support, to make them available via the
110 /// TargetRegistry.
111 ///
112 /// It is legal for a client to make multiple calls to this function.
113 inline void InitializeAllMCInstrInfos() {
114 #define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##MCInstrInfo();
115 #include "llvm/Config/Targets.def"
116 }
117
118 /// InitializeAllMCRegisterInfos - The main program should call this function
119 /// if it wants access to all available register infos for targets that
120 /// LLVM is configured to support, to make them available via the
121 /// TargetRegistry.
122 ///
123 /// It is legal for a client to make multiple calls to this function.
124 inline void InitializeAllMCRegisterInfos() {
125 #define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##MCRegisterInfo();
126 #include "llvm/Config/Targets.def"
127 }
128
129 /// InitializeAllMCSubtargetInfos - The main program should call this function
130 /// if it wants access to all available subtarget infos for targets that LLVM
131 /// is configured to support, to make them available via the TargetRegistry.
132 ///
133 /// It is legal for a client to make multiple calls to this function.
134 inline void InitializeAllMCSubtargetInfos() {
135 #define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##MCSubtargetInfo();
75 inline void InitializeAllTargetMCs() {
76 #define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetMC();
13677 #include "llvm/Config/Targets.def"
13778 }
13879
176117 #ifdef LLVM_NATIVE_TARGET
177118 LLVM_NATIVE_TARGETINFO();
178119 LLVM_NATIVE_TARGET();
179 LLVM_NATIVE_MCASMINFO();
180 LLVM_NATIVE_MCCODEGENINFO();
120 LLVM_NATIVE_TARGETMC();
181121 return false;
182122 #else
183123 return true;
4141 #undef LLVM_TARGET /* Explicit undef to make SWIG happier */
4242
4343 #define LLVM_TARGET(TargetName) \
44 void LLVMInitialize##TargetName##MCAsmInfo(void);
45 #include "llvm/Config/Targets.def"
46 #undef LLVM_TARGET /* Explicit undef to make SWIG happier */
47
48 #define LLVM_TARGET(TargetName) \
49 void LLVMInitialize##TargetName##MCCodeGenInfo(void);
44 void LLVMInitialize##TargetName##TargetMC(void);
5045 #include "llvm/Config/Targets.def"
5146 #undef LLVM_TARGET /* Explicit undef to make SWIG happier */
5247
7671 #ifdef LLVM_NATIVE_TARGET
7772 LLVM_NATIVE_TARGETINFO();
7873 LLVM_NATIVE_TARGET();
79 LLVM_NATIVE_MCASMINFO();
80 LLVM_NATIVE_MCCODEGENINFO();
74 LLVM_NATIVE_TARGETMC();
8175 return 0;
8276 #else
8377 return 1;
3636 LLVMSymbolLookupCallback SymbolLookUp) {
3737 // Initialize targets and assembly printers/parsers.
3838 llvm::InitializeAllTargetInfos();
39 llvm::InitializeAllMCAsmInfos();
40 llvm::InitializeAllMCCodeGenInfos();
41 llvm::InitializeAllMCRegisterInfos();
39 llvm::InitializeAllTargetMCs();
4240 llvm::InitializeAllAsmPrinters();
4341 llvm::InitializeAllAsmParsers();
4442 llvm::InitializeAllDisassemblers();
107107
108108 InitializeAllTargetInfos();
109109 InitializeAllTargets();
110 InitializeAllMCCodeGenInfos();
111 InitializeAllMCAsmInfos();
112 InitializeAllMCRegisterInfos();
113 InitializeAllMCSubtargetInfos();
110 InitializeAllTargetMCs();
114111 InitializeAllAsmPrinters();
115112 InitializeAllAsmParsers();
116113 InitializeAllDisassemblers();
177174 TargetMachine.reset(Tgt->createTargetMachine(tripleString, CPU,
178175 featureString));
179176
177 // FIXME: It shouldn't be using TargetRegisterInfo!
180178 const TargetRegisterInfo *registerInfo = TargetMachine->getRegisterInfo();
181179
182180 if (!registerInfo)
9797 return X;
9898 }
9999
100 // Force static initialization.
101 extern "C" void LLVMInitializeARMMCSubtargetInfo() {
102 TargetRegistry::RegisterMCSubtargetInfo(TheARMTarget,
103 ARM_MC::createARMMCSubtargetInfo);
104 TargetRegistry::RegisterMCSubtargetInfo(TheThumbTarget,
105 ARM_MC::createARMMCSubtargetInfo);
106 }
107
108100 static MCInstrInfo *createARMMCInstrInfo() {
109101 MCInstrInfo *X = new MCInstrInfo();
110102 InitARMMCInstrInfo(X);
111103 return X;
112104 }
113105
114 extern "C" void LLVMInitializeARMMCInstrInfo() {
115 TargetRegistry::RegisterMCInstrInfo(TheARMTarget, createARMMCInstrInfo);
116 TargetRegistry::RegisterMCInstrInfo(TheThumbTarget, createARMMCInstrInfo);
117 }
118
119106 static MCRegisterInfo *createARMMCRegisterInfo(StringRef Triple) {
120107 MCRegisterInfo *X = new MCRegisterInfo();
121108 InitARMMCRegisterInfo(X, ARM::LR);
122109 return X;
123 }
124
125 extern "C" void LLVMInitializeARMMCRegisterInfo() {
126 TargetRegistry::RegisterMCRegInfo(TheARMTarget, createARMMCRegisterInfo);
127 TargetRegistry::RegisterMCRegInfo(TheThumbTarget, createARMMCRegisterInfo);
128110 }
129111
130112 static MCAsmInfo *createARMMCAsmInfo(const Target &T, StringRef TT) {
136118 return new ARMELFMCAsmInfo();
137119 }
138120
139 extern "C" void LLVMInitializeARMMCAsmInfo() {
140 // Register the target asm info.
141 RegisterMCAsmInfoFn A(TheARMTarget, createARMMCAsmInfo);
142 RegisterMCAsmInfoFn B(TheThumbTarget, createARMMCAsmInfo);
143 }
144
145121 MCCodeGenInfo *createARMMCCodeGenInfo(StringRef TT, Reloc::Model RM,
146122 CodeModel::Model CM) {
147123 MCCodeGenInfo *X = new MCCodeGenInfo();
151127 return X;
152128 }
153129
154 extern "C" void LLVMInitializeARMMCCodeGenInfo() {
130 // Force static initialization.
131 extern "C" void LLVMInitializeARMTargetMC() {
132 // Register the MC asm info.
133 RegisterMCAsmInfoFn A(TheARMTarget, createARMMCAsmInfo);
134 RegisterMCAsmInfoFn B(TheThumbTarget, createARMMCAsmInfo);
135
136 // Register the MC codegen info.
155137 TargetRegistry::RegisterMCCodeGenInfo(TheARMTarget, createARMMCCodeGenInfo);
156138 TargetRegistry::RegisterMCCodeGenInfo(TheThumbTarget, createARMMCCodeGenInfo);
139
140 // Register the MC instruction info.
141 TargetRegistry::RegisterMCInstrInfo(TheARMTarget, createARMMCInstrInfo);
142 TargetRegistry::RegisterMCInstrInfo(TheThumbTarget, createARMMCInstrInfo);
143
144 // Register the MC register info.
145 TargetRegistry::RegisterMCRegInfo(TheARMTarget, createARMMCRegisterInfo);
146 TargetRegistry::RegisterMCRegInfo(TheThumbTarget, createARMMCRegisterInfo);
147
148 // Register the MC subtarget info.
149 TargetRegistry::RegisterMCSubtargetInfo(TheARMTarget,
150 ARM_MC::createARMMCSubtargetInfo);
151 TargetRegistry::RegisterMCSubtargetInfo(TheThumbTarget,
152 ARM_MC::createARMMCSubtargetInfo);
157153 }
3535 return X;
3636 }
3737
38 extern "C" void LLVMInitializeAlphaMCInstrInfo() {
39 TargetRegistry::RegisterMCInstrInfo(TheAlphaTarget, createAlphaMCInstrInfo);
40 }
41
4238 static MCRegisterInfo *createAlphaMCRegisterInfo(StringRef TT) {
4339 MCRegisterInfo *X = new MCRegisterInfo();
4440 InitAlphaMCRegisterInfo(X, Alpha::R26);
4541 return X;
46 }
47
48 extern "C" void LLVMInitializeAlphaMCRegisterInfo() {
49 TargetRegistry::RegisterMCRegInfo(TheAlphaTarget, createAlphaMCRegisterInfo);
5042 }
5143
5244 static MCSubtargetInfo *createAlphaMCSubtargetInfo(StringRef TT, StringRef CPU,
5648 return X;
5749 }
5850
59 extern "C" void LLVMInitializeAlphaMCSubtargetInfo() {
60 TargetRegistry::RegisterMCSubtargetInfo(TheAlphaTarget,
61 createAlphaMCSubtargetInfo);
62 }
63
64 extern "C" void LLVMInitializeAlphaMCAsmInfo() {
65 RegisterMCAsmInfo X(TheAlphaTarget);
66 }
67
6851 MCCodeGenInfo *createAlphaMCCodeGenInfo(StringRef TT, Reloc::Model RM,
6952 CodeModel::Model CM) {
7053 MCCodeGenInfo *X = new MCCodeGenInfo();
7255 return X;
7356 }
7457
75 extern "C" void LLVMInitializeAlphaMCCodeGenInfo() {
58 // Force static initialization.
59 extern "C" void LLVMInitializeAlphaTargetMC() {
60 // Register the MC asm info.
61 RegisterMCAsmInfo X(TheAlphaTarget);
62
63 // Register the MC codegen info.
7664 TargetRegistry::RegisterMCCodeGenInfo(TheAlphaTarget,
7765 createAlphaMCCodeGenInfo);
66
67 // Register the MC instruction info.
68 TargetRegistry::RegisterMCInstrInfo(TheAlphaTarget, createAlphaMCInstrInfo);
69
70 // Register the MC register info.
71 TargetRegistry::RegisterMCRegInfo(TheAlphaTarget, createAlphaMCRegisterInfo);
72
73 // Register the MC subtarget info.
74 TargetRegistry::RegisterMCSubtargetInfo(TheAlphaTarget,
75 createAlphaMCSubtargetInfo);
7876 }
79
3535 return X;
3636 }
3737
38 extern "C" void LLVMInitializeBlackfinMCInstrInfo() {
39 TargetRegistry::RegisterMCInstrInfo(TheBlackfinTarget,
40 createBlackfinMCInstrInfo);
41 }
42
4338 static MCRegisterInfo *createBlackfinMCRegisterInfo(StringRef TT) {
4439 MCRegisterInfo *X = new MCRegisterInfo();
4540 InitBlackfinMCRegisterInfo(X, BF::RETS);
4641 return X;
47 }
48
49 extern "C" void LLVMInitializeBlackfinMCRegisterInfo() {
50 TargetRegistry::RegisterMCRegInfo(TheBlackfinTarget,
51 createBlackfinMCRegisterInfo);
5242 }
5343
5444 static MCSubtargetInfo *createBlackfinMCSubtargetInfo(StringRef TT,
5949 return X;
6050 }
6151
62 extern "C" void LLVMInitializeBlackfinMCSubtargetInfo() {
63 TargetRegistry::RegisterMCSubtargetInfo(TheBlackfinTarget,
64 createBlackfinMCSubtargetInfo);
65 }
66
67 extern "C" void LLVMInitializeBlackfinMCAsmInfo() {
68 RegisterMCAsmInfo X(TheBlackfinTarget);
69 }
70
7152 MCCodeGenInfo *createBlackfinMCCodeGenInfo(StringRef TT, Reloc::Model RM,
7253 CodeModel::Model CM) {
7354 MCCodeGenInfo *X = new MCCodeGenInfo();
7556 return X;
7657 }
7758
78 extern "C" void LLVMInitializeBlackfinMCCodeGenInfo() {
59 // Force static initialization.
60 extern "C" void LLVMInitializeBlackfinTargetMC() {
61 // Register the MC asm info.
62 RegisterMCAsmInfo X(TheBlackfinTarget);
63
64 // Register the MC codegen info.
7965 TargetRegistry::RegisterMCCodeGenInfo(TheBlackfinTarget,
8066 createBlackfinMCCodeGenInfo);
67
68 // Register the MC instruction info.
69 TargetRegistry::RegisterMCInstrInfo(TheBlackfinTarget,
70 createBlackfinMCInstrInfo);
71
72 // Register the MC register info.
73 TargetRegistry::RegisterMCRegInfo(TheBlackfinTarget,
74 createBlackfinMCRegisterInfo);
75
76 // Register the MC subtarget info.
77 TargetRegistry::RegisterMCSubtargetInfo(TheBlackfinTarget,
78 createBlackfinMCSubtargetInfo);
8179 }
6363 RegisterTargetMachine X(TheCBackendTarget);
6464 }
6565
66 extern "C" void LLVMInitializeCBackendMCAsmInfo() {}
67
68 extern "C" void LLVMInitializeCBackendMCRegisterInfo() {}
69
70 extern "C" void LLVMInitializeCBackendMCInstrInfo() {}
71
72 extern "C" void LLVMInitializeCBackendMCSubtargetInfo() {}
73
74 extern "C" void LLVMInitializeCBackendMCCodeGenInfo() {}
66 extern "C" void LLVMInitializeCBackendTargetMC() {}
7567
7668 namespace {
7769 class CBEMCAsmInfo : public MCAsmInfo {
3535 return X;
3636 }
3737
38 extern "C" void LLVMInitializeCellSPUMCInstrInfo() {
39 TargetRegistry::RegisterMCInstrInfo(TheCellSPUTarget, createSPUMCInstrInfo);
40 }
41
4238 static MCRegisterInfo *createCellSPUMCRegisterInfo(StringRef TT) {
4339 MCRegisterInfo *X = new MCRegisterInfo();
4440 InitSPUMCRegisterInfo(X, SPU::R0);
4541 return X;
46 }
47
48 extern "C" void LLVMInitializeCellSPUMCRegisterInfo() {
49 TargetRegistry::RegisterMCRegInfo(TheCellSPUTarget,
50 createCellSPUMCRegisterInfo);
5142 }
5243
5344 static MCSubtargetInfo *createSPUMCSubtargetInfo(StringRef TT, StringRef CPU,
5546 MCSubtargetInfo *X = new MCSubtargetInfo();
5647 InitSPUMCSubtargetInfo(X, TT, CPU, FS);
5748 return X;
58 }
59
60 extern "C" void LLVMInitializeCellSPUMCSubtargetInfo() {
61 TargetRegistry::RegisterMCSubtargetInfo(TheCellSPUTarget,
62 createSPUMCSubtargetInfo);
6349 }
6450
6551 static MCAsmInfo *createSPUMCAsmInfo(const Target &T, StringRef TT) {
7359 return MAI;
7460 }
7561
76 extern "C" void LLVMInitializeCellSPUMCAsmInfo() {
77 RegisterMCAsmInfoFn X(TheCellSPUTarget, createSPUMCAsmInfo);
78 }
79
8062 MCCodeGenInfo *createSPUMCCodeGenInfo(StringRef TT, Reloc::Model RM,
8163 CodeModel::Model CM) {
8264 MCCodeGenInfo *X = new MCCodeGenInfo();
8668 return X;
8769 }
8870
89 extern "C" void LLVMInitializeCellSPUMCCodeGenInfo() {
71 // Force static initialization.
72 extern "C" void LLVMInitializeCellSPUTargetMC() {
73 // Register the MC asm info.
74 RegisterMCAsmInfoFn X(TheCellSPUTarget, createSPUMCAsmInfo);
75
76 // Register the MC codegen info.
9077 TargetRegistry::RegisterMCCodeGenInfo(TheCellSPUTarget,
9178 createSPUMCCodeGenInfo);
79
80 // Register the MC instruction info.
81 TargetRegistry::RegisterMCInstrInfo(TheCellSPUTarget, createSPUMCInstrInfo);
82
83 // Register the MC register info.
84 TargetRegistry::RegisterMCRegInfo(TheCellSPUTarget,
85 createCellSPUMCRegisterInfo);
86
87 // Register the MC subtarget info.
88 TargetRegistry::RegisterMCSubtargetInfo(TheCellSPUTarget,
89 createSPUMCSubtargetInfo);
9290 }
7676 RegisterTargetMachine X(TheCppBackendTarget);
7777 }
7878
79 extern "C" void LLVMInitializeCppBackendMCAsmInfo() {}
80
81 extern "C" void LLVMInitializeCppBackendMCRegisterInfo() {}
82
83 extern "C" void LLVMInitializeCppBackendMCInstrInfo() {}
84
85 extern "C" void LLVMInitializeCppBackendMCSubtargetInfo() {}
86
87 extern "C" void LLVMInitializeCppBackendMCCodeGenInfo() {}
79 extern "C" void LLVMInitializeCppBackendTargetMC() {}
8880
8981 namespace {
9082 typedef std::vector TypeList;
3535 return X;
3636 }
3737
38 extern "C" void LLVMInitializeMBlazeMCInstrInfo() {
39 TargetRegistry::RegisterMCInstrInfo(TheMBlazeTarget, createMBlazeMCInstrInfo);
40 }
41
4238 static MCRegisterInfo *createMBlazeMCRegisterInfo(StringRef TT) {
4339 MCRegisterInfo *X = new MCRegisterInfo();
4440 InitMBlazeMCRegisterInfo(X, MBlaze::R15);
4541 return X;
46 }
47
48 extern "C" void LLVMInitializeMBlazeMCRegisterInfo() {
49 TargetRegistry::RegisterMCRegInfo(TheMBlazeTarget,
50 createMBlazeMCRegisterInfo);
5142 }
5243
5344 static MCSubtargetInfo *createMBlazeMCSubtargetInfo(StringRef TT, StringRef CPU,
5748 return X;
5849 }
5950
60 extern "C" void LLVMInitializeMBlazeMCSubtargetInfo() {
61 TargetRegistry::RegisterMCSubtargetInfo(TheMBlazeTarget,
62 createMBlazeMCSubtargetInfo);
63 }
64
6551 static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
6652 Triple TheTriple(TT);
6753 switch (TheTriple.getOS()) {
6854 default:
6955 return new MBlazeMCAsmInfo();
7056 }
71 }
72
73 extern "C" void LLVMInitializeMBlazeMCAsmInfo() {
74 RegisterMCAsmInfoFn X(TheMBlazeTarget, createMCAsmInfo);
7557 }
7658
7759 MCCodeGenInfo *createMBlazeMCCodeGenInfo(StringRef TT, Reloc::Model RM,
8567 return X;
8668 }
8769
88 extern "C" void LLVMInitializeMBlazeMCCodeGenInfo() {
70 // Force static initialization.
71 extern "C" void LLVMInitializeMBlazeTargetMC() {
72 // Register the MC asm info.
73 RegisterMCAsmInfoFn X(TheMBlazeTarget, createMCAsmInfo);
74
75 // Register the MC codegen info.
8976 TargetRegistry::RegisterMCCodeGenInfo(TheMBlazeTarget,
9077 createMBlazeMCCodeGenInfo);
78
79 // Register the MC instruction info.
80 TargetRegistry::RegisterMCInstrInfo(TheMBlazeTarget, createMBlazeMCInstrInfo);
81
82 // Register the MC register info.
83 TargetRegistry::RegisterMCRegInfo(TheMBlazeTarget,
84 createMBlazeMCRegisterInfo);
85
86 // Register the MC subtarget info.
87 TargetRegistry::RegisterMCSubtargetInfo(TheMBlazeTarget,
88 createMBlazeMCSubtargetInfo);
9189 }
3434 return X;
3535 }
3636
37 extern "C" void LLVMInitializeMSP430MCInstrInfo() {
38 TargetRegistry::RegisterMCInstrInfo(TheMSP430Target, createMSP430MCInstrInfo);
39 }
40
41
4237 static MCRegisterInfo *createMSP430MCRegisterInfo(StringRef TT) {
4338 MCRegisterInfo *X = new MCRegisterInfo();
4439 InitMSP430MCRegisterInfo(X, MSP430::PCW);
4540 return X;
46 }
47
48 extern "C" void LLVMInitializeMSP430MCRegisterInfo() {
49 TargetRegistry::RegisterMCRegInfo(TheMSP430Target,
50 createMSP430MCRegisterInfo);
5141 }
5242
5343 static MCSubtargetInfo *createMSP430MCSubtargetInfo(StringRef TT, StringRef CPU,
5747 return X;
5848 }
5949
60 extern "C" void LLVMInitializeMSP430MCSubtargetInfo() {
61 TargetRegistry::RegisterMCSubtargetInfo(TheMSP430Target,
62 createMSP430MCSubtargetInfo);
63 }
64
65 extern "C" void LLVMInitializeMSP430MCAsmInfo() {
66 RegisterMCAsmInfo X(TheMSP430Target);
67 }
68
6950 MCCodeGenInfo *createMSP430MCCodeGenInfo(StringRef TT, Reloc::Model RM,
7051 CodeModel::Model CM) {
7152 MCCodeGenInfo *X = new MCCodeGenInfo();
7354 return X;
7455 }
7556
76 extern "C" void LLVMInitializeMSP430MCCodeGenInfo() {
57 extern "C" void LLVMInitializeMSP430TargetMC() {
58 // Register the MC asm info.
59 RegisterMCAsmInfo X(TheMSP430Target);
60
61 // Register the MC codegen info.
7762 TargetRegistry::RegisterMCCodeGenInfo(TheMSP430Target,
7863 createMSP430MCCodeGenInfo);
64
65 // Register the MC instruction info.
66 TargetRegistry::RegisterMCInstrInfo(TheMSP430Target, createMSP430MCInstrInfo);
67
68 // Register the MC register info.
69 TargetRegistry::RegisterMCRegInfo(TheMSP430Target,
70 createMSP430MCRegisterInfo);
71
72 // Register the MC subtarget info.
73 TargetRegistry::RegisterMCSubtargetInfo(TheMSP430Target,
74 createMSP430MCSubtargetInfo);
7975 }
3535 return X;
3636 }
3737
38 extern "C" void LLVMInitializeMipsMCInstrInfo() {
39 TargetRegistry::RegisterMCInstrInfo(TheMipsTarget, createMipsMCInstrInfo);
40 }
41
4238 static MCRegisterInfo *createMipsMCRegisterInfo(StringRef TT) {
4339 MCRegisterInfo *X = new MCRegisterInfo();
4440 InitMipsMCRegisterInfo(X, Mips::RA);
4541 return X;
46 }
47
48 extern "C" void LLVMInitializeMipsMCRegisterInfo() {
49 TargetRegistry::RegisterMCRegInfo(TheMipsTarget, createMipsMCRegisterInfo);
50 TargetRegistry::RegisterMCRegInfo(TheMipselTarget, createMipsMCRegisterInfo);
5142 }
5243
5344 static MCSubtargetInfo *createMipsMCSubtargetInfo(StringRef TT, StringRef CPU,
5546 MCSubtargetInfo *X = new MCSubtargetInfo();
5647 InitMipsMCSubtargetInfo(X, TT, CPU, FS);
5748 return X;
58 }
59
60 extern "C" void LLVMInitializeMipsMCSubtargetInfo() {
61 TargetRegistry::RegisterMCSubtargetInfo(TheMipsTarget,
62 createMipsMCSubtargetInfo);
6349 }
6450
6551 static MCAsmInfo *createMipsMCAsmInfo(const Target &T, StringRef TT) {
7056 MAI->addInitialFrameState(0, Dst, Src);
7157
7258 return MAI;
73 }
74
75 extern "C" void LLVMInitializeMipsMCAsmInfo() {
76 RegisterMCAsmInfoFn X(TheMipsTarget, createMipsMCAsmInfo);
77 RegisterMCAsmInfoFn Y(TheMipselTarget, createMipsMCAsmInfo);
7859 }
7960
8061 MCCodeGenInfo *createMipsMCCodeGenInfo(StringRef TT, Reloc::Model RM,
9273 return X;
9374 }
9475
95 extern "C" void LLVMInitializeMipsMCCodeGenInfo() {
76 extern "C" void LLVMInitializeMipsTargetMC() {
77 // Register the MC asm info.
78 RegisterMCAsmInfoFn X(TheMipsTarget, createMipsMCAsmInfo);
79 RegisterMCAsmInfoFn Y(TheMipselTarget, createMipsMCAsmInfo);
80
81 // Register the MC codegen info.
9682 TargetRegistry::RegisterMCCodeGenInfo(TheMipsTarget,
9783 createMipsMCCodeGenInfo);
9884 TargetRegistry::RegisterMCCodeGenInfo(TheMipselTarget,
9985 createMipsMCCodeGenInfo);
86
87 // Register the MC instruction info.
88 TargetRegistry::RegisterMCInstrInfo(TheMipsTarget, createMipsMCInstrInfo);
89
90 // Register the MC register info.
91 TargetRegistry::RegisterMCRegInfo(TheMipsTarget, createMipsMCRegisterInfo);
92 TargetRegistry::RegisterMCRegInfo(TheMipselTarget, createMipsMCRegisterInfo);
93
94 // Register the MC subtarget info.
95 TargetRegistry::RegisterMCSubtargetInfo(TheMipsTarget,
96 createMipsMCSubtargetInfo);
10097 }
3434 return X;
3535 }
3636
37 extern "C" void LLVMInitializePTXMCInstrInfo() {
38 TargetRegistry::RegisterMCInstrInfo(ThePTX32Target, createPTXMCInstrInfo);
39 TargetRegistry::RegisterMCInstrInfo(ThePTX64Target, createPTXMCInstrInfo);
40 }
41
4237 static MCRegisterInfo *createPTXMCRegisterInfo(StringRef TT) {
4338 MCRegisterInfo *X = new MCRegisterInfo();
4439 // PTX does not have a return address register.
4540 InitPTXMCRegisterInfo(X, 0);
4641 return X;
47 }
48
49 extern "C" void LLVMInitializePTXMCRegisterInfo() {
50 TargetRegistry::RegisterMCRegInfo(ThePTX32Target, createPTXMCRegisterInfo);
51 TargetRegistry::RegisterMCRegInfo(ThePTX64Target, createPTXMCRegisterInfo);
5242 }
5343
5444 static MCSubtargetInfo *createPTXMCSubtargetInfo(StringRef TT, StringRef CPU,
5848 return X;
5949 }
6050
61 extern "C" void LLVMInitializePTXMCSubtargetInfo() {
62 TargetRegistry::RegisterMCSubtargetInfo(ThePTX32Target,
63 createPTXMCSubtargetInfo);
64 TargetRegistry::RegisterMCSubtargetInfo(ThePTX64Target,
65 createPTXMCSubtargetInfo);
66 }
67
68 extern "C" void LLVMInitializePTXMCAsmInfo() {
69 RegisterMCAsmInfo X(ThePTX32Target);
70 RegisterMCAsmInfo Y(ThePTX64Target);
71 }
72
7351 MCCodeGenInfo *createPTXMCCodeGenInfo(StringRef TT, Reloc::Model RM,
7452 CodeModel::Model CM) {
7553 MCCodeGenInfo *X = new MCCodeGenInfo();
7755 return X;
7856 }
7957
80 extern "C" void LLVMInitializePTXMCCodeGenInfo() {
58 extern "C" void LLVMInitializePTXTargetMC() {
59 // Register the MC asm info.
60 RegisterMCAsmInfo X(ThePTX32Target);
61 RegisterMCAsmInfo Y(ThePTX64Target);
62
63 // Register the MC codegen info.
8164 TargetRegistry::RegisterMCCodeGenInfo(ThePTX32Target, createPTXMCCodeGenInfo);
8265 TargetRegistry::RegisterMCCodeGenInfo(ThePTX64Target, createPTXMCCodeGenInfo);
66
67 // Register the MC instruction info.
68 TargetRegistry::RegisterMCInstrInfo(ThePTX32Target, createPTXMCInstrInfo);
69 TargetRegistry::RegisterMCInstrInfo(ThePTX64Target, createPTXMCInstrInfo);
70
71 // Register the MC register info.
72 TargetRegistry::RegisterMCRegInfo(ThePTX32Target, createPTXMCRegisterInfo);
73 TargetRegistry::RegisterMCRegInfo(ThePTX64Target, createPTXMCRegisterInfo);
74
75 // Register the MC subtarget info.
76 TargetRegistry::RegisterMCSubtargetInfo(ThePTX32Target,
77 createPTXMCSubtargetInfo);
78 TargetRegistry::RegisterMCSubtargetInfo(ThePTX64Target,
79 createPTXMCSubtargetInfo);
8380 }
3535 return X;
3636 }
3737
38 extern "C" void LLVMInitializePowerPCMCInstrInfo() {
39 TargetRegistry::RegisterMCInstrInfo(ThePPC32Target, createPPCMCInstrInfo);
40 TargetRegistry::RegisterMCInstrInfo(ThePPC64Target, createPPCMCInstrInfo);
41 }
42
4338 static MCRegisterInfo *createPPCMCRegisterInfo(StringRef TT) {
4439 Triple TheTriple(TT);
4540 bool isPPC64 = (TheTriple.getArch() == Triple::ppc64);
5146 return X;
5247 }
5348
54 extern "C" void LLVMInitializePowerPCMCRegisterInfo() {
55 TargetRegistry::RegisterMCRegInfo(ThePPC32Target, createPPCMCRegisterInfo);
56 TargetRegistry::RegisterMCRegInfo(ThePPC64Target, createPPCMCRegisterInfo);
57 }
58
5949 static MCSubtargetInfo *createPPCMCSubtargetInfo(StringRef TT, StringRef CPU,
6050 StringRef FS) {
6151 MCSubtargetInfo *X = new MCSubtargetInfo();
6252 InitPPCMCSubtargetInfo(X, TT, CPU, FS);
6353 return X;
64 }
65
66 extern "C" void LLVMInitializePowerPCMCSubtargetInfo() {
67 TargetRegistry::RegisterMCSubtargetInfo(ThePPC32Target,
68 createPPCMCSubtargetInfo);
69 TargetRegistry::RegisterMCSubtargetInfo(ThePPC64Target,
70 createPPCMCSubtargetInfo);
7154 }
7255
7356 static MCAsmInfo *createPPCMCAsmInfo(const Target &T, StringRef TT) {
8871 return MAI;
8972 }
9073
91 extern "C" void LLVMInitializePowerPCMCAsmInfo() {
92 RegisterMCAsmInfoFn C(ThePPC32Target, createPPCMCAsmInfo);
93 RegisterMCAsmInfoFn D(ThePPC64Target, createPPCMCAsmInfo);
94 }
95
9674 MCCodeGenInfo *createPPCMCCodeGenInfo(StringRef TT, Reloc::Model RM,
9775 CodeModel::Model CM) {
9876 MCCodeGenInfo *X = new MCCodeGenInfo();
10886 return X;
10987 }
11088
111 extern "C" void LLVMInitializePowerPCMCCodeGenInfo() {
89 extern "C" void LLVMInitializePowerPCTargetMC() {
90 // Register the MC asm info.
91 RegisterMCAsmInfoFn C(ThePPC32Target, createPPCMCAsmInfo);
92 RegisterMCAsmInfoFn D(ThePPC64Target, createPPCMCAsmInfo);
93
94 // Register the MC codegen info.
11295 TargetRegistry::RegisterMCCodeGenInfo(ThePPC32Target, createPPCMCCodeGenInfo);
11396 TargetRegistry::RegisterMCCodeGenInfo(ThePPC64Target, createPPCMCCodeGenInfo);
97
98 // Register the MC instruction info.
99 TargetRegistry::RegisterMCInstrInfo(ThePPC32Target, createPPCMCInstrInfo);
100 TargetRegistry::RegisterMCInstrInfo(ThePPC64Target, createPPCMCInstrInfo);
101
102 // Register the MC register info.
103 TargetRegistry::RegisterMCRegInfo(ThePPC32Target, createPPCMCRegisterInfo);
104 TargetRegistry::RegisterMCRegInfo(ThePPC64Target, createPPCMCRegisterInfo);
105
106 // Register the MC subtarget info.
107 TargetRegistry::RegisterMCSubtargetInfo(ThePPC32Target,
108 createPPCMCSubtargetInfo);
109 TargetRegistry::RegisterMCSubtargetInfo(ThePPC64Target,
110 createPPCMCSubtargetInfo);
114111 }
3434 return X;
3535 }
3636
37 extern "C" void LLVMInitializeSparcMCInstrInfo() {
38 TargetRegistry::RegisterMCInstrInfo(TheSparcTarget, createSparcMCInstrInfo);
39 }
40
4137 static MCRegisterInfo *createSparcMCRegisterInfo(StringRef TT) {
4238 MCRegisterInfo *X = new MCRegisterInfo();
4339 InitSparcMCRegisterInfo(X, SP::I7);
4440 return X;
45 }
46
47 extern "C" void LLVMInitializeSparcMCRegisterInfo() {
48 TargetRegistry::RegisterMCRegInfo(TheSparcTarget, createSparcMCRegisterInfo);
4941 }
5042
5143 static MCSubtargetInfo *createSparcMCSubtargetInfo(StringRef TT, StringRef CPU,
5547 return X;
5648 }
5749
58 extern "C" void LLVMInitializeSparcMCSubtargetInfo() {
59 TargetRegistry::RegisterMCSubtargetInfo(TheSparcTarget,
60 createSparcMCSubtargetInfo);
61 }
62
63 extern "C" void LLVMInitializeSparcMCAsmInfo() {
64 RegisterMCAsmInfo X(TheSparcTarget);
65 RegisterMCAsmInfo Y(TheSparcV9Target);
66 }
67
6850 MCCodeGenInfo *createSparcMCCodeGenInfo(StringRef TT, Reloc::Model RM,
6951 CodeModel::Model CM) {
7052 MCCodeGenInfo *X = new MCCodeGenInfo();
7254 return X;
7355 }
7456
75 extern "C" void LLVMInitializeSparcMCCodeGenInfo() {
57 extern "C" void LLVMInitializeSparcTargetMC() {
58 // Register the MC asm info.
59 RegisterMCAsmInfo X(TheSparcTarget);
60 RegisterMCAsmInfo Y(TheSparcV9Target);
61
62 // Register the MC codegen info.
7663 TargetRegistry::RegisterMCCodeGenInfo(TheSparcTarget,
7764 createSparcMCCodeGenInfo);
7865 TargetRegistry::RegisterMCCodeGenInfo(TheSparcV9Target,
7966 createSparcMCCodeGenInfo);
67
68 // Register the MC instruction info.
69 TargetRegistry::RegisterMCInstrInfo(TheSparcTarget, createSparcMCInstrInfo);
70
71 // Register the MC register info.
72 TargetRegistry::RegisterMCRegInfo(TheSparcTarget, createSparcMCRegisterInfo);
73
74 // Register the MC subtarget info.
75 TargetRegistry::RegisterMCSubtargetInfo(TheSparcTarget,
76 createSparcMCSubtargetInfo);
8077 }
81
3434 return X;
3535 }
3636
37 extern "C" void LLVMInitializeSystemZMCInstrInfo() {
38 TargetRegistry::RegisterMCInstrInfo(TheSystemZTarget,
39 createSystemZMCInstrInfo);
40 }
41
4237 static MCRegisterInfo *createSystemZMCRegisterInfo(StringRef TT) {
4338 MCRegisterInfo *X = new MCRegisterInfo();
4439 InitSystemZMCRegisterInfo(X, 0);
4540 return X;
46 }
47
48 extern "C" void LLVMInitializeSystemZMCRegisterInfo() {
49 TargetRegistry::RegisterMCRegInfo(TheSystemZTarget,
50 createSystemZMCRegisterInfo);
5141 }
5242
5343 static MCSubtargetInfo *createSystemZMCSubtargetInfo(StringRef TT,
5646 MCSubtargetInfo *X = new MCSubtargetInfo();
5747 InitSystemZMCSubtargetInfo(X, TT, CPU, FS);
5848 return X;
59 }
60
61 extern "C" void LLVMInitializeSystemZMCSubtargetInfo() {
62 TargetRegistry::RegisterMCSubtargetInfo(TheSystemZTarget,
63 createSystemZMCSubtargetInfo);
64 }
65
66 extern "C" void LLVMInitializeSystemZMCAsmInfo() {
67 RegisterMCAsmInfo X(TheSystemZTarget);
6849 }
6950
7051 MCCodeGenInfo *createSystemZMCCodeGenInfo(StringRef TT, Reloc::Model RM,
7657 return X;
7758 }
7859
79 extern "C" void LLVMInitializeSystemZMCCodeGenInfo() {
60 extern "C" void LLVMInitializeSystemZTargetMC() {
61 // Register the MC asm info.
62 RegisterMCAsmInfo X(TheSystemZTarget);
63
64 // Register the MC codegen info.
8065 TargetRegistry::RegisterMCCodeGenInfo(TheSystemZTarget,
8166 createSystemZMCCodeGenInfo);
67
68 // Register the MC instruction info.
69 TargetRegistry::RegisterMCInstrInfo(TheSystemZTarget,
70 createSystemZMCInstrInfo);
71
72 // Register the MC register info.
73 TargetRegistry::RegisterMCRegInfo(TheSystemZTarget,
74 createSystemZMCRegisterInfo);
75
76 // Register the MC subtarget info.
77 TargetRegistry::RegisterMCSubtargetInfo(TheSystemZTarget,
78 createSystemZMCSubtargetInfo);
8279 }
260260 return X;
261261 }
262262
263 // Force static initialization.
264 extern "C" void LLVMInitializeX86MCSubtargetInfo() {
265 TargetRegistry::RegisterMCSubtargetInfo(TheX86_32Target,
266 X86_MC::createX86MCSubtargetInfo);
267 TargetRegistry::RegisterMCSubtargetInfo(TheX86_64Target,
268 X86_MC::createX86MCSubtargetInfo);
269 }
270
271263 static MCInstrInfo *createX86MCInstrInfo() {
272264 MCInstrInfo *X = new MCInstrInfo();
273265 InitX86MCInstrInfo(X);
274266 return X;
275 }
276
277 extern "C" void LLVMInitializeX86MCInstrInfo() {
278 TargetRegistry::RegisterMCInstrInfo(TheX86_32Target, createX86MCInstrInfo);
279 TargetRegistry::RegisterMCInstrInfo(TheX86_64Target, createX86MCInstrInfo);
280267 }
281268
282269 static MCRegisterInfo *createX86MCRegisterInfo(StringRef TT) {
292279 X86_MC::InitLLVM2SEHRegisterMapping(X);
293280 return X;
294281 }
295
296 extern "C" void LLVMInitializeX86MCRegisterInfo() {
297 TargetRegistry::RegisterMCRegInfo(TheX86_32Target, createX86MCRegisterInfo);
298 TargetRegistry::RegisterMCRegInfo(TheX86_64Target, createX86MCRegisterInfo);
299 }
300
301282
302283 static MCAsmInfo *createX86MCAsmInfo(const Target &T, StringRef TT) {
303284 Triple TheTriple(TT);
330311 MAI->addInitialFrameState(0, CSDst, CSSrc);
331312
332313 return MAI;
333 }
334
335 extern "C" void LLVMInitializeX86MCAsmInfo() {
336 // Register the target asm info.
337 RegisterMCAsmInfoFn A(TheX86_32Target, createX86MCAsmInfo);
338 RegisterMCAsmInfoFn B(TheX86_64Target, createX86MCAsmInfo);
339314 }
340315
341316 MCCodeGenInfo *createX86MCCodeGenInfo(StringRef TT, Reloc::Model RM,
387362 return X;
388363 }
389364
390 extern "C" void LLVMInitializeX86MCCodeGenInfo() {
391 // Register the target asm info.
392 RegisterMCCodeGenInfoFn A(TheX86_32Target, createX86MCCodeGenInfo);
393 RegisterMCCodeGenInfoFn B(TheX86_64Target, createX86MCCodeGenInfo);
394 }
365 // Force static initialization.
366 extern "C" void LLVMInitializeX86TargetMC() {
367 // Register the MC asm info.
368 RegisterMCAsmInfoFn A(TheX86_32Target, createX86MCAsmInfo);
369 RegisterMCAsmInfoFn B(TheX86_64Target, createX86MCAsmInfo);
370
371 // Register the MC codegen info.
372 RegisterMCCodeGenInfoFn C(TheX86_32Target, createX86MCCodeGenInfo);
373 RegisterMCCodeGenInfoFn D(TheX86_64Target, createX86MCCodeGenInfo);
374
375 // Register the MC instruction info.
376 TargetRegistry::RegisterMCInstrInfo(TheX86_32Target, createX86MCInstrInfo);
377 TargetRegistry::RegisterMCInstrInfo(TheX86_64Target, createX86MCInstrInfo);
378
379 // Register the MC register info.
380 TargetRegistry::RegisterMCRegInfo(TheX86_32Target, createX86MCRegisterInfo);
381 TargetRegistry::RegisterMCRegInfo(TheX86_64Target, createX86MCRegisterInfo);
382
383 // Register the MC subtarget info.
384 TargetRegistry::RegisterMCSubtargetInfo(TheX86_32Target,
385 X86_MC::createX86MCSubtargetInfo);
386 TargetRegistry::RegisterMCSubtargetInfo(TheX86_64Target,
387 X86_MC::createX86MCSubtargetInfo);
388 }
3434 return X;
3535 }
3636
37 extern "C" void LLVMInitializeXCoreMCInstrInfo() {
38 TargetRegistry::RegisterMCInstrInfo(TheXCoreTarget, createXCoreMCInstrInfo);
39 }
40
4137 static MCRegisterInfo *createXCoreMCRegisterInfo(StringRef TT) {
4238 MCRegisterInfo *X = new MCRegisterInfo();
4339 InitXCoreMCRegisterInfo(X, XCore::LR);
4440 return X;
45 }
46
47 extern "C" void LLVMInitializeXCoreMCRegisterInfo() {
48 TargetRegistry::RegisterMCRegInfo(TheXCoreTarget, createXCoreMCRegisterInfo);
4941 }
5042
5143 static MCSubtargetInfo *createXCoreMCSubtargetInfo(StringRef TT, StringRef CPU,
5345 MCSubtargetInfo *X = new MCSubtargetInfo();
5446 InitXCoreMCSubtargetInfo(X, TT, CPU, FS);
5547 return X;
56 }
57
58 extern "C" void LLVMInitializeXCoreMCSubtargetInfo() {
59 TargetRegistry::RegisterMCSubtargetInfo(TheXCoreTarget,
60 createXCoreMCSubtargetInfo);
6148 }
6249
6350 static MCAsmInfo *createXCoreMCAsmInfo(const Target &T, StringRef TT) {
7158 return MAI;
7259 }
7360
74 extern "C" void LLVMInitializeXCoreMCAsmInfo() {
75 RegisterMCAsmInfoFn X(TheXCoreTarget, createXCoreMCAsmInfo);
76 }
77
7861 MCCodeGenInfo *createXCoreMCCodeGenInfo(StringRef TT, Reloc::Model RM,
7962 CodeModel::Model CM) {
8063 MCCodeGenInfo *X = new MCCodeGenInfo();
8265 return X;
8366 }
8467
85 extern "C" void LLVMInitializeXCoreMCCodeGenInfo() {
68 // Force static initialization.
69 extern "C" void LLVMInitializeXCoreTargetMC() {
70 // Register the MC asm info.
71 RegisterMCAsmInfoFn X(TheXCoreTarget, createXCoreMCAsmInfo);
72
73 // Register the MC codegen info.
8674 TargetRegistry::RegisterMCCodeGenInfo(TheXCoreTarget,
8775 createXCoreMCCodeGenInfo);
76
77 // Register the MC instruction info.
78 TargetRegistry::RegisterMCInstrInfo(TheXCoreTarget, createXCoreMCInstrInfo);
79
80 // Register the MC register info.
81 TargetRegistry::RegisterMCRegInfo(TheXCoreTarget, createXCoreMCRegisterInfo);
82
83 // Register the MC subtarget info.
84 TargetRegistry::RegisterMCSubtargetInfo(TheXCoreTarget,
85 createXCoreMCSubtargetInfo);
8886 }
231231
232232 // Initialize targets first, so that --version shows registered targets.
233233 InitializeAllTargets();
234 InitializeAllMCAsmInfos();
235 InitializeAllMCCodeGenInfos();
236 InitializeAllMCSubtargetInfos();
234 InitializeAllTargetMCs();
237235 InitializeAllAsmPrinters();
238236 InitializeAllAsmParsers();
239237
453453 llvm::InitializeAllTargetInfos();
454454 // FIXME: We shouldn't need to initialize the Target(Machine)s.
455455 llvm::InitializeAllTargets();
456 llvm::InitializeAllMCAsmInfos();
457 llvm::InitializeAllMCCodeGenInfos();
458 llvm::InitializeAllMCInstrInfos();
459 llvm::InitializeAllMCRegisterInfos();
460 llvm::InitializeAllMCSubtargetInfos();
456 llvm::InitializeAllTargetMCs();
461457 llvm::InitializeAllAsmPrinters();
462458 llvm::InitializeAllAsmParsers();
463459 llvm::InitializeAllDisassemblers();
309309 llvm::InitializeAllTargetInfos();
310310 // FIXME: We shouldn't need to initialize the Target(Machine)s.
311311 llvm::InitializeAllTargets();
312 llvm::InitializeAllMCAsmInfos();
313 llvm::InitializeAllMCCodeGenInfos();
314 llvm::InitializeAllMCInstrInfos();
312 llvm::InitializeAllTargetMCs();
315313 llvm::InitializeAllAsmPrinters();
316314 llvm::InitializeAllAsmParsers();
317315 llvm::InitializeAllDisassemblers();
7373 _nativeObjectFile(NULL)
7474 {
7575 InitializeAllTargets();
76 InitializeAllMCAsmInfos();
77 InitializeAllMCCodeGenInfos();
78 InitializeAllMCRegisterInfos();
79 InitializeAllMCSubtargetInfos();
76 InitializeAllTargetMCs();
8077 InitializeAllAsmPrinters();
8178 }
8279
135135 static bool Initialized = false;
136136 if (!Initialized) {
137137 InitializeAllTargets();
138 InitializeAllMCCodeGenInfos();
139 InitializeAllMCAsmInfos();
140 InitializeAllMCSubtargetInfos();
138 InitializeAllTargetMCs();
141139 InitializeAllAsmParsers();
142140 Initialized = true;
143141 }