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Disallow matching "i" constraint to symbol addresses when address requires a register or secondary load to compute (most PIC modes). This improves "g" constraint handling. 8015842. The test from 2007 is attempting to test the fix for PR1761, but since -relocation-model=static doesn't work on Darwin x86-64, it was not testing what it was supposed to be testing and was passing erroneously. Fixed to use Linux x86-64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106779 91177308-0d34-0410-b5e6-96231b3b80d8 Dale Johannesen 9 years ago
3 changed file(s) with 24 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
1022110221 break;
1022210222 }
1022310223
10224 // In any sort of PIC mode addresses need to be computed at runtime by
10225 // adding in a register or some sort of table lookup. These can't
10226 // be used as immediates.
10227 if (Subtarget->isPICStyleGOT() || Subtarget->isPICStyleStubPIC() ||
10228 Subtarget->isPICStyleRIPRel())
10229 return;
10230
1022410231 // If we are in non-pic codegen mode, we allow the address of a global (with
1022510232 // an optional displacement) to be used with 'i'.
1022610233 GlobalAddressSDNode *GA = 0;
None ; RUN: llc < %s -relocation-model=static | grep {foo _str$}
0 ; RUN: llc < %s -relocation-model=static | grep {foo str$}
11 ; PR1761
22 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
3 target triple = "x86_64-apple-darwin8"
3 target triple = "x86_64-pc-linux"
44 @str = internal constant [12 x i8] c"init/main.c\00" ; <[12 x i8]*> [#uses=1]
55
66 define i32 @unknown_bootoption() {
0 ; RUN: llc %s -mtriple=x86_64-apple-darwin10 -disable-fp-elim
1 ; Formerly crashed, 8015842
2
3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
4
5 %0 = type { i64, i64, i64, i64, i64 }
6
7 @utcbs.1559 = internal global [3 x i64] zeroinitializer ; <[3 x i64]*> [#uses=1]
8
9 define void @bar() nounwind ssp {
10 entry:
11 %asmtmp.i.i = tail call %0 asm sideeffect "push %rbp; syscall; pop %rbp\0A", "={ax},={di},={si},={dx},={bx},{ax},{di},{si},{dx},{bx},~{dirflag},~{fpsr},~{flags},~{memory},~{r15},~{r14},~{r13},~{r12},~{r11},~{r10},~{r9},~{r8},~{rcx}"(i32 7, i64 -1, i64 0, i64 -1, i64 -1) nounwind ; <%0> [#uses=0]
12 %asmtmp.i1.i = tail call %0 asm sideeffect "mov $10, %r8;\0Amov $11, %r9;\0Amov $12, %r10;\0Apush %rbp; syscall; pop %rbp\0A", "={ax},={di},={si},={dx},={bx},{ax},{di},{si},{dx},{bx},imr,imr,imr,~{dirflag},~{fpsr},~{flags},~{memory},~{r15},~{r14},~{r13},~{r12},~{r11},~{r10},~{r9},~{r8},~{rcx}"(i32 8, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 0, i8* bitcast (i64* getelementptr inbounds ([3 x i64]* @utcbs.1559, i64 0, i64 2) to i8*)) nounwind ; <%0> [#uses=0]
13 ret void
14 }